1/* Copyright (C) 1988-2023 Free Software Foundation, Inc.
2
3This file is part of GCC.
4
5GCC is free software; you can redistribute it and/or modify
6it under the terms of the GNU General Public License as published by
7the Free Software Foundation; either version 3, or (at your option)
8any later version.
9
10GCC is distributed in the hope that it will be useful,
11but WITHOUT ANY WARRANTY; without even the implied warranty of
12MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13GNU General Public License for more details.
14
15You should have received a copy of the GNU General Public License
16along with GCC; see the file COPYING3. If not see
17<http://www.gnu.org/licenses/>. */
18
19#define IN_TARGET_CODE 1
20
21#include "config.h"
22#include "system.h"
23#include "coretypes.h"
24#include "backend.h"
25#include "rtl.h"
26#include "tree.h"
27#include "memmodel.h"
28#include "gimple.h"
29#include "cfghooks.h"
30#include "cfgloop.h"
31#include "df.h"
32#include "tm_p.h"
33#include "stringpool.h"
34#include "expmed.h"
35#include "optabs.h"
36#include "regs.h"
37#include "emit-rtl.h"
38#include "recog.h"
39#include "cgraph.h"
40#include "diagnostic.h"
41#include "cfgbuild.h"
42#include "alias.h"
43#include "fold-const.h"
44#include "attribs.h"
45#include "calls.h"
46#include "stor-layout.h"
47#include "varasm.h"
48#include "output.h"
49#include "insn-attr.h"
50#include "flags.h"
51#include "except.h"
52#include "explow.h"
53#include "expr.h"
54#include "cfgrtl.h"
55#include "common/common-target.h"
56#include "langhooks.h"
57#include "reload.h"
58#include "gimplify.h"
59#include "dwarf2.h"
60#include "tm-constrs.h"
61#include "cselib.h"
62#include "sched-int.h"
63#include "opts.h"
64#include "tree-pass.h"
65#include "context.h"
66#include "pass_manager.h"
67#include "target-globals.h"
68#include "gimple-iterator.h"
69#include "shrink-wrap.h"
70#include "builtins.h"
71#include "rtl-iter.h"
72#include "tree-iterator.h"
73#include "dbgcnt.h"
74#include "case-cfn-macros.h"
75#include "dojump.h"
76#include "fold-const-call.h"
77#include "tree-vrp.h"
78#include "tree-ssanames.h"
79#include "selftest.h"
80#include "selftest-rtl.h"
81#include "print-rtl.h"
82#include "intl.h"
83#include "ifcvt.h"
84#include "symbol-summary.h"
85#include "ipa-prop.h"
86#include "ipa-fnsummary.h"
87#include "wide-int-bitmask.h"
88#include "tree-vector-builder.h"
89#include "debug.h"
90#include "dwarf2out.h"
91#include "i386-builtins.h"
92#include "common/config/i386/i386-isas.h"
93
94#undef BDESC
95#undef BDESC_FIRST
96#undef BDESC_END
97
98/* Macros for verification of enum ix86_builtins order. */
99#define BDESC_VERIFY(x, y, z) \
100 gcc_checking_assert ((x) == (enum ix86_builtins) ((y) + (z)))
101#define BDESC_VERIFYS(x, y, z) \
102 STATIC_ASSERT ((x) == (enum ix86_builtins) ((y) + (z)))
103
104BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPESTR_FIRST,
105 IX86_BUILTIN__BDESC_COMI_LAST, 1);
106BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPISTR_FIRST,
107 IX86_BUILTIN__BDESC_PCMPESTR_LAST, 1);
108BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST,
109 IX86_BUILTIN__BDESC_PCMPISTR_LAST, 1);
110BDESC_VERIFYS (IX86_BUILTIN__BDESC_PURE_ARGS_FIRST,
111 IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST, 1);
112BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS_FIRST,
113 IX86_BUILTIN__BDESC_PURE_ARGS_LAST, 1);
114BDESC_VERIFYS (IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST,
115 IX86_BUILTIN__BDESC_ARGS_LAST, 1);
116BDESC_VERIFYS (IX86_BUILTIN__BDESC_MULTI_ARG_FIRST,
117 IX86_BUILTIN__BDESC_ROUND_ARGS_LAST, 1);
118BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_FIRST,
119 IX86_BUILTIN__BDESC_MULTI_ARG_LAST, 1);
120BDESC_VERIFYS (IX86_BUILTIN_MAX,
121 IX86_BUILTIN__BDESC_CET_LAST, 1);
122
123
124/* Table for the ix86 builtin non-function types. */
125static GTY(()) tree ix86_builtin_type_tab[(int) IX86_BT_LAST_CPTR + 1];
126
127tree ix86_float16_type_node = NULL_TREE;
128tree ix86_bf16_type_node = NULL_TREE;
129
130/* Retrieve an element from the above table, building some of
131 the types lazily. */
132
133static tree
134ix86_get_builtin_type (enum ix86_builtin_type tcode)
135{
136 unsigned int index;
137 tree type, itype;
138
139 gcc_assert ((unsigned)tcode < ARRAY_SIZE(ix86_builtin_type_tab));
140
141 type = ix86_builtin_type_tab[(int) tcode];
142 if (type != NULL)
143 return type;
144
145 gcc_assert (tcode > IX86_BT_LAST_PRIM);
146 if (tcode <= IX86_BT_LAST_VECT)
147 {
148 machine_mode mode;
149
150 index = tcode - IX86_BT_LAST_PRIM - 1;
151 itype = ix86_get_builtin_type (tcode: ix86_builtin_type_vect_base[index]);
152 mode = ix86_builtin_type_vect_mode[index];
153
154 type = build_vector_type_for_mode (itype, mode);
155 }
156 else
157 {
158 int quals;
159
160 index = tcode - IX86_BT_LAST_VECT - 1;
161 if (tcode <= IX86_BT_LAST_PTR)
162 quals = TYPE_UNQUALIFIED;
163 else
164 quals = TYPE_QUAL_CONST;
165
166 itype = ix86_get_builtin_type (tcode: ix86_builtin_type_ptr_base[index]);
167 if (quals != TYPE_UNQUALIFIED)
168 itype = build_qualified_type (itype, quals);
169
170 type = build_pointer_type (itype);
171 }
172
173 ix86_builtin_type_tab[(int) tcode] = type;
174 return type;
175}
176
177/* Table for the ix86 builtin function types. */
178static GTY(()) tree ix86_builtin_func_type_tab[(int) IX86_BT_LAST_ALIAS + 1];
179
180/* Retrieve an element from the above table, building some of
181 the types lazily. */
182
183static tree
184ix86_get_builtin_func_type (enum ix86_builtin_func_type tcode)
185{
186 tree type;
187
188 gcc_assert ((unsigned)tcode < ARRAY_SIZE (ix86_builtin_func_type_tab));
189
190 type = ix86_builtin_func_type_tab[(int) tcode];
191 if (type != NULL)
192 return type;
193
194 if (tcode <= IX86_BT_LAST_FUNC)
195 {
196 unsigned start = ix86_builtin_func_start[(int) tcode];
197 unsigned after = ix86_builtin_func_start[(int) tcode + 1];
198 tree rtype, atype, args = void_list_node;
199 unsigned i;
200
201 rtype = ix86_get_builtin_type (tcode: ix86_builtin_func_args[start]);
202 for (i = after - 1; i > start; --i)
203 {
204 atype = ix86_get_builtin_type (tcode: ix86_builtin_func_args[i]);
205 args = tree_cons (NULL, atype, args);
206 }
207
208 type = build_function_type (rtype, args);
209 }
210 else
211 {
212 unsigned index = tcode - IX86_BT_LAST_FUNC - 1;
213 enum ix86_builtin_func_type icode;
214
215 icode = ix86_builtin_func_alias_base[index];
216 type = ix86_get_builtin_func_type (tcode: icode);
217 }
218
219 ix86_builtin_func_type_tab[(int) tcode] = type;
220 return type;
221}
222
223/* Table for the ix86 builtin decls. */
224static GTY(()) tree ix86_builtins[(int) IX86_BUILTIN_MAX];
225
226struct builtin_isa ix86_builtins_isa[(int) IX86_BUILTIN_MAX];
227
228tree get_ix86_builtin (enum ix86_builtins c)
229{
230 return ix86_builtins[c];
231}
232
233/* Bits that can still enable any inclusion of a builtin. */
234HOST_WIDE_INT deferred_isa_values = 0;
235HOST_WIDE_INT deferred_isa_values2 = 0;
236
237/* Add an ix86 target builtin function with CODE, NAME and TYPE. Save the
238 MASK and MASK2 of which isa_flags and ix86_isa_flags2 to use in the
239 ix86_builtins_isa array. Stores the function decl in the ix86_builtins
240 array. Returns the function decl or NULL_TREE, if the builtin was not
241 added.
242
243 If the front end has a special hook for builtin functions, delay adding
244 builtin functions that aren't in the current ISA until the ISA is changed
245 with function specific optimization. Doing so, can save about 300K for the
246 default compiler. When the builtin is expanded, check at that time whether
247 it is valid.
248
249 If the front end doesn't have a special hook, record all builtins, even if
250 it isn't an instruction set in the current ISA in case the user uses
251 function specific options for a different ISA, so that we don't get scope
252 errors if a builtin is added in the middle of a function scope. */
253
254static inline tree
255def_builtin (HOST_WIDE_INT mask, HOST_WIDE_INT mask2,
256 const char *name,
257 enum ix86_builtin_func_type tcode,
258 enum ix86_builtins code)
259{
260 tree decl = NULL_TREE;
261
262 /* An instruction may be 64bit only regardless of ISAs. */
263 if (!(mask & OPTION_MASK_ISA_64BIT) || TARGET_64BIT)
264 {
265 ix86_builtins_isa[(int) code].isa = mask;
266 ix86_builtins_isa[(int) code].isa2 = mask2;
267
268 mask &= ~OPTION_MASK_ISA_64BIT;
269
270 /* Filter out the masks most often ored together with others. */
271 if ((mask & ix86_isa_flags & OPTION_MASK_ISA_AVX512VL)
272 && mask != OPTION_MASK_ISA_AVX512VL)
273 mask &= ~OPTION_MASK_ISA_AVX512VL;
274 if ((mask & ix86_isa_flags & OPTION_MASK_ISA_AVX512BW)
275 && mask != OPTION_MASK_ISA_AVX512BW)
276 mask &= ~OPTION_MASK_ISA_AVX512BW;
277
278 if (((mask2 == 0 || (mask2 & ix86_isa_flags2) != 0)
279 && (mask == 0 || (mask & ix86_isa_flags) != 0))
280 || ((mask & OPTION_MASK_ISA_MMX) != 0 && TARGET_MMX_WITH_SSE)
281 /* "Unified" builtin used by either AVXVNNI/AVXIFMA/AES intrinsics
282 or AVX512VNNIVL/AVX512IFMAVL/VAESVL non-mask intrinsics should be
283 defined whenever avxvnni/avxifma/aes or avx512vnni/avx512ifma/vaes
284 && avx512vl exist. */
285 || (mask2 == OPTION_MASK_ISA2_AVXVNNI)
286 || (mask2 == OPTION_MASK_ISA2_AVXIFMA)
287 || (mask2 == (OPTION_MASK_ISA2_AVXNECONVERT
288 | OPTION_MASK_ISA2_AVX512BF16))
289 || ((mask2 & OPTION_MASK_ISA2_VAES) != 0)
290 || (lang_hooks.builtin_function
291 == lang_hooks.builtin_function_ext_scope))
292 {
293 tree type = ix86_get_builtin_func_type (tcode);
294 decl = add_builtin_function (name, type, function_code: code, cl: BUILT_IN_MD,
295 NULL, NULL_TREE);
296 ix86_builtins[(int) code] = decl;
297 ix86_builtins_isa[(int) code].set_and_not_built_p = false;
298 }
299 else
300 {
301 /* Just MASK and MASK2 where set_and_not_built_p == true can potentially
302 include a builtin. */
303 deferred_isa_values |= mask;
304 deferred_isa_values2 |= mask2;
305 ix86_builtins[(int) code] = NULL_TREE;
306 ix86_builtins_isa[(int) code].tcode = tcode;
307 ix86_builtins_isa[(int) code].name = name;
308 ix86_builtins_isa[(int) code].const_p = false;
309 ix86_builtins_isa[(int) code].pure_p = false;
310 ix86_builtins_isa[(int) code].set_and_not_built_p = true;
311 }
312 }
313
314 return decl;
315}
316
317/* Like def_builtin, but also marks the function decl "const". */
318
319static inline tree
320def_builtin_const (HOST_WIDE_INT mask, HOST_WIDE_INT mask2, const char *name,
321 enum ix86_builtin_func_type tcode, enum ix86_builtins code)
322{
323 tree decl = def_builtin (mask, mask2, name, tcode, code);
324 if (decl)
325 TREE_READONLY (decl) = 1;
326 else
327 ix86_builtins_isa[(int) code].const_p = true;
328
329 return decl;
330}
331
332/* Like def_builtin, but also marks the function decl "pure". */
333
334static inline tree
335def_builtin_pure (HOST_WIDE_INT mask, HOST_WIDE_INT mask2, const char *name,
336 enum ix86_builtin_func_type tcode, enum ix86_builtins code)
337{
338 tree decl = def_builtin (mask, mask2, name, tcode, code);
339 if (decl)
340 DECL_PURE_P (decl) = 1;
341 else
342 ix86_builtins_isa[(int) code].pure_p = true;
343
344 return decl;
345}
346
347/* Add any new builtin functions for a given ISA that may not have been
348 declared. This saves a bit of space compared to adding all of the
349 declarations to the tree, even if we didn't use them. */
350
351void
352ix86_add_new_builtins (HOST_WIDE_INT isa, HOST_WIDE_INT isa2)
353{
354 isa &= ~OPTION_MASK_ISA_64BIT;
355
356 if ((isa & deferred_isa_values) == 0
357 && (isa2 & deferred_isa_values2) == 0
358 && ((deferred_isa_values & OPTION_MASK_ISA_MMX) == 0
359 || !(TARGET_64BIT && (isa & OPTION_MASK_ISA_SSE2) != 0)))
360 return;
361
362 /* Bits in ISA value can be removed from potential isa values. */
363 deferred_isa_values &= ~isa;
364 deferred_isa_values2 &= ~isa2;
365 if (TARGET_64BIT && (isa & OPTION_MASK_ISA_SSE2) != 0)
366 deferred_isa_values &= ~OPTION_MASK_ISA_MMX;
367
368 int i;
369 tree saved_current_target_pragma = current_target_pragma;
370 current_target_pragma = NULL_TREE;
371
372 for (i = 0; i < (int)IX86_BUILTIN_MAX; i++)
373 {
374 if (((ix86_builtins_isa[i].isa & isa) != 0
375 || (ix86_builtins_isa[i].isa2 & isa2) != 0
376 || ((ix86_builtins_isa[i].isa & OPTION_MASK_ISA_MMX) != 0
377 && TARGET_64BIT
378 && (isa & OPTION_MASK_ISA_SSE2) != 0))
379 && ix86_builtins_isa[i].set_and_not_built_p)
380 {
381 tree decl, type;
382
383 /* Don't define the builtin again. */
384 ix86_builtins_isa[i].set_and_not_built_p = false;
385
386 type = ix86_get_builtin_func_type (tcode: ix86_builtins_isa[i].tcode);
387 decl = add_builtin_function_ext_scope (name: ix86_builtins_isa[i].name,
388 type, function_code: i, cl: BUILT_IN_MD, NULL,
389 NULL_TREE);
390
391 ix86_builtins[i] = decl;
392 if (ix86_builtins_isa[i].const_p)
393 TREE_READONLY (decl) = 1;
394 if (ix86_builtins_isa[i].pure_p)
395 DECL_PURE_P (decl) = 1;
396 }
397 }
398
399 current_target_pragma = saved_current_target_pragma;
400}
401
402/* TM vector builtins. */
403
404/* Reuse the existing x86-specific `struct builtin_description' cause
405 we're lazy. Add casts to make them fit. */
406static const struct builtin_description bdesc_tm[] =
407{
408 { OPTION_MASK_ISA_MMX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_WM64", .code: (enum ix86_builtins) BUILT_IN_TM_STORE_M64, .comparison: UNKNOWN, .flag: VOID_FTYPE_PV2SI_V2SI },
409 { OPTION_MASK_ISA_MMX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_WaRM64", .code: (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M64, .comparison: UNKNOWN, .flag: VOID_FTYPE_PV2SI_V2SI },
410 { OPTION_MASK_ISA_MMX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_WaWM64", .code: (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M64, .comparison: UNKNOWN, .flag: VOID_FTYPE_PV2SI_V2SI },
411 { OPTION_MASK_ISA_MMX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RM64", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_M64, .comparison: UNKNOWN, .flag: V2SI_FTYPE_PCV2SI },
412 { OPTION_MASK_ISA_MMX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RaRM64", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M64, .comparison: UNKNOWN, .flag: V2SI_FTYPE_PCV2SI },
413 { OPTION_MASK_ISA_MMX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RaWM64", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M64, .comparison: UNKNOWN, .flag: V2SI_FTYPE_PCV2SI },
414 { OPTION_MASK_ISA_MMX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RfWM64", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M64, .comparison: UNKNOWN, .flag: V2SI_FTYPE_PCV2SI },
415
416 { OPTION_MASK_ISA_SSE, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_WM128", .code: (enum ix86_builtins) BUILT_IN_TM_STORE_M128, .comparison: UNKNOWN, .flag: VOID_FTYPE_PV4SF_V4SF },
417 { OPTION_MASK_ISA_SSE, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_WaRM128", .code: (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M128, .comparison: UNKNOWN, .flag: VOID_FTYPE_PV4SF_V4SF },
418 { OPTION_MASK_ISA_SSE, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_WaWM128", .code: (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M128, .comparison: UNKNOWN, .flag: VOID_FTYPE_PV4SF_V4SF },
419 { OPTION_MASK_ISA_SSE, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RM128", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_M128, .comparison: UNKNOWN, .flag: V4SF_FTYPE_PCV4SF },
420 { OPTION_MASK_ISA_SSE, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RaRM128", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M128, .comparison: UNKNOWN, .flag: V4SF_FTYPE_PCV4SF },
421 { OPTION_MASK_ISA_SSE, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RaWM128", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M128, .comparison: UNKNOWN, .flag: V4SF_FTYPE_PCV4SF },
422 { OPTION_MASK_ISA_SSE, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RfWM128", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M128, .comparison: UNKNOWN, .flag: V4SF_FTYPE_PCV4SF },
423
424 { OPTION_MASK_ISA_AVX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_WM256", .code: (enum ix86_builtins) BUILT_IN_TM_STORE_M256, .comparison: UNKNOWN, .flag: VOID_FTYPE_PV8SF_V8SF },
425 { OPTION_MASK_ISA_AVX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_WaRM256", .code: (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M256, .comparison: UNKNOWN, .flag: VOID_FTYPE_PV8SF_V8SF },
426 { OPTION_MASK_ISA_AVX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_WaWM256", .code: (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M256, .comparison: UNKNOWN, .flag: VOID_FTYPE_PV8SF_V8SF },
427 { OPTION_MASK_ISA_AVX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RM256", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_M256, .comparison: UNKNOWN, .flag: V8SF_FTYPE_PCV8SF },
428 { OPTION_MASK_ISA_AVX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RaRM256", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M256, .comparison: UNKNOWN, .flag: V8SF_FTYPE_PCV8SF },
429 { OPTION_MASK_ISA_AVX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RaWM256", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M256, .comparison: UNKNOWN, .flag: V8SF_FTYPE_PCV8SF },
430 { OPTION_MASK_ISA_AVX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RfWM256", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M256, .comparison: UNKNOWN, .flag: V8SF_FTYPE_PCV8SF },
431
432 { OPTION_MASK_ISA_MMX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_LM64", .code: (enum ix86_builtins) BUILT_IN_TM_LOG_M64, .comparison: UNKNOWN, .flag: VOID_FTYPE_PCVOID },
433 { OPTION_MASK_ISA_SSE, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_LM128", .code: (enum ix86_builtins) BUILT_IN_TM_LOG_M128, .comparison: UNKNOWN, .flag: VOID_FTYPE_PCVOID },
434 { OPTION_MASK_ISA_AVX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_LM256", .code: (enum ix86_builtins) BUILT_IN_TM_LOG_M256, .comparison: UNKNOWN, .flag: VOID_FTYPE_PCVOID },
435};
436
437/* Initialize the transactional memory vector load/store builtins. */
438
439static void
440ix86_init_tm_builtins (void)
441{
442 enum ix86_builtin_func_type ftype;
443 const struct builtin_description *d;
444 size_t i;
445 tree decl;
446 tree attrs_load, attrs_type_load, attrs_store, attrs_type_store;
447 tree attrs_log, attrs_type_log;
448
449 if (!flag_tm)
450 return;
451
452 /* If there are no builtins defined, we must be compiling in a
453 language without trans-mem support. */
454 if (!builtin_decl_explicit_p (fncode: BUILT_IN_TM_LOAD_1))
455 return;
456
457 /* Use whatever attributes a normal TM load has. */
458 decl = builtin_decl_explicit (fncode: BUILT_IN_TM_LOAD_1);
459 attrs_load = DECL_ATTRIBUTES (decl);
460 attrs_type_load = TYPE_ATTRIBUTES (TREE_TYPE (decl));
461 /* Use whatever attributes a normal TM store has. */
462 decl = builtin_decl_explicit (fncode: BUILT_IN_TM_STORE_1);
463 attrs_store = DECL_ATTRIBUTES (decl);
464 attrs_type_store = TYPE_ATTRIBUTES (TREE_TYPE (decl));
465 /* Use whatever attributes a normal TM log has. */
466 decl = builtin_decl_explicit (fncode: BUILT_IN_TM_LOG);
467 attrs_log = DECL_ATTRIBUTES (decl);
468 attrs_type_log = TYPE_ATTRIBUTES (TREE_TYPE (decl));
469
470 for (i = 0, d = bdesc_tm;
471 i < ARRAY_SIZE (bdesc_tm);
472 i++, d++)
473 {
474 if ((d->mask & ix86_isa_flags) != 0
475 || ((d->mask & OPTION_MASK_ISA_MMX) != 0 && TARGET_MMX_WITH_SSE)
476 || (lang_hooks.builtin_function
477 == lang_hooks.builtin_function_ext_scope))
478 {
479 tree type, attrs, attrs_type;
480 enum built_in_function code = (enum built_in_function) d->code;
481
482 ftype = (enum ix86_builtin_func_type) d->flag;
483 type = ix86_get_builtin_func_type (tcode: ftype);
484
485 if (BUILTIN_TM_LOAD_P (code))
486 {
487 attrs = attrs_load;
488 attrs_type = attrs_type_load;
489 }
490 else if (BUILTIN_TM_STORE_P (code))
491 {
492 attrs = attrs_store;
493 attrs_type = attrs_type_store;
494 }
495 else
496 {
497 attrs = attrs_log;
498 attrs_type = attrs_type_log;
499 }
500 decl = add_builtin_function (name: d->name, type, function_code: code, cl: BUILT_IN_NORMAL,
501 /* The builtin without the prefix for
502 calling it directly. */
503 library_name: d->name + strlen (s: "__builtin_"),
504 attrs);
505 /* add_builtin_function() will set the DECL_ATTRIBUTES, now
506 set the TYPE_ATTRIBUTES. */
507 decl_attributes (&TREE_TYPE (decl), attrs_type, ATTR_FLAG_BUILT_IN);
508
509 set_builtin_decl (fncode: code, decl, implicit_p: false);
510 }
511 }
512}
513
514/* Set up all the MMX/SSE builtins, even builtins for instructions that are not
515 in the current target ISA to allow the user to compile particular modules
516 with different target specific options that differ from the command line
517 options. */
518static void
519ix86_init_mmx_sse_builtins (void)
520{
521 const struct builtin_description * d;
522 enum ix86_builtin_func_type ftype;
523 size_t i;
524
525 /* Add all special builtins with variable number of operands. */
526 for (i = 0, d = bdesc_special_args;
527 i < ARRAY_SIZE (bdesc_special_args);
528 i++, d++)
529 {
530 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST, i);
531 if (d->name == 0)
532 continue;
533
534 ftype = (enum ix86_builtin_func_type) d->flag;
535 def_builtin (mask: d->mask, mask2: d->mask2, name: d->name, tcode: ftype, code: d->code);
536 }
537 BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST,
538 IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST,
539 ARRAY_SIZE (bdesc_special_args) - 1);
540
541 /* Add all pure builtins with variable number of operands. */
542 for (i = 0, d = bdesc_pure_args;
543 i < ARRAY_SIZE (bdesc_pure_args);
544 i++, d++)
545 {
546 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_PURE_ARGS_FIRST, i);
547 if (d->name == 0)
548 continue;
549
550 ftype = (enum ix86_builtin_func_type) d->flag;
551 def_builtin_pure (mask: d->mask, mask2: d->mask2, name: d->name, tcode: ftype, code: d->code);
552 }
553 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PURE_ARGS_LAST,
554 IX86_BUILTIN__BDESC_PURE_ARGS_FIRST,
555 ARRAY_SIZE (bdesc_pure_args) - 1);
556
557 /* Add all const builtins with variable number of operands. */
558 for (i = 0, d = bdesc_args;
559 i < ARRAY_SIZE (bdesc_args);
560 i++, d++)
561 {
562 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_ARGS_FIRST, i);
563 if (d->name == 0)
564 continue;
565
566 ftype = (enum ix86_builtin_func_type) d->flag;
567 def_builtin_const (mask: d->mask, mask2: d->mask2, name: d->name, tcode: ftype, code: d->code);
568 }
569 BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS_LAST,
570 IX86_BUILTIN__BDESC_ARGS_FIRST,
571 ARRAY_SIZE (bdesc_args) - 1);
572
573 /* Add all builtins with rounding. */
574 for (i = 0, d = bdesc_round_args;
575 i < ARRAY_SIZE (bdesc_round_args);
576 i++, d++)
577 {
578 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST, i);
579 if (d->name == 0)
580 continue;
581
582 ftype = (enum ix86_builtin_func_type) d->flag;
583 def_builtin_const (mask: d->mask, mask2: d->mask2, name: d->name, tcode: ftype, code: d->code);
584 }
585 BDESC_VERIFYS (IX86_BUILTIN__BDESC_ROUND_ARGS_LAST,
586 IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST,
587 ARRAY_SIZE (bdesc_round_args) - 1);
588
589 /* pcmpestr[im] insns. */
590 for (i = 0, d = bdesc_pcmpestr;
591 i < ARRAY_SIZE (bdesc_pcmpestr);
592 i++, d++)
593 {
594 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_PCMPESTR_FIRST, i);
595 if (d->code == IX86_BUILTIN_PCMPESTRM128)
596 ftype = V16QI_FTYPE_V16QI_INT_V16QI_INT_INT;
597 else
598 ftype = INT_FTYPE_V16QI_INT_V16QI_INT_INT;
599 def_builtin_const (mask: d->mask, mask2: d->mask2, name: d->name, tcode: ftype, code: d->code);
600 }
601 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPESTR_LAST,
602 IX86_BUILTIN__BDESC_PCMPESTR_FIRST,
603 ARRAY_SIZE (bdesc_pcmpestr) - 1);
604
605 /* pcmpistr[im] insns. */
606 for (i = 0, d = bdesc_pcmpistr;
607 i < ARRAY_SIZE (bdesc_pcmpistr);
608 i++, d++)
609 {
610 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_PCMPISTR_FIRST, i);
611 if (d->code == IX86_BUILTIN_PCMPISTRM128)
612 ftype = V16QI_FTYPE_V16QI_V16QI_INT;
613 else
614 ftype = INT_FTYPE_V16QI_V16QI_INT;
615 def_builtin_const (mask: d->mask, mask2: d->mask2, name: d->name, tcode: ftype, code: d->code);
616 }
617 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPISTR_LAST,
618 IX86_BUILTIN__BDESC_PCMPISTR_FIRST,
619 ARRAY_SIZE (bdesc_pcmpistr) - 1);
620
621 /* comi/ucomi insns. */
622 for (i = 0, d = bdesc_comi; i < ARRAY_SIZE (bdesc_comi); i++, d++)
623 {
624 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_COMI_FIRST, i);
625 if (d->mask == OPTION_MASK_ISA_SSE2)
626 ftype = INT_FTYPE_V2DF_V2DF;
627 else
628 ftype = INT_FTYPE_V4SF_V4SF;
629 def_builtin_const (mask: d->mask, mask2: d->mask2, name: d->name, tcode: ftype, code: d->code);
630 }
631 BDESC_VERIFYS (IX86_BUILTIN__BDESC_COMI_LAST,
632 IX86_BUILTIN__BDESC_COMI_FIRST,
633 ARRAY_SIZE (bdesc_comi) - 1);
634
635 /* SSE */
636 def_builtin (OPTION_MASK_ISA_SSE, mask2: 0, name: "__builtin_ia32_ldmxcsr",
637 tcode: VOID_FTYPE_UNSIGNED, code: IX86_BUILTIN_LDMXCSR);
638 def_builtin_pure (OPTION_MASK_ISA_SSE, mask2: 0, name: "__builtin_ia32_stmxcsr",
639 tcode: UNSIGNED_FTYPE_VOID, code: IX86_BUILTIN_STMXCSR);
640
641 /* SSE or 3DNow!A */
642 def_builtin (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
643 /* As it uses V4HImode, we have to require -mmmx too. */
644 | OPTION_MASK_ISA_MMX, mask2: 0,
645 name: "__builtin_ia32_maskmovq", tcode: VOID_FTYPE_V8QI_V8QI_PCHAR,
646 code: IX86_BUILTIN_MASKMOVQ);
647
648 /* SSE2 */
649 def_builtin (OPTION_MASK_ISA_SSE2, mask2: 0, name: "__builtin_ia32_maskmovdqu",
650 tcode: VOID_FTYPE_V16QI_V16QI_PCHAR, code: IX86_BUILTIN_MASKMOVDQU);
651
652 def_builtin (OPTION_MASK_ISA_SSE2, mask2: 0, name: "__builtin_ia32_clflush",
653 tcode: VOID_FTYPE_PCVOID, code: IX86_BUILTIN_CLFLUSH);
654 x86_mfence = def_builtin (OPTION_MASK_ISA_SSE2, mask2: 0, name: "__builtin_ia32_mfence",
655 tcode: VOID_FTYPE_VOID, code: IX86_BUILTIN_MFENCE);
656
657 /* SSE3. */
658 def_builtin (mask: 0, OPTION_MASK_ISA2_MWAIT, name: "__builtin_ia32_monitor",
659 tcode: VOID_FTYPE_PCVOID_UNSIGNED_UNSIGNED, code: IX86_BUILTIN_MONITOR);
660 def_builtin (mask: 0, OPTION_MASK_ISA2_MWAIT, name: "__builtin_ia32_mwait",
661 tcode: VOID_FTYPE_UNSIGNED_UNSIGNED, code: IX86_BUILTIN_MWAIT);
662
663 /* AES */
664 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2
665 | OPTION_MASK_ISA_AVX512VL,
666 OPTION_MASK_ISA2_VAES,
667 name: "__builtin_ia32_aesenc128",
668 tcode: V2DI_FTYPE_V2DI_V2DI, code: IX86_BUILTIN_AESENC128);
669 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2
670 | OPTION_MASK_ISA_AVX512VL,
671 OPTION_MASK_ISA2_VAES,
672 name: "__builtin_ia32_aesenclast128",
673 tcode: V2DI_FTYPE_V2DI_V2DI, code: IX86_BUILTIN_AESENCLAST128);
674 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2
675 | OPTION_MASK_ISA_AVX512VL,
676 OPTION_MASK_ISA2_VAES,
677 name: "__builtin_ia32_aesdec128",
678 tcode: V2DI_FTYPE_V2DI_V2DI, code: IX86_BUILTIN_AESDEC128);
679 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2
680 | OPTION_MASK_ISA_AVX512VL,
681 OPTION_MASK_ISA2_VAES,
682 name: "__builtin_ia32_aesdeclast128",
683 tcode: V2DI_FTYPE_V2DI_V2DI, code: IX86_BUILTIN_AESDECLAST128);
684 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, mask2: 0,
685 name: "__builtin_ia32_aesimc128",
686 tcode: V2DI_FTYPE_V2DI, code: IX86_BUILTIN_AESIMC128);
687 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, mask2: 0,
688 name: "__builtin_ia32_aeskeygenassist128",
689 tcode: V2DI_FTYPE_V2DI_INT, code: IX86_BUILTIN_AESKEYGENASSIST128);
690
691 /* PCLMUL */
692 def_builtin_const (OPTION_MASK_ISA_PCLMUL | OPTION_MASK_ISA_SSE2, mask2: 0,
693 name: "__builtin_ia32_pclmulqdq128",
694 tcode: V2DI_FTYPE_V2DI_V2DI_INT, code: IX86_BUILTIN_PCLMULQDQ128);
695
696 /* RDRND */
697 def_builtin (OPTION_MASK_ISA_RDRND, mask2: 0, name: "__builtin_ia32_rdrand16_step",
698 tcode: INT_FTYPE_PUSHORT, code: IX86_BUILTIN_RDRAND16_STEP);
699 def_builtin (OPTION_MASK_ISA_RDRND, mask2: 0, name: "__builtin_ia32_rdrand32_step",
700 tcode: INT_FTYPE_PUNSIGNED, code: IX86_BUILTIN_RDRAND32_STEP);
701 def_builtin (OPTION_MASK_ISA_RDRND | OPTION_MASK_ISA_64BIT, mask2: 0,
702 name: "__builtin_ia32_rdrand64_step", tcode: INT_FTYPE_PULONGLONG,
703 code: IX86_BUILTIN_RDRAND64_STEP);
704
705 /* AVX2 */
706 def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gathersiv2df",
707 tcode: V2DF_FTYPE_V2DF_PCDOUBLE_V4SI_V2DF_INT,
708 code: IX86_BUILTIN_GATHERSIV2DF);
709
710 def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gathersiv4df",
711 tcode: V4DF_FTYPE_V4DF_PCDOUBLE_V4SI_V4DF_INT,
712 code: IX86_BUILTIN_GATHERSIV4DF);
713
714 def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatherdiv2df",
715 tcode: V2DF_FTYPE_V2DF_PCDOUBLE_V2DI_V2DF_INT,
716 code: IX86_BUILTIN_GATHERDIV2DF);
717
718 def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatherdiv4df",
719 tcode: V4DF_FTYPE_V4DF_PCDOUBLE_V4DI_V4DF_INT,
720 code: IX86_BUILTIN_GATHERDIV4DF);
721
722 def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gathersiv4sf",
723 tcode: V4SF_FTYPE_V4SF_PCFLOAT_V4SI_V4SF_INT,
724 code: IX86_BUILTIN_GATHERSIV4SF);
725
726 def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gathersiv8sf",
727 tcode: V8SF_FTYPE_V8SF_PCFLOAT_V8SI_V8SF_INT,
728 code: IX86_BUILTIN_GATHERSIV8SF);
729
730 def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatherdiv4sf",
731 tcode: V4SF_FTYPE_V4SF_PCFLOAT_V2DI_V4SF_INT,
732 code: IX86_BUILTIN_GATHERDIV4SF);
733
734 def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatherdiv4sf256",
735 tcode: V4SF_FTYPE_V4SF_PCFLOAT_V4DI_V4SF_INT,
736 code: IX86_BUILTIN_GATHERDIV8SF);
737
738 def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gathersiv2di",
739 tcode: V2DI_FTYPE_V2DI_PCINT64_V4SI_V2DI_INT,
740 code: IX86_BUILTIN_GATHERSIV2DI);
741
742 def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gathersiv4di",
743 tcode: V4DI_FTYPE_V4DI_PCINT64_V4SI_V4DI_INT,
744 code: IX86_BUILTIN_GATHERSIV4DI);
745
746 def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatherdiv2di",
747 tcode: V2DI_FTYPE_V2DI_PCINT64_V2DI_V2DI_INT,
748 code: IX86_BUILTIN_GATHERDIV2DI);
749
750 def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatherdiv4di",
751 tcode: V4DI_FTYPE_V4DI_PCINT64_V4DI_V4DI_INT,
752 code: IX86_BUILTIN_GATHERDIV4DI);
753
754 def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gathersiv4si",
755 tcode: V4SI_FTYPE_V4SI_PCINT_V4SI_V4SI_INT,
756 code: IX86_BUILTIN_GATHERSIV4SI);
757
758 def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gathersiv8si",
759 tcode: V8SI_FTYPE_V8SI_PCINT_V8SI_V8SI_INT,
760 code: IX86_BUILTIN_GATHERSIV8SI);
761
762 def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatherdiv4si",
763 tcode: V4SI_FTYPE_V4SI_PCINT_V2DI_V4SI_INT,
764 code: IX86_BUILTIN_GATHERDIV4SI);
765
766 def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatherdiv4si256",
767 tcode: V4SI_FTYPE_V4SI_PCINT_V4DI_V4SI_INT,
768 code: IX86_BUILTIN_GATHERDIV8SI);
769
770 def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatheraltsiv4df ",
771 tcode: V4DF_FTYPE_V4DF_PCDOUBLE_V8SI_V4DF_INT,
772 code: IX86_BUILTIN_GATHERALTSIV4DF);
773
774 def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatheraltdiv8sf ",
775 tcode: V8SF_FTYPE_V8SF_PCFLOAT_V4DI_V8SF_INT,
776 code: IX86_BUILTIN_GATHERALTDIV8SF);
777
778 def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatheraltsiv4di ",
779 tcode: V4DI_FTYPE_V4DI_PCINT64_V8SI_V4DI_INT,
780 code: IX86_BUILTIN_GATHERALTSIV4DI);
781
782 def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatheraltdiv8si ",
783 tcode: V8SI_FTYPE_V8SI_PCINT_V4DI_V8SI_INT,
784 code: IX86_BUILTIN_GATHERALTDIV8SI);
785
786 /* AVX512F */
787 def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
788 name: "__builtin_ia32_gathersiv16sf",
789 tcode: V16SF_FTYPE_V16SF_PCVOID_V16SI_HI_INT,
790 code: IX86_BUILTIN_GATHER3SIV16SF);
791
792 def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
793 name: "__builtin_ia32_gathersiv8df",
794 tcode: V8DF_FTYPE_V8DF_PCVOID_V8SI_QI_INT,
795 code: IX86_BUILTIN_GATHER3SIV8DF);
796
797 def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
798 name: "__builtin_ia32_gatherdiv16sf",
799 tcode: V8SF_FTYPE_V8SF_PCVOID_V8DI_QI_INT,
800 code: IX86_BUILTIN_GATHER3DIV16SF);
801
802 def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
803 name: "__builtin_ia32_gatherdiv8df",
804 tcode: V8DF_FTYPE_V8DF_PCVOID_V8DI_QI_INT,
805 code: IX86_BUILTIN_GATHER3DIV8DF);
806
807 def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
808 name: "__builtin_ia32_gathersiv16si",
809 tcode: V16SI_FTYPE_V16SI_PCVOID_V16SI_HI_INT,
810 code: IX86_BUILTIN_GATHER3SIV16SI);
811
812 def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
813 name: "__builtin_ia32_gathersiv8di",
814 tcode: V8DI_FTYPE_V8DI_PCVOID_V8SI_QI_INT,
815 code: IX86_BUILTIN_GATHER3SIV8DI);
816
817 def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
818 name: "__builtin_ia32_gatherdiv16si",
819 tcode: V8SI_FTYPE_V8SI_PCVOID_V8DI_QI_INT,
820 code: IX86_BUILTIN_GATHER3DIV16SI);
821
822 def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
823 name: "__builtin_ia32_gatherdiv8di",
824 tcode: V8DI_FTYPE_V8DI_PCVOID_V8DI_QI_INT,
825 code: IX86_BUILTIN_GATHER3DIV8DI);
826
827 def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
828 name: "__builtin_ia32_gather3altsiv8df ",
829 tcode: V8DF_FTYPE_V8DF_PCDOUBLE_V16SI_QI_INT,
830 code: IX86_BUILTIN_GATHER3ALTSIV8DF);
831
832 def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
833 name: "__builtin_ia32_gather3altdiv16sf ",
834 tcode: V16SF_FTYPE_V16SF_PCFLOAT_V8DI_HI_INT,
835 code: IX86_BUILTIN_GATHER3ALTDIV16SF);
836
837 def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
838 name: "__builtin_ia32_gather3altsiv8di ",
839 tcode: V8DI_FTYPE_V8DI_PCINT64_V16SI_QI_INT,
840 code: IX86_BUILTIN_GATHER3ALTSIV8DI);
841
842 def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
843 name: "__builtin_ia32_gather3altdiv16si ",
844 tcode: V16SI_FTYPE_V16SI_PCINT_V8DI_HI_INT,
845 code: IX86_BUILTIN_GATHER3ALTDIV16SI);
846
847 def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
848 name: "__builtin_ia32_scattersiv16sf",
849 tcode: VOID_FTYPE_PVOID_HI_V16SI_V16SF_INT,
850 code: IX86_BUILTIN_SCATTERSIV16SF);
851
852 def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
853 name: "__builtin_ia32_scattersiv8df",
854 tcode: VOID_FTYPE_PVOID_QI_V8SI_V8DF_INT,
855 code: IX86_BUILTIN_SCATTERSIV8DF);
856
857 def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
858 name: "__builtin_ia32_scatterdiv16sf",
859 tcode: VOID_FTYPE_PVOID_QI_V8DI_V8SF_INT,
860 code: IX86_BUILTIN_SCATTERDIV16SF);
861
862 def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
863 name: "__builtin_ia32_scatterdiv8df",
864 tcode: VOID_FTYPE_PVOID_QI_V8DI_V8DF_INT,
865 code: IX86_BUILTIN_SCATTERDIV8DF);
866
867 def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
868 name: "__builtin_ia32_scattersiv16si",
869 tcode: VOID_FTYPE_PVOID_HI_V16SI_V16SI_INT,
870 code: IX86_BUILTIN_SCATTERSIV16SI);
871
872 def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
873 name: "__builtin_ia32_scattersiv8di",
874 tcode: VOID_FTYPE_PVOID_QI_V8SI_V8DI_INT,
875 code: IX86_BUILTIN_SCATTERSIV8DI);
876
877 def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
878 name: "__builtin_ia32_scatterdiv16si",
879 tcode: VOID_FTYPE_PVOID_QI_V8DI_V8SI_INT,
880 code: IX86_BUILTIN_SCATTERDIV16SI);
881
882 def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
883 name: "__builtin_ia32_scatterdiv8di",
884 tcode: VOID_FTYPE_PVOID_QI_V8DI_V8DI_INT,
885 code: IX86_BUILTIN_SCATTERDIV8DI);
886
887 /* AVX512VL */
888 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3siv2df",
889 tcode: V2DF_FTYPE_V2DF_PCVOID_V4SI_QI_INT,
890 code: IX86_BUILTIN_GATHER3SIV2DF);
891
892 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3siv4df",
893 tcode: V4DF_FTYPE_V4DF_PCVOID_V4SI_QI_INT,
894 code: IX86_BUILTIN_GATHER3SIV4DF);
895
896 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3div2df",
897 tcode: V2DF_FTYPE_V2DF_PCVOID_V2DI_QI_INT,
898 code: IX86_BUILTIN_GATHER3DIV2DF);
899
900 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3div4df",
901 tcode: V4DF_FTYPE_V4DF_PCVOID_V4DI_QI_INT,
902 code: IX86_BUILTIN_GATHER3DIV4DF);
903
904 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3siv4sf",
905 tcode: V4SF_FTYPE_V4SF_PCVOID_V4SI_QI_INT,
906 code: IX86_BUILTIN_GATHER3SIV4SF);
907
908 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3siv8sf",
909 tcode: V8SF_FTYPE_V8SF_PCVOID_V8SI_QI_INT,
910 code: IX86_BUILTIN_GATHER3SIV8SF);
911
912 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3div4sf",
913 tcode: V4SF_FTYPE_V4SF_PCVOID_V2DI_QI_INT,
914 code: IX86_BUILTIN_GATHER3DIV4SF);
915
916 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3div8sf",
917 tcode: V4SF_FTYPE_V4SF_PCVOID_V4DI_QI_INT,
918 code: IX86_BUILTIN_GATHER3DIV8SF);
919
920 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3siv2di",
921 tcode: V2DI_FTYPE_V2DI_PCVOID_V4SI_QI_INT,
922 code: IX86_BUILTIN_GATHER3SIV2DI);
923
924 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3siv4di",
925 tcode: V4DI_FTYPE_V4DI_PCVOID_V4SI_QI_INT,
926 code: IX86_BUILTIN_GATHER3SIV4DI);
927
928 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3div2di",
929 tcode: V2DI_FTYPE_V2DI_PCVOID_V2DI_QI_INT,
930 code: IX86_BUILTIN_GATHER3DIV2DI);
931
932 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3div4di",
933 tcode: V4DI_FTYPE_V4DI_PCVOID_V4DI_QI_INT,
934 code: IX86_BUILTIN_GATHER3DIV4DI);
935
936 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3siv4si",
937 tcode: V4SI_FTYPE_V4SI_PCVOID_V4SI_QI_INT,
938 code: IX86_BUILTIN_GATHER3SIV4SI);
939
940 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3siv8si",
941 tcode: V8SI_FTYPE_V8SI_PCVOID_V8SI_QI_INT,
942 code: IX86_BUILTIN_GATHER3SIV8SI);
943
944 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3div4si",
945 tcode: V4SI_FTYPE_V4SI_PCVOID_V2DI_QI_INT,
946 code: IX86_BUILTIN_GATHER3DIV4SI);
947
948 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3div8si",
949 tcode: V4SI_FTYPE_V4SI_PCVOID_V4DI_QI_INT,
950 code: IX86_BUILTIN_GATHER3DIV8SI);
951
952 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3altsiv4df ",
953 tcode: V4DF_FTYPE_V4DF_PCDOUBLE_V8SI_QI_INT,
954 code: IX86_BUILTIN_GATHER3ALTSIV4DF);
955
956 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3altdiv8sf ",
957 tcode: V8SF_FTYPE_V8SF_PCFLOAT_V4DI_QI_INT,
958 code: IX86_BUILTIN_GATHER3ALTDIV8SF);
959
960 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3altsiv4di ",
961 tcode: V4DI_FTYPE_V4DI_PCINT64_V8SI_QI_INT,
962 code: IX86_BUILTIN_GATHER3ALTSIV4DI);
963
964 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3altdiv8si ",
965 tcode: V8SI_FTYPE_V8SI_PCINT_V4DI_QI_INT,
966 code: IX86_BUILTIN_GATHER3ALTDIV8SI);
967
968 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scattersiv8sf",
969 tcode: VOID_FTYPE_PVOID_QI_V8SI_V8SF_INT,
970 code: IX86_BUILTIN_SCATTERSIV8SF);
971
972 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scattersiv4sf",
973 tcode: VOID_FTYPE_PVOID_QI_V4SI_V4SF_INT,
974 code: IX86_BUILTIN_SCATTERSIV4SF);
975
976 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scattersiv4df",
977 tcode: VOID_FTYPE_PVOID_QI_V4SI_V4DF_INT,
978 code: IX86_BUILTIN_SCATTERSIV4DF);
979
980 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scattersiv2df",
981 tcode: VOID_FTYPE_PVOID_QI_V4SI_V2DF_INT,
982 code: IX86_BUILTIN_SCATTERSIV2DF);
983
984 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatterdiv8sf",
985 tcode: VOID_FTYPE_PVOID_QI_V4DI_V4SF_INT,
986 code: IX86_BUILTIN_SCATTERDIV8SF);
987
988 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatterdiv4sf",
989 tcode: VOID_FTYPE_PVOID_QI_V2DI_V4SF_INT,
990 code: IX86_BUILTIN_SCATTERDIV4SF);
991
992 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatterdiv4df",
993 tcode: VOID_FTYPE_PVOID_QI_V4DI_V4DF_INT,
994 code: IX86_BUILTIN_SCATTERDIV4DF);
995
996 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatterdiv2df",
997 tcode: VOID_FTYPE_PVOID_QI_V2DI_V2DF_INT,
998 code: IX86_BUILTIN_SCATTERDIV2DF);
999
1000 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scattersiv8si",
1001 tcode: VOID_FTYPE_PVOID_QI_V8SI_V8SI_INT,
1002 code: IX86_BUILTIN_SCATTERSIV8SI);
1003
1004 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scattersiv4si",
1005 tcode: VOID_FTYPE_PVOID_QI_V4SI_V4SI_INT,
1006 code: IX86_BUILTIN_SCATTERSIV4SI);
1007
1008 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scattersiv4di",
1009 tcode: VOID_FTYPE_PVOID_QI_V4SI_V4DI_INT,
1010 code: IX86_BUILTIN_SCATTERSIV4DI);
1011
1012 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scattersiv2di",
1013 tcode: VOID_FTYPE_PVOID_QI_V4SI_V2DI_INT,
1014 code: IX86_BUILTIN_SCATTERSIV2DI);
1015
1016 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatterdiv8si",
1017 tcode: VOID_FTYPE_PVOID_QI_V4DI_V4SI_INT,
1018 code: IX86_BUILTIN_SCATTERDIV8SI);
1019
1020 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatterdiv4si",
1021 tcode: VOID_FTYPE_PVOID_QI_V2DI_V4SI_INT,
1022 code: IX86_BUILTIN_SCATTERDIV4SI);
1023
1024 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatterdiv4di",
1025 tcode: VOID_FTYPE_PVOID_QI_V4DI_V4DI_INT,
1026 code: IX86_BUILTIN_SCATTERDIV4DI);
1027
1028 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatterdiv2di",
1029 tcode: VOID_FTYPE_PVOID_QI_V2DI_V2DI_INT,
1030 code: IX86_BUILTIN_SCATTERDIV2DI);
1031
1032 def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
1033 name: "__builtin_ia32_scatteraltsiv8df ",
1034 tcode: VOID_FTYPE_PDOUBLE_QI_V16SI_V8DF_INT,
1035 code: IX86_BUILTIN_SCATTERALTSIV8DF);
1036
1037 def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
1038 name: "__builtin_ia32_scatteraltdiv16sf ",
1039 tcode: VOID_FTYPE_PFLOAT_HI_V8DI_V16SF_INT,
1040 code: IX86_BUILTIN_SCATTERALTDIV16SF);
1041
1042 def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
1043 name: "__builtin_ia32_scatteraltsiv8di ",
1044 tcode: VOID_FTYPE_PLONGLONG_QI_V16SI_V8DI_INT,
1045 code: IX86_BUILTIN_SCATTERALTSIV8DI);
1046
1047 def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
1048 name: "__builtin_ia32_scatteraltdiv16si ",
1049 tcode: VOID_FTYPE_PINT_HI_V8DI_V16SI_INT,
1050 code: IX86_BUILTIN_SCATTERALTDIV16SI);
1051
1052 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatteraltsiv4df ",
1053 tcode: VOID_FTYPE_PDOUBLE_QI_V8SI_V4DF_INT,
1054 code: IX86_BUILTIN_SCATTERALTSIV4DF);
1055
1056 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatteraltdiv8sf ",
1057 tcode: VOID_FTYPE_PFLOAT_QI_V4DI_V8SF_INT,
1058 code: IX86_BUILTIN_SCATTERALTDIV8SF);
1059
1060 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatteraltsiv4di ",
1061 tcode: VOID_FTYPE_PLONGLONG_QI_V8SI_V4DI_INT,
1062 code: IX86_BUILTIN_SCATTERALTSIV4DI);
1063
1064 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatteraltdiv8si ",
1065 tcode: VOID_FTYPE_PINT_QI_V4DI_V8SI_INT,
1066 code: IX86_BUILTIN_SCATTERALTDIV8SI);
1067
1068 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatteraltsiv2df ",
1069 tcode: VOID_FTYPE_PDOUBLE_QI_V4SI_V2DF_INT,
1070 code: IX86_BUILTIN_SCATTERALTSIV2DF);
1071
1072 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatteraltdiv4sf ",
1073 tcode: VOID_FTYPE_PFLOAT_QI_V2DI_V4SF_INT,
1074 code: IX86_BUILTIN_SCATTERALTDIV4SF);
1075
1076 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatteraltsiv2di ",
1077 tcode: VOID_FTYPE_PLONGLONG_QI_V4SI_V2DI_INT,
1078 code: IX86_BUILTIN_SCATTERALTSIV2DI);
1079
1080 def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatteraltdiv4si ",
1081 tcode: VOID_FTYPE_PINT_QI_V2DI_V4SI_INT,
1082 code: IX86_BUILTIN_SCATTERALTDIV4SI);
1083
1084 /* AVX512PF */
1085 def_builtin (OPTION_MASK_ISA_AVX512PF, mask2: 0, name: "__builtin_ia32_gatherpfdpd",
1086 tcode: VOID_FTYPE_QI_V8SI_PCVOID_INT_INT,
1087 code: IX86_BUILTIN_GATHERPFDPD);
1088 def_builtin (OPTION_MASK_ISA_AVX512PF, mask2: 0, name: "__builtin_ia32_gatherpfdps",
1089 tcode: VOID_FTYPE_HI_V16SI_PCVOID_INT_INT,
1090 code: IX86_BUILTIN_GATHERPFDPS);
1091 def_builtin (OPTION_MASK_ISA_AVX512PF, mask2: 0, name: "__builtin_ia32_gatherpfqpd",
1092 tcode: VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
1093 code: IX86_BUILTIN_GATHERPFQPD);
1094 def_builtin (OPTION_MASK_ISA_AVX512PF, mask2: 0, name: "__builtin_ia32_gatherpfqps",
1095 tcode: VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
1096 code: IX86_BUILTIN_GATHERPFQPS);
1097 def_builtin (OPTION_MASK_ISA_AVX512PF, mask2: 0, name: "__builtin_ia32_scatterpfdpd",
1098 tcode: VOID_FTYPE_QI_V8SI_PCVOID_INT_INT,
1099 code: IX86_BUILTIN_SCATTERPFDPD);
1100 def_builtin (OPTION_MASK_ISA_AVX512PF, mask2: 0, name: "__builtin_ia32_scatterpfdps",
1101 tcode: VOID_FTYPE_HI_V16SI_PCVOID_INT_INT,
1102 code: IX86_BUILTIN_SCATTERPFDPS);
1103 def_builtin (OPTION_MASK_ISA_AVX512PF, mask2: 0, name: "__builtin_ia32_scatterpfqpd",
1104 tcode: VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
1105 code: IX86_BUILTIN_SCATTERPFQPD);
1106 def_builtin (OPTION_MASK_ISA_AVX512PF, mask2: 0, name: "__builtin_ia32_scatterpfqps",
1107 tcode: VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
1108 code: IX86_BUILTIN_SCATTERPFQPS);
1109
1110 /* SHA */
1111 def_builtin_const (OPTION_MASK_ISA_SHA, mask2: 0, name: "__builtin_ia32_sha1msg1",
1112 tcode: V4SI_FTYPE_V4SI_V4SI, code: IX86_BUILTIN_SHA1MSG1);
1113 def_builtin_const (OPTION_MASK_ISA_SHA, mask2: 0, name: "__builtin_ia32_sha1msg2",
1114 tcode: V4SI_FTYPE_V4SI_V4SI, code: IX86_BUILTIN_SHA1MSG2);
1115 def_builtin_const (OPTION_MASK_ISA_SHA, mask2: 0, name: "__builtin_ia32_sha1nexte",
1116 tcode: V4SI_FTYPE_V4SI_V4SI, code: IX86_BUILTIN_SHA1NEXTE);
1117 def_builtin_const (OPTION_MASK_ISA_SHA, mask2: 0, name: "__builtin_ia32_sha1rnds4",
1118 tcode: V4SI_FTYPE_V4SI_V4SI_INT, code: IX86_BUILTIN_SHA1RNDS4);
1119 def_builtin_const (OPTION_MASK_ISA_SHA, mask2: 0, name: "__builtin_ia32_sha256msg1",
1120 tcode: V4SI_FTYPE_V4SI_V4SI, code: IX86_BUILTIN_SHA256MSG1);
1121 def_builtin_const (OPTION_MASK_ISA_SHA, mask2: 0, name: "__builtin_ia32_sha256msg2",
1122 tcode: V4SI_FTYPE_V4SI_V4SI, code: IX86_BUILTIN_SHA256MSG2);
1123 def_builtin_const (OPTION_MASK_ISA_SHA, mask2: 0, name: "__builtin_ia32_sha256rnds2",
1124 tcode: V4SI_FTYPE_V4SI_V4SI_V4SI, code: IX86_BUILTIN_SHA256RNDS2);
1125
1126 /* RTM. */
1127 def_builtin (OPTION_MASK_ISA_RTM, mask2: 0, name: "__builtin_ia32_xabort",
1128 tcode: VOID_FTYPE_UNSIGNED, code: IX86_BUILTIN_XABORT);
1129
1130 /* MMX access to the vec_init patterns. */
1131 def_builtin_const (OPTION_MASK_ISA_MMX, mask2: 0,
1132 name: "__builtin_ia32_vec_init_v2si",
1133 tcode: V2SI_FTYPE_INT_INT, code: IX86_BUILTIN_VEC_INIT_V2SI);
1134
1135 def_builtin_const (OPTION_MASK_ISA_MMX, mask2: 0,
1136 name: "__builtin_ia32_vec_init_v4hi",
1137 tcode: V4HI_FTYPE_HI_HI_HI_HI,
1138 code: IX86_BUILTIN_VEC_INIT_V4HI);
1139
1140 def_builtin_const (OPTION_MASK_ISA_MMX, mask2: 0,
1141 name: "__builtin_ia32_vec_init_v8qi",
1142 tcode: V8QI_FTYPE_QI_QI_QI_QI_QI_QI_QI_QI,
1143 code: IX86_BUILTIN_VEC_INIT_V8QI);
1144
1145 /* Access to the vec_extract patterns. */
1146 def_builtin_const (OPTION_MASK_ISA_SSE2, mask2: 0, name: "__builtin_ia32_vec_ext_v2df",
1147 tcode: DOUBLE_FTYPE_V2DF_INT, code: IX86_BUILTIN_VEC_EXT_V2DF);
1148 def_builtin_const (OPTION_MASK_ISA_SSE2, mask2: 0, name: "__builtin_ia32_vec_ext_v2di",
1149 tcode: DI_FTYPE_V2DI_INT, code: IX86_BUILTIN_VEC_EXT_V2DI);
1150 def_builtin_const (OPTION_MASK_ISA_SSE, mask2: 0, name: "__builtin_ia32_vec_ext_v4sf",
1151 tcode: FLOAT_FTYPE_V4SF_INT, code: IX86_BUILTIN_VEC_EXT_V4SF);
1152 def_builtin_const (OPTION_MASK_ISA_SSE2, mask2: 0, name: "__builtin_ia32_vec_ext_v4si",
1153 tcode: SI_FTYPE_V4SI_INT, code: IX86_BUILTIN_VEC_EXT_V4SI);
1154 def_builtin_const (OPTION_MASK_ISA_SSE2, mask2: 0, name: "__builtin_ia32_vec_ext_v8hi",
1155 tcode: HI_FTYPE_V8HI_INT, code: IX86_BUILTIN_VEC_EXT_V8HI);
1156
1157 def_builtin_const (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
1158 /* As it uses V4HImode, we have to require -mmmx too. */
1159 | OPTION_MASK_ISA_MMX, mask2: 0,
1160 name: "__builtin_ia32_vec_ext_v4hi",
1161 tcode: HI_FTYPE_V4HI_INT, code: IX86_BUILTIN_VEC_EXT_V4HI);
1162
1163 def_builtin_const (OPTION_MASK_ISA_MMX, mask2: 0,
1164 name: "__builtin_ia32_vec_ext_v2si",
1165 tcode: SI_FTYPE_V2SI_INT, code: IX86_BUILTIN_VEC_EXT_V2SI);
1166
1167 def_builtin_const (OPTION_MASK_ISA_SSE2, mask2: 0, name: "__builtin_ia32_vec_ext_v16qi",
1168 tcode: QI_FTYPE_V16QI_INT, code: IX86_BUILTIN_VEC_EXT_V16QI);
1169
1170 /* Access to the vec_set patterns. */
1171 def_builtin_const (OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_64BIT, mask2: 0,
1172 name: "__builtin_ia32_vec_set_v2di",
1173 tcode: V2DI_FTYPE_V2DI_DI_INT, code: IX86_BUILTIN_VEC_SET_V2DI);
1174
1175 def_builtin_const (OPTION_MASK_ISA_SSE4_1, mask2: 0, name: "__builtin_ia32_vec_set_v4sf",
1176 tcode: V4SF_FTYPE_V4SF_FLOAT_INT, code: IX86_BUILTIN_VEC_SET_V4SF);
1177
1178 def_builtin_const (OPTION_MASK_ISA_SSE4_1, mask2: 0, name: "__builtin_ia32_vec_set_v4si",
1179 tcode: V4SI_FTYPE_V4SI_SI_INT, code: IX86_BUILTIN_VEC_SET_V4SI);
1180
1181 def_builtin_const (OPTION_MASK_ISA_SSE2, mask2: 0, name: "__builtin_ia32_vec_set_v8hi",
1182 tcode: V8HI_FTYPE_V8HI_HI_INT, code: IX86_BUILTIN_VEC_SET_V8HI);
1183
1184 def_builtin_const (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
1185 /* As it uses V4HImode, we have to require -mmmx too. */
1186 | OPTION_MASK_ISA_MMX, mask2: 0,
1187 name: "__builtin_ia32_vec_set_v4hi",
1188 tcode: V4HI_FTYPE_V4HI_HI_INT, code: IX86_BUILTIN_VEC_SET_V4HI);
1189
1190 def_builtin_const (OPTION_MASK_ISA_SSE4_1, mask2: 0, name: "__builtin_ia32_vec_set_v16qi",
1191 tcode: V16QI_FTYPE_V16QI_QI_INT, code: IX86_BUILTIN_VEC_SET_V16QI);
1192
1193 /* RDSEED */
1194 def_builtin (OPTION_MASK_ISA_RDSEED, mask2: 0, name: "__builtin_ia32_rdseed_hi_step",
1195 tcode: INT_FTYPE_PUSHORT, code: IX86_BUILTIN_RDSEED16_STEP);
1196 def_builtin (OPTION_MASK_ISA_RDSEED, mask2: 0, name: "__builtin_ia32_rdseed_si_step",
1197 tcode: INT_FTYPE_PUNSIGNED, code: IX86_BUILTIN_RDSEED32_STEP);
1198 def_builtin (OPTION_MASK_ISA_RDSEED | OPTION_MASK_ISA_64BIT, mask2: 0,
1199 name: "__builtin_ia32_rdseed_di_step",
1200 tcode: INT_FTYPE_PULONGLONG, code: IX86_BUILTIN_RDSEED64_STEP);
1201
1202 /* ADCX */
1203 def_builtin (mask: 0, mask2: 0, name: "__builtin_ia32_addcarryx_u32",
1204 tcode: UCHAR_FTYPE_UCHAR_UINT_UINT_PUNSIGNED, code: IX86_BUILTIN_ADDCARRYX32);
1205 def_builtin (OPTION_MASK_ISA_64BIT, mask2: 0,
1206 name: "__builtin_ia32_addcarryx_u64",
1207 tcode: UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PULONGLONG,
1208 code: IX86_BUILTIN_ADDCARRYX64);
1209
1210 /* SBB */
1211 def_builtin (mask: 0, mask2: 0, name: "__builtin_ia32_sbb_u32",
1212 tcode: UCHAR_FTYPE_UCHAR_UINT_UINT_PUNSIGNED, code: IX86_BUILTIN_SBB32);
1213 def_builtin (OPTION_MASK_ISA_64BIT, mask2: 0,
1214 name: "__builtin_ia32_sbb_u64",
1215 tcode: UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PULONGLONG,
1216 code: IX86_BUILTIN_SBB64);
1217
1218 /* Read/write FLAGS. */
1219 if (TARGET_64BIT)
1220 {
1221 def_builtin (OPTION_MASK_ISA_64BIT, mask2: 0, name: "__builtin_ia32_readeflags_u64",
1222 tcode: UINT64_FTYPE_VOID, code: IX86_BUILTIN_READ_FLAGS);
1223 def_builtin (OPTION_MASK_ISA_64BIT, mask2: 0, name: "__builtin_ia32_writeeflags_u64",
1224 tcode: VOID_FTYPE_UINT64, code: IX86_BUILTIN_WRITE_FLAGS);
1225 }
1226 else
1227 {
1228 def_builtin (mask: 0, mask2: 0, name: "__builtin_ia32_readeflags_u32",
1229 tcode: UNSIGNED_FTYPE_VOID, code: IX86_BUILTIN_READ_FLAGS);
1230 def_builtin (mask: 0, mask2: 0, name: "__builtin_ia32_writeeflags_u32",
1231 tcode: VOID_FTYPE_UNSIGNED, code: IX86_BUILTIN_WRITE_FLAGS);
1232 }
1233
1234 /* CLFLUSHOPT. */
1235 def_builtin (OPTION_MASK_ISA_CLFLUSHOPT, mask2: 0, name: "__builtin_ia32_clflushopt",
1236 tcode: VOID_FTYPE_PCVOID, code: IX86_BUILTIN_CLFLUSHOPT);
1237
1238 /* CLWB. */
1239 def_builtin (OPTION_MASK_ISA_CLWB, mask2: 0, name: "__builtin_ia32_clwb",
1240 tcode: VOID_FTYPE_PCVOID, code: IX86_BUILTIN_CLWB);
1241
1242 /* MONITORX and MWAITX. */
1243 def_builtin (mask: 0, OPTION_MASK_ISA2_MWAITX, name: "__builtin_ia32_monitorx",
1244 tcode: VOID_FTYPE_PCVOID_UNSIGNED_UNSIGNED, code: IX86_BUILTIN_MONITORX);
1245 def_builtin (mask: 0, OPTION_MASK_ISA2_MWAITX, name: "__builtin_ia32_mwaitx",
1246 tcode: VOID_FTYPE_UNSIGNED_UNSIGNED_UNSIGNED, code: IX86_BUILTIN_MWAITX);
1247
1248 /* CLZERO. */
1249 def_builtin (mask: 0, OPTION_MASK_ISA2_CLZERO, name: "__builtin_ia32_clzero",
1250 tcode: VOID_FTYPE_PCVOID, code: IX86_BUILTIN_CLZERO);
1251
1252 /* WAITPKG. */
1253 def_builtin (mask: 0, OPTION_MASK_ISA2_WAITPKG, name: "__builtin_ia32_umonitor",
1254 tcode: VOID_FTYPE_PVOID, code: IX86_BUILTIN_UMONITOR);
1255 def_builtin (mask: 0, OPTION_MASK_ISA2_WAITPKG, name: "__builtin_ia32_umwait",
1256 tcode: UINT8_FTYPE_UNSIGNED_UINT64, code: IX86_BUILTIN_UMWAIT);
1257 def_builtin (mask: 0, OPTION_MASK_ISA2_WAITPKG, name: "__builtin_ia32_tpause",
1258 tcode: UINT8_FTYPE_UNSIGNED_UINT64, code: IX86_BUILTIN_TPAUSE);
1259
1260 /* UINTR. */
1261 def_builtin (OPTION_MASK_ISA_64BIT, OPTION_MASK_ISA2_UINTR,
1262 name: "__builtin_ia32_testui",
1263 tcode: UINT8_FTYPE_VOID, code: IX86_BUILTIN_TESTUI);
1264
1265 /* USER_MSR. */
1266 def_builtin (OPTION_MASK_ISA_64BIT, OPTION_MASK_ISA2_USER_MSR,
1267 name: "__builtin_ia32_urdmsr", tcode: UINT64_FTYPE_UINT64,
1268 code: IX86_BUILTIN_URDMSR);
1269 def_builtin (OPTION_MASK_ISA_64BIT, OPTION_MASK_ISA2_USER_MSR,
1270 name: "__builtin_ia32_uwrmsr", tcode: VOID_FTYPE_UINT64_UINT64,
1271 code: IX86_BUILTIN_UWRMSR);
1272
1273 /* CLDEMOTE. */
1274 def_builtin (mask: 0, OPTION_MASK_ISA2_CLDEMOTE, name: "__builtin_ia32_cldemote",
1275 tcode: VOID_FTYPE_PCVOID, code: IX86_BUILTIN_CLDEMOTE);
1276
1277 /* Add FMA4 multi-arg argument instructions */
1278 for (i = 0, d = bdesc_multi_arg; i < ARRAY_SIZE (bdesc_multi_arg); i++, d++)
1279 {
1280 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_MULTI_ARG_FIRST, i);
1281 if (d->name == 0)
1282 continue;
1283
1284 ftype = (enum ix86_builtin_func_type) d->flag;
1285 def_builtin_const (mask: d->mask, mask2: d->mask2, name: d->name, tcode: ftype, code: d->code);
1286 }
1287 BDESC_VERIFYS (IX86_BUILTIN__BDESC_MULTI_ARG_LAST,
1288 IX86_BUILTIN__BDESC_MULTI_ARG_FIRST,
1289 ARRAY_SIZE (bdesc_multi_arg) - 1);
1290
1291 /* Add CET inrinsics. */
1292 for (i = 0, d = bdesc_cet; i < ARRAY_SIZE (bdesc_cet); i++, d++)
1293 {
1294 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_CET_FIRST, i);
1295 if (d->name == 0)
1296 continue;
1297
1298 ftype = (enum ix86_builtin_func_type) d->flag;
1299 def_builtin (mask: d->mask, mask2: d->mask2, name: d->name, tcode: ftype, code: d->code);
1300 }
1301 BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_LAST,
1302 IX86_BUILTIN__BDESC_CET_FIRST,
1303 ARRAY_SIZE (bdesc_cet) - 1);
1304}
1305
1306#undef BDESC_VERIFY
1307#undef BDESC_VERIFYS
1308
1309/* Make builtins to detect cpu type and features supported. NAME is
1310 the builtin name, CODE is the builtin code, and FTYPE is the function
1311 type of the builtin. */
1312
1313static void
1314make_cpu_type_builtin (const char* name, int code,
1315 enum ix86_builtin_func_type ftype, bool is_const)
1316{
1317 tree decl;
1318 tree type;
1319
1320 type = ix86_get_builtin_func_type (tcode: ftype);
1321 decl = add_builtin_function (name, type, function_code: code, cl: BUILT_IN_MD,
1322 NULL, NULL_TREE);
1323 gcc_assert (decl != NULL_TREE);
1324 ix86_builtins[(int) code] = decl;
1325 TREE_READONLY (decl) = is_const;
1326}
1327
1328/* Make builtins to get CPU type and features supported. The created
1329 builtins are :
1330
1331 __builtin_cpu_init (), to detect cpu type and features,
1332 __builtin_cpu_is ("<CPUNAME>"), to check if cpu is of type <CPUNAME>,
1333 __builtin_cpu_supports ("<FEATURE>"), to check if cpu supports <FEATURE>
1334 */
1335
1336static void
1337ix86_init_platform_type_builtins (void)
1338{
1339 make_cpu_type_builtin (name: "__builtin_cpu_init", code: IX86_BUILTIN_CPU_INIT,
1340 ftype: INT_FTYPE_VOID, is_const: false);
1341 make_cpu_type_builtin (name: "__builtin_cpu_is", code: IX86_BUILTIN_CPU_IS,
1342 ftype: INT_FTYPE_PCCHAR, is_const: true);
1343 make_cpu_type_builtin (name: "__builtin_cpu_supports", code: IX86_BUILTIN_CPU_SUPPORTS,
1344 ftype: INT_FTYPE_PCCHAR, is_const: true);
1345}
1346
1347/* Internal method for ix86_init_builtins. */
1348
1349static void
1350ix86_init_builtins_va_builtins_abi (void)
1351{
1352 tree ms_va_ref, sysv_va_ref;
1353 tree fnvoid_va_end_ms, fnvoid_va_end_sysv;
1354 tree fnvoid_va_start_ms, fnvoid_va_start_sysv;
1355 tree fnvoid_va_copy_ms, fnvoid_va_copy_sysv;
1356 tree fnattr_ms = NULL_TREE, fnattr_sysv = NULL_TREE;
1357
1358 if (!TARGET_64BIT)
1359 return;
1360 fnattr_ms = build_tree_list (get_identifier ("ms_abi"), NULL_TREE);
1361 fnattr_sysv = build_tree_list (get_identifier ("sysv_abi"), NULL_TREE);
1362 ms_va_ref = build_reference_type (ms_va_list_type_node);
1363 sysv_va_ref = build_pointer_type (TREE_TYPE (sysv_va_list_type_node));
1364
1365 fnvoid_va_end_ms = build_function_type_list (void_type_node, ms_va_ref,
1366 NULL_TREE);
1367 fnvoid_va_start_ms
1368 = build_varargs_function_type_list (void_type_node, ms_va_ref, NULL_TREE);
1369 fnvoid_va_end_sysv
1370 = build_function_type_list (void_type_node, sysv_va_ref, NULL_TREE);
1371 fnvoid_va_start_sysv
1372 = build_varargs_function_type_list (void_type_node, sysv_va_ref,
1373 NULL_TREE);
1374 fnvoid_va_copy_ms
1375 = build_function_type_list (void_type_node, ms_va_ref,
1376 ms_va_list_type_node, NULL_TREE);
1377 fnvoid_va_copy_sysv
1378 = build_function_type_list (void_type_node, sysv_va_ref,
1379 sysv_va_ref, NULL_TREE);
1380
1381 add_builtin_function (name: "__builtin_ms_va_start", type: fnvoid_va_start_ms,
1382 function_code: BUILT_IN_VA_START, cl: BUILT_IN_NORMAL, NULL, attrs: fnattr_ms);
1383 add_builtin_function (name: "__builtin_ms_va_end", type: fnvoid_va_end_ms,
1384 function_code: BUILT_IN_VA_END, cl: BUILT_IN_NORMAL, NULL, attrs: fnattr_ms);
1385 add_builtin_function (name: "__builtin_ms_va_copy", type: fnvoid_va_copy_ms,
1386 function_code: BUILT_IN_VA_COPY, cl: BUILT_IN_NORMAL, NULL, attrs: fnattr_ms);
1387 add_builtin_function (name: "__builtin_sysv_va_start", type: fnvoid_va_start_sysv,
1388 function_code: BUILT_IN_VA_START, cl: BUILT_IN_NORMAL, NULL, attrs: fnattr_sysv);
1389 add_builtin_function (name: "__builtin_sysv_va_end", type: fnvoid_va_end_sysv,
1390 function_code: BUILT_IN_VA_END, cl: BUILT_IN_NORMAL, NULL, attrs: fnattr_sysv);
1391 add_builtin_function (name: "__builtin_sysv_va_copy", type: fnvoid_va_copy_sysv,
1392 function_code: BUILT_IN_VA_COPY, cl: BUILT_IN_NORMAL, NULL, attrs: fnattr_sysv);
1393}
1394
1395static void
1396ix86_register_float16_builtin_type (void)
1397{
1398 /* Provide the _Float16 type and float16_type_node if needed so that
1399 it can be used in AVX512FP16 intrinsics and builtins. */
1400 if (!float16_type_node)
1401 {
1402 ix86_float16_type_node = make_node (REAL_TYPE);
1403 TYPE_PRECISION (ix86_float16_type_node) = 16;
1404 SET_TYPE_MODE (ix86_float16_type_node, HFmode);
1405 layout_type (ix86_float16_type_node);
1406 }
1407 else
1408 ix86_float16_type_node = float16_type_node;
1409
1410 if (!maybe_get_identifier ("_Float16"))
1411 lang_hooks.types.register_builtin_type (ix86_float16_type_node,
1412 "_Float16");
1413}
1414
1415static void
1416ix86_register_bf16_builtin_type (void)
1417{
1418 if (bfloat16_type_node == NULL_TREE)
1419 {
1420 ix86_bf16_type_node = make_node (REAL_TYPE);
1421 TYPE_PRECISION (ix86_bf16_type_node) = 16;
1422 SET_TYPE_MODE (ix86_bf16_type_node, BFmode);
1423 layout_type (ix86_bf16_type_node);
1424 }
1425 else
1426 ix86_bf16_type_node = bfloat16_type_node;
1427
1428 if (!maybe_get_identifier ("__bf16"))
1429 lang_hooks.types.register_builtin_type (ix86_bf16_type_node, "__bf16");
1430}
1431
1432static void
1433ix86_init_builtin_types (void)
1434{
1435 tree float80_type_node, const_string_type_node;
1436
1437 /* The __float80 type. */
1438 float80_type_node = long_double_type_node;
1439 if (TYPE_MODE (float80_type_node) != XFmode)
1440 {
1441 if (float64x_type_node != NULL_TREE
1442 && TYPE_MODE (float64x_type_node) == XFmode)
1443 float80_type_node = float64x_type_node;
1444 else
1445 {
1446 /* The __float80 type. */
1447 float80_type_node = make_node (REAL_TYPE);
1448
1449 TYPE_PRECISION (float80_type_node) = 80;
1450 layout_type (float80_type_node);
1451 }
1452 }
1453 lang_hooks.types.register_builtin_type (float80_type_node, "__float80");
1454
1455 /* The __float128 type. The node has already been created as
1456 _Float128, so for C we only need to register the __float128 name for
1457 it. For C++, we create a distinct type which will mangle differently
1458 (g) vs. _Float128 (DF128_) and behave backwards compatibly. */
1459 if (float128t_type_node == NULL_TREE)
1460 {
1461 float128t_type_node = make_node (REAL_TYPE);
1462 TYPE_PRECISION (float128t_type_node)
1463 = TYPE_PRECISION (float128_type_node);
1464 SET_TYPE_MODE (float128t_type_node, TYPE_MODE (float128_type_node));
1465 layout_type (float128t_type_node);
1466 }
1467 lang_hooks.types.register_builtin_type (float128t_type_node, "__float128");
1468
1469 ix86_register_float16_builtin_type ();
1470
1471 ix86_register_bf16_builtin_type ();
1472
1473 const_string_type_node
1474 = build_pointer_type (build_qualified_type
1475 (char_type_node, TYPE_QUAL_CONST));
1476
1477 /* This macro is built by i386-builtin-types.awk. */
1478 DEFINE_BUILTIN_PRIMITIVE_TYPES;
1479}
1480
1481void
1482ix86_init_builtins (void)
1483{
1484 tree ftype, decl;
1485
1486 ix86_init_builtin_types ();
1487
1488 /* Builtins to get CPU type and features. */
1489 ix86_init_platform_type_builtins ();
1490
1491 /* TFmode support builtins. */
1492 def_builtin_const (mask: 0, mask2: 0, name: "__builtin_infq",
1493 tcode: FLOAT128_FTYPE_VOID, code: IX86_BUILTIN_INFQ);
1494 def_builtin_const (mask: 0, mask2: 0, name: "__builtin_huge_valq",
1495 tcode: FLOAT128_FTYPE_VOID, code: IX86_BUILTIN_HUGE_VALQ);
1496
1497 ftype = ix86_get_builtin_func_type (tcode: FLOAT128_FTYPE_CONST_STRING);
1498 decl = add_builtin_function (name: "__builtin_nanq", type: ftype, function_code: IX86_BUILTIN_NANQ,
1499 cl: BUILT_IN_MD, library_name: "nanq", NULL_TREE);
1500 TREE_READONLY (decl) = 1;
1501 ix86_builtins[(int) IX86_BUILTIN_NANQ] = decl;
1502
1503 decl = add_builtin_function (name: "__builtin_nansq", type: ftype, function_code: IX86_BUILTIN_NANSQ,
1504 cl: BUILT_IN_MD, library_name: "nansq", NULL_TREE);
1505 TREE_READONLY (decl) = 1;
1506 ix86_builtins[(int) IX86_BUILTIN_NANSQ] = decl;
1507
1508 /* We will expand them to normal call if SSE isn't available since
1509 they are used by libgcc. */
1510 ftype = ix86_get_builtin_func_type (tcode: FLOAT128_FTYPE_FLOAT128);
1511 decl = add_builtin_function (name: "__builtin_fabsq", type: ftype, function_code: IX86_BUILTIN_FABSQ,
1512 cl: BUILT_IN_MD, library_name: "__fabstf2", NULL_TREE);
1513 TREE_READONLY (decl) = 1;
1514 ix86_builtins[(int) IX86_BUILTIN_FABSQ] = decl;
1515
1516 ftype = ix86_get_builtin_func_type (tcode: FLOAT128_FTYPE_FLOAT128_FLOAT128);
1517 decl = add_builtin_function (name: "__builtin_copysignq", type: ftype,
1518 function_code: IX86_BUILTIN_COPYSIGNQ, cl: BUILT_IN_MD,
1519 library_name: "__copysigntf3", NULL_TREE);
1520 TREE_READONLY (decl) = 1;
1521 ix86_builtins[(int) IX86_BUILTIN_COPYSIGNQ] = decl;
1522
1523 ix86_init_tm_builtins ();
1524 ix86_init_mmx_sse_builtins ();
1525
1526 if (TARGET_LP64)
1527 ix86_init_builtins_va_builtins_abi ();
1528
1529#ifdef SUBTARGET_INIT_BUILTINS
1530 SUBTARGET_INIT_BUILTINS;
1531#endif
1532}
1533
1534/* Return the ix86 builtin for CODE. */
1535
1536tree
1537ix86_builtin_decl (unsigned code, bool)
1538{
1539 if (code >= IX86_BUILTIN_MAX)
1540 return error_mark_node;
1541
1542 return ix86_builtins[code];
1543}
1544
1545/* This returns the target-specific builtin with code CODE if
1546 current_function_decl has visibility on this builtin, which is checked
1547 using isa flags. Returns NULL_TREE otherwise. */
1548
1549static tree ix86_get_builtin (enum ix86_builtins code)
1550{
1551 struct cl_target_option *opts;
1552 tree target_tree = NULL_TREE;
1553
1554 /* Determine the isa flags of current_function_decl. */
1555
1556 if (current_function_decl)
1557 target_tree = DECL_FUNCTION_SPECIFIC_TARGET (current_function_decl);
1558
1559 if (target_tree == NULL)
1560 target_tree = target_option_default_node;
1561
1562 opts = TREE_TARGET_OPTION (target_tree);
1563
1564 if ((ix86_builtins_isa[(int) code].isa & opts->x_ix86_isa_flags)
1565 || (ix86_builtins_isa[(int) code].isa2 & opts->x_ix86_isa_flags2))
1566 return ix86_builtin_decl (code, true);
1567 else
1568 return NULL_TREE;
1569}
1570
1571/* Vectorization library interface and handlers. */
1572tree (*ix86_veclib_handler) (combined_fn, tree, tree);
1573
1574/* Returns a function decl for a vectorized version of the combined function
1575 with combined_fn code FN and the result vector type TYPE, or NULL_TREE
1576 if it is not available. */
1577
1578tree
1579ix86_builtin_vectorized_function (unsigned int fn, tree type_out,
1580 tree type_in)
1581{
1582 machine_mode in_mode, out_mode;
1583 int in_n, out_n;
1584
1585 if (TREE_CODE (type_out) != VECTOR_TYPE
1586 || TREE_CODE (type_in) != VECTOR_TYPE)
1587 return NULL_TREE;
1588
1589 out_mode = TYPE_MODE (TREE_TYPE (type_out));
1590 out_n = TYPE_VECTOR_SUBPARTS (node: type_out);
1591 in_mode = TYPE_MODE (TREE_TYPE (type_in));
1592 in_n = TYPE_VECTOR_SUBPARTS (node: type_in);
1593
1594 switch (fn)
1595 {
1596 CASE_CFN_IFLOOR:
1597 CASE_CFN_LFLOOR:
1598 /* The round insn does not trap on denormals. */
1599 if (flag_trapping_math || !TARGET_SSE4_1)
1600 break;
1601
1602 /* PR106910, currently vectorizer doesn't go direct internal fn way
1603 when out_n != in_n, so let's still keep this.
1604 Otherwise, it relies on expander of
1605 lceilmn2/lfloormn2/lroundmn2/lrintmn2. */
1606 if (out_mode == SImode && in_mode == DFmode)
1607 {
1608 if (out_n == 4 && in_n == 2)
1609 return ix86_get_builtin (code: IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX);
1610 else if (out_n == 8 && in_n == 4)
1611 return ix86_get_builtin (code: IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX256);
1612 else if (out_n == 16 && in_n == 8)
1613 return ix86_get_builtin (code: IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX512);
1614 }
1615 break;
1616
1617 CASE_CFN_ICEIL:
1618 CASE_CFN_LCEIL:
1619 /* The round insn does not trap on denormals. */
1620 if (flag_trapping_math || !TARGET_SSE4_1)
1621 break;
1622
1623 if (out_mode == SImode && in_mode == DFmode)
1624 {
1625 if (out_n == 4 && in_n == 2)
1626 return ix86_get_builtin (code: IX86_BUILTIN_CEILPD_VEC_PACK_SFIX);
1627 else if (out_n == 8 && in_n == 4)
1628 return ix86_get_builtin (code: IX86_BUILTIN_CEILPD_VEC_PACK_SFIX256);
1629 else if (out_n == 16 && in_n == 8)
1630 return ix86_get_builtin (code: IX86_BUILTIN_CEILPD_VEC_PACK_SFIX512);
1631 }
1632 break;
1633
1634 CASE_CFN_IRINT:
1635 CASE_CFN_LRINT:
1636 if (out_mode == SImode && in_mode == DFmode)
1637 {
1638 if (out_n == 4 && in_n == 2)
1639 return ix86_get_builtin (code: IX86_BUILTIN_VEC_PACK_SFIX);
1640 else if (out_n == 8 && in_n == 4)
1641 return ix86_get_builtin (code: IX86_BUILTIN_VEC_PACK_SFIX256);
1642 else if (out_n == 16 && in_n == 8)
1643 return ix86_get_builtin (code: IX86_BUILTIN_VEC_PACK_SFIX512);
1644 }
1645 break;
1646
1647 CASE_CFN_IROUND:
1648 CASE_CFN_LROUND:
1649 /* The round insn does not trap on denormals. */
1650 if (flag_trapping_math || !TARGET_SSE4_1)
1651 break;
1652
1653 if (out_mode == SImode && in_mode == DFmode)
1654 {
1655 if (out_n == 4 && in_n == 2)
1656 return ix86_get_builtin (code: IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX);
1657 else if (out_n == 8 && in_n == 4)
1658 return ix86_get_builtin (code: IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX256);
1659 else if (out_n == 16 && in_n == 8)
1660 return ix86_get_builtin (code: IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX512);
1661 }
1662 break;
1663
1664
1665 default:
1666 break;
1667 }
1668
1669 /* Dispatch to a handler for a vectorization library. */
1670 if (ix86_veclib_handler)
1671 return ix86_veclib_handler (combined_fn (fn), type_out, type_in);
1672
1673 return NULL_TREE;
1674}
1675
1676/* Returns a decl of a function that implements gather load with
1677 memory type MEM_VECTYPE and index type INDEX_VECTYPE and SCALE.
1678 Return NULL_TREE if it is not available. */
1679
1680tree
1681ix86_vectorize_builtin_gather (const_tree mem_vectype,
1682 const_tree index_type, int scale)
1683{
1684 bool si;
1685 enum ix86_builtins code;
1686 const machine_mode mode = TYPE_MODE (TREE_TYPE (mem_vectype));
1687
1688 if ((!TARGET_AVX512F || !TARGET_EVEX512) && GET_MODE_SIZE (mode) == 64)
1689 return NULL_TREE;
1690
1691 if (! TARGET_AVX2
1692 || (known_eq (TYPE_VECTOR_SUBPARTS (mem_vectype), 2u)
1693 ? !TARGET_USE_GATHER_2PARTS
1694 : (known_eq (TYPE_VECTOR_SUBPARTS (mem_vectype), 4u)
1695 ? !TARGET_USE_GATHER_4PARTS
1696 : !TARGET_USE_GATHER_8PARTS)))
1697 return NULL_TREE;
1698
1699 if ((TREE_CODE (index_type) != INTEGER_TYPE
1700 && !POINTER_TYPE_P (index_type))
1701 || (TYPE_MODE (index_type) != SImode
1702 && TYPE_MODE (index_type) != DImode))
1703 return NULL_TREE;
1704
1705 if (TYPE_PRECISION (index_type) > POINTER_SIZE)
1706 return NULL_TREE;
1707
1708 /* v*gather* insn sign extends index to pointer mode. */
1709 if (TYPE_PRECISION (index_type) < POINTER_SIZE
1710 && TYPE_UNSIGNED (index_type))
1711 return NULL_TREE;
1712
1713 if (scale <= 0
1714 || scale > 8
1715 || (scale & (scale - 1)) != 0)
1716 return NULL_TREE;
1717
1718 si = TYPE_MODE (index_type) == SImode;
1719 switch (TYPE_MODE (mem_vectype))
1720 {
1721 case E_V2DFmode:
1722 if (TARGET_AVX512VL)
1723 code = si ? IX86_BUILTIN_GATHER3SIV2DF : IX86_BUILTIN_GATHER3DIV2DF;
1724 else
1725 code = si ? IX86_BUILTIN_GATHERSIV2DF : IX86_BUILTIN_GATHERDIV2DF;
1726 break;
1727 case E_V4DFmode:
1728 if (TARGET_AVX512VL)
1729 code = si ? IX86_BUILTIN_GATHER3ALTSIV4DF : IX86_BUILTIN_GATHER3DIV4DF;
1730 else
1731 code = si ? IX86_BUILTIN_GATHERALTSIV4DF : IX86_BUILTIN_GATHERDIV4DF;
1732 break;
1733 case E_V2DImode:
1734 if (TARGET_AVX512VL)
1735 code = si ? IX86_BUILTIN_GATHER3SIV2DI : IX86_BUILTIN_GATHER3DIV2DI;
1736 else
1737 code = si ? IX86_BUILTIN_GATHERSIV2DI : IX86_BUILTIN_GATHERDIV2DI;
1738 break;
1739 case E_V4DImode:
1740 if (TARGET_AVX512VL)
1741 code = si ? IX86_BUILTIN_GATHER3ALTSIV4DI : IX86_BUILTIN_GATHER3DIV4DI;
1742 else
1743 code = si ? IX86_BUILTIN_GATHERALTSIV4DI : IX86_BUILTIN_GATHERDIV4DI;
1744 break;
1745 case E_V4SFmode:
1746 if (TARGET_AVX512VL)
1747 code = si ? IX86_BUILTIN_GATHER3SIV4SF : IX86_BUILTIN_GATHER3DIV4SF;
1748 else
1749 code = si ? IX86_BUILTIN_GATHERSIV4SF : IX86_BUILTIN_GATHERDIV4SF;
1750 break;
1751 case E_V8SFmode:
1752 if (TARGET_AVX512VL)
1753 code = si ? IX86_BUILTIN_GATHER3SIV8SF : IX86_BUILTIN_GATHER3ALTDIV8SF;
1754 else
1755 code = si ? IX86_BUILTIN_GATHERSIV8SF : IX86_BUILTIN_GATHERALTDIV8SF;
1756 break;
1757 case E_V4SImode:
1758 if (TARGET_AVX512VL)
1759 code = si ? IX86_BUILTIN_GATHER3SIV4SI : IX86_BUILTIN_GATHER3DIV4SI;
1760 else
1761 code = si ? IX86_BUILTIN_GATHERSIV4SI : IX86_BUILTIN_GATHERDIV4SI;
1762 break;
1763 case E_V8SImode:
1764 if (TARGET_AVX512VL)
1765 code = si ? IX86_BUILTIN_GATHER3SIV8SI : IX86_BUILTIN_GATHER3ALTDIV8SI;
1766 else
1767 code = si ? IX86_BUILTIN_GATHERSIV8SI : IX86_BUILTIN_GATHERALTDIV8SI;
1768 break;
1769 case E_V8DFmode:
1770 code = si ? IX86_BUILTIN_GATHER3ALTSIV8DF : IX86_BUILTIN_GATHER3DIV8DF;
1771 break;
1772 case E_V8DImode:
1773 code = si ? IX86_BUILTIN_GATHER3ALTSIV8DI : IX86_BUILTIN_GATHER3DIV8DI;
1774 break;
1775 case E_V16SFmode:
1776 code = si ? IX86_BUILTIN_GATHER3SIV16SF : IX86_BUILTIN_GATHER3ALTDIV16SF;
1777 break;
1778 case E_V16SImode:
1779 code = si ? IX86_BUILTIN_GATHER3SIV16SI : IX86_BUILTIN_GATHER3ALTDIV16SI;
1780 break;
1781 default:
1782 return NULL_TREE;
1783 }
1784
1785 return ix86_get_builtin (code);
1786}
1787
1788/* Returns a code for a target-specific builtin that implements
1789 reciprocal of the function, or NULL_TREE if not available. */
1790
1791tree
1792ix86_builtin_reciprocal (tree fndecl)
1793{
1794 enum ix86_builtins fn_code
1795 = (enum ix86_builtins) DECL_MD_FUNCTION_CODE (decl: fndecl);
1796 switch (fn_code)
1797 {
1798 /* Vectorized version of sqrt to rsqrt conversion. */
1799 case IX86_BUILTIN_SQRTPS_NR:
1800 return ix86_get_builtin (code: IX86_BUILTIN_RSQRTPS_NR);
1801
1802 case IX86_BUILTIN_SQRTPS_NR256:
1803 return ix86_get_builtin (code: IX86_BUILTIN_RSQRTPS_NR256);
1804
1805 default:
1806 return NULL_TREE;
1807 }
1808}
1809
1810/* This parses the attribute arguments to target in DECL and determines
1811 the right builtin to use to match the platform specification.
1812 It returns the priority value for this version decl. If PREDICATE_LIST
1813 is not NULL, it stores the list of cpu features that need to be checked
1814 before dispatching this function. */
1815
1816unsigned int
1817get_builtin_code_for_version (tree decl, tree *predicate_list)
1818{
1819 tree attrs;
1820 struct cl_target_option cur_target;
1821 tree target_node;
1822 struct cl_target_option *new_target;
1823 const char *arg_str = NULL;
1824 const char *attrs_str = NULL;
1825 char *tok_str = NULL;
1826 char *token;
1827
1828 enum feature_priority priority = P_NONE;
1829
1830 static unsigned int NUM_FEATURES = ARRAY_SIZE (isa_names_table);
1831
1832 unsigned int i;
1833
1834 tree predicate_chain = NULL_TREE;
1835 tree predicate_decl, predicate_arg;
1836
1837 attrs = lookup_attribute (attr_name: "target", DECL_ATTRIBUTES (decl));
1838 gcc_assert (attrs != NULL);
1839
1840 attrs = TREE_VALUE (TREE_VALUE (attrs));
1841
1842 gcc_assert (TREE_CODE (attrs) == STRING_CST);
1843 attrs_str = TREE_STRING_POINTER (attrs);
1844
1845 /* Return priority zero for default function. */
1846 if (strcmp (s1: attrs_str, s2: "default") == 0)
1847 return 0;
1848
1849 /* Handle arch= if specified. For priority, set it to be 1 more than
1850 the best instruction set the processor can handle. For instance, if
1851 there is a version for atom and a version for ssse3 (the highest ISA
1852 priority for atom), the atom version must be checked for dispatch
1853 before the ssse3 version. */
1854 if (strstr (haystack: attrs_str, needle: "arch=") != NULL)
1855 {
1856 cl_target_option_save (&cur_target, &global_options,
1857 &global_options_set);
1858 target_node
1859 = ix86_valid_target_attribute_tree (decl, attrs, &global_options,
1860 &global_options_set, 0);
1861
1862 gcc_assert (target_node);
1863 if (target_node == error_mark_node)
1864 return 0;
1865 new_target = TREE_TARGET_OPTION (target_node);
1866 gcc_assert (new_target);
1867 enum ix86_builtins builtin_fn = IX86_BUILTIN_CPU_IS;
1868
1869 /* Special case x86-64 micro-level architectures. */
1870 const char *arch_name = attrs_str + strlen (s: "arch=");
1871 if (startswith (str: arch_name, prefix: "x86-64"))
1872 {
1873 arg_str = arch_name;
1874 builtin_fn = IX86_BUILTIN_CPU_SUPPORTS;
1875 if (strcmp (s1: arch_name, s2: "x86-64") == 0)
1876 priority = P_X86_64_BASELINE;
1877 else if (strcmp (s1: arch_name, s2: "x86-64-v2") == 0)
1878 priority = P_X86_64_V2;
1879 else if (strcmp (s1: arch_name, s2: "x86-64-v3") == 0)
1880 priority = P_X86_64_V3;
1881 else if (strcmp (s1: arch_name, s2: "x86-64-v4") == 0)
1882 priority = P_X86_64_V4;
1883 }
1884 else if (new_target->arch_specified && new_target->arch > 0)
1885 for (i = 0; i < pta_size; i++)
1886 if (processor_alias_table[i].processor == new_target->arch)
1887 {
1888 const pta *arch_info = &processor_alias_table[i];
1889 switch (arch_info->priority)
1890 {
1891 default:
1892 arg_str = arch_info->name;
1893 priority = arch_info->priority;
1894 break;
1895 case P_PROC_DYNAMIC:
1896 switch (new_target->arch)
1897 {
1898 case PROCESSOR_NEHALEM:
1899 if (TARGET_PCLMUL_P (new_target->x_ix86_isa_flags))
1900 {
1901 arg_str = "westmere";
1902 priority = P_PCLMUL;
1903 }
1904 else
1905 {
1906 /* We translate "arch=corei7" and "arch=nehalem"
1907 to "corei7" so that it will be mapped to
1908 M_INTEL_COREI7 as cpu type to cover all
1909 M_INTEL_COREI7_XXXs. */
1910 arg_str = "corei7";
1911 priority = P_PROC_SSE4_2;
1912 }
1913 break;
1914 case PROCESSOR_SANDYBRIDGE:
1915 if (TARGET_F16C_P (new_target->x_ix86_isa_flags))
1916 arg_str = "ivybridge";
1917 else
1918 arg_str = "sandybridge";
1919 priority = P_PROC_AVX;
1920 break;
1921 case PROCESSOR_HASWELL:
1922 if (TARGET_ADX_P (new_target->x_ix86_isa_flags))
1923 arg_str = "broadwell";
1924 else
1925 arg_str = "haswell";
1926 priority = P_PROC_AVX2;
1927 break;
1928 case PROCESSOR_AMDFAM10:
1929 arg_str = "amdfam10h";
1930 priority = P_PROC_SSE4_A;
1931 break;
1932 default:
1933 gcc_unreachable ();
1934 }
1935 break;
1936 case P_NONE:
1937 break;
1938 }
1939 break;
1940 }
1941
1942 cl_target_option_restore (&global_options, &global_options_set,
1943 &cur_target);
1944
1945 if (predicate_list && arg_str == NULL)
1946 {
1947 error_at (DECL_SOURCE_LOCATION (decl),
1948 "no dispatcher found for the versioning attributes");
1949 return 0;
1950 }
1951
1952 if (predicate_list)
1953 {
1954 predicate_decl = ix86_builtins [(int) builtin_fn];
1955 /* For a C string literal the length includes the trailing NULL. */
1956 predicate_arg = build_string_literal (strlen (s: arg_str) + 1, arg_str);
1957 predicate_chain = tree_cons (predicate_decl, predicate_arg,
1958 predicate_chain);
1959 }
1960 }
1961
1962 /* Process feature name. */
1963 tok_str = (char *) xmalloc (strlen (s: attrs_str) + 1);
1964 strcpy (dest: tok_str, src: attrs_str);
1965 token = strtok (s: tok_str, delim: ",");
1966 predicate_decl = ix86_builtins [(int) IX86_BUILTIN_CPU_SUPPORTS];
1967
1968 while (token != NULL)
1969 {
1970 /* Do not process "arch=" */
1971 if (startswith (str: token, prefix: "arch="))
1972 {
1973 token = strtok (NULL, delim: ",");
1974 continue;
1975 }
1976 for (i = 0; i < NUM_FEATURES; ++i)
1977 {
1978 if (strcmp (s1: token, s2: isa_names_table[i].name) == 0)
1979 {
1980 if (predicate_list)
1981 {
1982 predicate_arg = build_string_literal (
1983 strlen (s: isa_names_table[i].name) + 1,
1984 isa_names_table[i].name);
1985 predicate_chain = tree_cons (predicate_decl, predicate_arg,
1986 predicate_chain);
1987 }
1988 /* Find the maximum priority feature. */
1989 if (isa_names_table[i].priority > priority)
1990 priority = isa_names_table[i].priority;
1991
1992 break;
1993 }
1994 }
1995 if (predicate_list && priority == P_NONE)
1996 {
1997 error_at (DECL_SOURCE_LOCATION (decl),
1998 "ISA %qs is not supported in %<target%> attribute, "
1999 "use %<arch=%> syntax", token);
2000 return 0;
2001 }
2002 token = strtok (NULL, delim: ",");
2003 }
2004 free (ptr: tok_str);
2005
2006 if (predicate_list && predicate_chain == NULL_TREE)
2007 {
2008 error_at (DECL_SOURCE_LOCATION (decl),
2009 "no dispatcher found for the versioning attributes: %s",
2010 attrs_str);
2011 return 0;
2012 }
2013 else if (predicate_list)
2014 {
2015 predicate_chain = nreverse (predicate_chain);
2016 *predicate_list = predicate_chain;
2017 }
2018
2019 return priority;
2020}
2021
2022/* This builds the processor_model struct type defined in
2023 libgcc/config/i386/cpuinfo.c */
2024
2025static tree
2026build_processor_model_struct (void)
2027{
2028 const char *field_name[] = {"__cpu_vendor", "__cpu_type", "__cpu_subtype",
2029 "__cpu_features"};
2030 tree field = NULL_TREE, field_chain = NULL_TREE;
2031 int i;
2032 tree type = make_node (RECORD_TYPE);
2033
2034 /* The first 3 fields are unsigned int. */
2035 for (i = 0; i < 3; ++i)
2036 {
2037 field = build_decl (UNKNOWN_LOCATION, FIELD_DECL,
2038 get_identifier (field_name[i]), unsigned_type_node);
2039 if (field_chain != NULL_TREE)
2040 DECL_CHAIN (field) = field_chain;
2041 field_chain = field;
2042 }
2043
2044 /* The last field is an array of unsigned integers of size one. */
2045 field = build_decl (UNKNOWN_LOCATION, FIELD_DECL,
2046 get_identifier (field_name[3]),
2047 build_array_type (unsigned_type_node,
2048 build_index_type (size_one_node)));
2049 if (field_chain != NULL_TREE)
2050 DECL_CHAIN (field) = field_chain;
2051 field_chain = field;
2052
2053 finish_builtin_struct (type, "__processor_model", field_chain, NULL_TREE);
2054 return type;
2055}
2056
2057/* Returns a extern, comdat VAR_DECL of type TYPE and name NAME. */
2058
2059static tree
2060make_var_decl (tree type, const char *name)
2061{
2062 tree new_decl;
2063
2064 new_decl = build_decl (UNKNOWN_LOCATION,
2065 VAR_DECL,
2066 get_identifier(name),
2067 type);
2068
2069 DECL_EXTERNAL (new_decl) = 1;
2070 TREE_STATIC (new_decl) = 1;
2071 TREE_PUBLIC (new_decl) = 1;
2072 DECL_INITIAL (new_decl) = 0;
2073 DECL_ARTIFICIAL (new_decl) = 0;
2074 DECL_PRESERVE_P (new_decl) = 1;
2075
2076 make_decl_one_only (new_decl, DECL_ASSEMBLER_NAME (new_decl));
2077 assemble_variable (new_decl, 0, 0, 0);
2078
2079 return new_decl;
2080}
2081
2082static GTY(()) tree ix86_cpu_model_type_node;
2083static GTY(()) tree ix86_cpu_model_var;
2084static GTY(()) tree ix86_cpu_features2_type_node;
2085static GTY(()) tree ix86_cpu_features2_var;
2086
2087/* FNDECL is a __builtin_cpu_is or a __builtin_cpu_supports call that is folded
2088 into an integer defined in libgcc/config/i386/cpuinfo.c */
2089
2090tree
2091fold_builtin_cpu (tree fndecl, tree *args)
2092{
2093 unsigned int i;
2094 enum ix86_builtins fn_code
2095 = (enum ix86_builtins) DECL_MD_FUNCTION_CODE (decl: fndecl);
2096 tree param_string_cst = NULL;
2097
2098 if (ix86_cpu_model_var == nullptr)
2099 {
2100 /* Build a single __cpu_model variable for all references to
2101 __cpu_model so that GIMPLE level optimizers can CSE the loads
2102 of __cpu_model and optimize bit-operations properly. */
2103 ix86_cpu_model_type_node = build_processor_model_struct ();
2104 ix86_cpu_model_var = make_var_decl (type: ix86_cpu_model_type_node,
2105 name: "__cpu_model");
2106 varpool_node::add (decl: ix86_cpu_model_var);
2107 }
2108
2109 gcc_assert ((args != NULL) && (*args != NULL));
2110
2111 param_string_cst = *args;
2112 while (param_string_cst
2113 && TREE_CODE (param_string_cst) != STRING_CST)
2114 {
2115 /* *args must be a expr that can contain other EXPRS leading to a
2116 STRING_CST. */
2117 if (!EXPR_P (param_string_cst))
2118 {
2119 error ("parameter to builtin must be a string constant or literal");
2120 return integer_zero_node;
2121 }
2122 param_string_cst = TREE_OPERAND (EXPR_CHECK (param_string_cst), 0);
2123 }
2124
2125 gcc_assert (param_string_cst);
2126
2127 if (fn_code == IX86_BUILTIN_CPU_IS)
2128 {
2129 tree ref;
2130 tree field;
2131 tree final;
2132
2133 unsigned int field_val = 0;
2134
2135 for (i = 0; i < num_arch_names; i++)
2136 if (processor_alias_table[i].model != 0
2137 && strcmp (s1: processor_alias_table[i].name,
2138 TREE_STRING_POINTER (param_string_cst)) == 0)
2139 break;
2140
2141 if (i == num_arch_names)
2142 {
2143 error ("parameter to builtin not valid: %s",
2144 TREE_STRING_POINTER (param_string_cst));
2145 return integer_zero_node;
2146 }
2147
2148 field = TYPE_FIELDS (ix86_cpu_model_type_node);
2149 field_val = processor_alias_table[i].model;
2150
2151 /* CPU types are stored in the next field. */
2152 if (field_val > M_CPU_TYPE_START
2153 && field_val < M_CPU_SUBTYPE_START)
2154 {
2155 field = DECL_CHAIN (field);
2156 field_val -= M_CPU_TYPE_START;
2157 }
2158
2159 /* CPU subtypes are stored in the next field. */
2160 if (field_val > M_CPU_SUBTYPE_START)
2161 {
2162 field = DECL_CHAIN ( DECL_CHAIN (field));
2163 field_val -= M_CPU_SUBTYPE_START;
2164 }
2165
2166 /* Get the appropriate field in __cpu_model. */
2167 ref = build3 (COMPONENT_REF, TREE_TYPE (field), ix86_cpu_model_var,
2168 field, NULL_TREE);
2169
2170 /* Check the value. */
2171 final = build2 (EQ_EXPR, unsigned_type_node, ref,
2172 build_int_cstu (unsigned_type_node, field_val));
2173 return build1 (NOP_EXPR, integer_type_node, final);
2174 }
2175 else if (fn_code == IX86_BUILTIN_CPU_SUPPORTS)
2176 {
2177 tree ref;
2178 tree array_elt;
2179 tree field;
2180 tree final;
2181
2182 unsigned int field_val = 0;
2183 unsigned int NUM_ISA_NAMES = ARRAY_SIZE (isa_names_table);
2184
2185 for (i = 0; i < NUM_ISA_NAMES; i++)
2186 if (strcmp (s1: isa_names_table[i].name,
2187 TREE_STRING_POINTER (param_string_cst)) == 0)
2188 break;
2189
2190 if (i == NUM_ISA_NAMES)
2191 {
2192 error ("parameter to builtin not valid: %s",
2193 TREE_STRING_POINTER (param_string_cst));
2194 return integer_zero_node;
2195 }
2196
2197 unsigned feature = isa_names_table[i].feature;
2198 if (feature >= INT_TYPE_SIZE)
2199 {
2200 if (ix86_cpu_features2_var == nullptr)
2201 {
2202 /* Build a single __cpu_features2 variable for all
2203 references to __cpu_features2 so that GIMPLE level
2204 optimizers can CSE the loads of __cpu_features2 and
2205 optimize bit-operations properly. */
2206 tree index_type
2207 = build_index_type (size_int (SIZE_OF_CPU_FEATURES));
2208 ix86_cpu_features2_type_node
2209 = build_array_type (unsigned_type_node, index_type);
2210 ix86_cpu_features2_var
2211 = make_var_decl (type: ix86_cpu_features2_type_node,
2212 name: "__cpu_features2");
2213 varpool_node::add (decl: ix86_cpu_features2_var);
2214 }
2215
2216 /* Skip __cpu_features[0]. */
2217 feature -= INT_TYPE_SIZE;
2218 tree index = size_int (feature / INT_TYPE_SIZE);
2219 feature = feature % INT_TYPE_SIZE;
2220 array_elt = build4 (ARRAY_REF, unsigned_type_node,
2221 ix86_cpu_features2_var,
2222 index, NULL_TREE, NULL_TREE);
2223 /* Return __cpu_features2[index] & field_val */
2224 }
2225 else
2226 {
2227 field = TYPE_FIELDS (ix86_cpu_model_type_node);
2228 /* Get the last field, which is __cpu_features. */
2229 while (DECL_CHAIN (field))
2230 field = DECL_CHAIN (field);
2231
2232 /* Get the appropriate field: __cpu_model.__cpu_features */
2233 ref = build3 (COMPONENT_REF, TREE_TYPE (field), ix86_cpu_model_var,
2234 field, NULL_TREE);
2235
2236 /* Access the 0th element of __cpu_features array. */
2237 array_elt = build4 (ARRAY_REF, unsigned_type_node, ref,
2238 integer_zero_node, NULL_TREE, NULL_TREE);
2239
2240 /* Return __cpu_model.__cpu_features[0] & field_val */
2241 }
2242
2243 field_val = 1U << feature;
2244 final = build2 (BIT_AND_EXPR, unsigned_type_node, array_elt,
2245 build_int_cstu (unsigned_type_node, field_val));
2246 if (feature == INT_TYPE_SIZE - 1)
2247 return build2 (NE_EXPR, integer_type_node, final,
2248 build_int_cst (unsigned_type_node, 0));
2249 else
2250 return build1 (NOP_EXPR, integer_type_node, final);
2251 }
2252 gcc_unreachable ();
2253}
2254
2255#include "gt-i386-builtins.h"
2256

source code of gcc/config/i386/i386-builtins.cc