1 | /* Common subexpression elimination for GNU compiler. |
2 | Copyright (C) 1987-2023 Free Software Foundation, Inc. |
3 | |
4 | This file is part of GCC. |
5 | |
6 | GCC is free software; you can redistribute it and/or modify it under |
7 | the terms of the GNU General Public License as published by the Free |
8 | Software Foundation; either version 3, or (at your option) any later |
9 | version. |
10 | |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
14 | for more details. |
15 | |
16 | You should have received a copy of the GNU General Public License |
17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ |
19 | |
20 | #include "config.h" |
21 | #include "system.h" |
22 | #include "coretypes.h" |
23 | #include "backend.h" |
24 | #include "target.h" |
25 | #include "rtl.h" |
26 | #include "tree.h" |
27 | #include "cfghooks.h" |
28 | #include "df.h" |
29 | #include "memmodel.h" |
30 | #include "tm_p.h" |
31 | #include "insn-config.h" |
32 | #include "regs.h" |
33 | #include "emit-rtl.h" |
34 | #include "recog.h" |
35 | #include "cfgrtl.h" |
36 | #include "cfganal.h" |
37 | #include "cfgcleanup.h" |
38 | #include "alias.h" |
39 | #include "toplev.h" |
40 | #include "rtlhooks-def.h" |
41 | #include "tree-pass.h" |
42 | #include "dbgcnt.h" |
43 | #include "rtl-iter.h" |
44 | #include "regs.h" |
45 | #include "function-abi.h" |
46 | #include "rtlanal.h" |
47 | #include "expr.h" |
48 | |
49 | /* The basic idea of common subexpression elimination is to go |
50 | through the code, keeping a record of expressions that would |
51 | have the same value at the current scan point, and replacing |
52 | expressions encountered with the cheapest equivalent expression. |
53 | |
54 | It is too complicated to keep track of the different possibilities |
55 | when control paths merge in this code; so, at each label, we forget all |
56 | that is known and start fresh. This can be described as processing each |
57 | extended basic block separately. We have a separate pass to perform |
58 | global CSE. |
59 | |
60 | Note CSE can turn a conditional or computed jump into a nop or |
61 | an unconditional jump. When this occurs we arrange to run the jump |
62 | optimizer after CSE to delete the unreachable code. |
63 | |
64 | We use two data structures to record the equivalent expressions: |
65 | a hash table for most expressions, and a vector of "quantity |
66 | numbers" to record equivalent (pseudo) registers. |
67 | |
68 | The use of the special data structure for registers is desirable |
69 | because it is faster. It is possible because registers references |
70 | contain a fairly small number, the register number, taken from |
71 | a contiguously allocated series, and two register references are |
72 | identical if they have the same number. General expressions |
73 | do not have any such thing, so the only way to retrieve the |
74 | information recorded on an expression other than a register |
75 | is to keep it in a hash table. |
76 | |
77 | Registers and "quantity numbers": |
78 | |
79 | At the start of each basic block, all of the (hardware and pseudo) |
80 | registers used in the function are given distinct quantity |
81 | numbers to indicate their contents. During scan, when the code |
82 | copies one register into another, we copy the quantity number. |
83 | When a register is loaded in any other way, we allocate a new |
84 | quantity number to describe the value generated by this operation. |
85 | `REG_QTY (N)' records what quantity register N is currently thought |
86 | of as containing. |
87 | |
88 | All real quantity numbers are greater than or equal to zero. |
89 | If register N has not been assigned a quantity, `REG_QTY (N)' will |
90 | equal -N - 1, which is always negative. |
91 | |
92 | Quantity numbers below zero do not exist and none of the `qty_table' |
93 | entries should be referenced with a negative index. |
94 | |
95 | We also maintain a bidirectional chain of registers for each |
96 | quantity number. The `qty_table` members `first_reg' and `last_reg', |
97 | and `reg_eqv_table' members `next' and `prev' hold these chains. |
98 | |
99 | The first register in a chain is the one whose lifespan is least local. |
100 | Among equals, it is the one that was seen first. |
101 | We replace any equivalent register with that one. |
102 | |
103 | If two registers have the same quantity number, it must be true that |
104 | REG expressions with qty_table `mode' must be in the hash table for both |
105 | registers and must be in the same class. |
106 | |
107 | The converse is not true. Since hard registers may be referenced in |
108 | any mode, two REG expressions might be equivalent in the hash table |
109 | but not have the same quantity number if the quantity number of one |
110 | of the registers is not the same mode as those expressions. |
111 | |
112 | Constants and quantity numbers |
113 | |
114 | When a quantity has a known constant value, that value is stored |
115 | in the appropriate qty_table `const_rtx'. This is in addition to |
116 | putting the constant in the hash table as is usual for non-regs. |
117 | |
118 | Whether a reg or a constant is preferred is determined by the configuration |
119 | macro CONST_COSTS and will often depend on the constant value. In any |
120 | event, expressions containing constants can be simplified, by fold_rtx. |
121 | |
122 | When a quantity has a known nearly constant value (such as an address |
123 | of a stack slot), that value is stored in the appropriate qty_table |
124 | `const_rtx'. |
125 | |
126 | Integer constants don't have a machine mode. However, cse |
127 | determines the intended machine mode from the destination |
128 | of the instruction that moves the constant. The machine mode |
129 | is recorded in the hash table along with the actual RTL |
130 | constant expression so that different modes are kept separate. |
131 | |
132 | Other expressions: |
133 | |
134 | To record known equivalences among expressions in general |
135 | we use a hash table called `table'. It has a fixed number of buckets |
136 | that contain chains of `struct table_elt' elements for expressions. |
137 | These chains connect the elements whose expressions have the same |
138 | hash codes. |
139 | |
140 | Other chains through the same elements connect the elements which |
141 | currently have equivalent values. |
142 | |
143 | Register references in an expression are canonicalized before hashing |
144 | the expression. This is done using `reg_qty' and qty_table `first_reg'. |
145 | The hash code of a register reference is computed using the quantity |
146 | number, not the register number. |
147 | |
148 | When the value of an expression changes, it is necessary to remove from the |
149 | hash table not just that expression but all expressions whose values |
150 | could be different as a result. |
151 | |
152 | 1. If the value changing is in memory, except in special cases |
153 | ANYTHING referring to memory could be changed. That is because |
154 | nobody knows where a pointer does not point. |
155 | The function `invalidate_memory' removes what is necessary. |
156 | |
157 | The special cases are when the address is constant or is |
158 | a constant plus a fixed register such as the frame pointer |
159 | or a static chain pointer. When such addresses are stored in, |
160 | we can tell exactly which other such addresses must be invalidated |
161 | due to overlap. `invalidate' does this. |
162 | All expressions that refer to non-constant |
163 | memory addresses are also invalidated. `invalidate_memory' does this. |
164 | |
165 | 2. If the value changing is a register, all expressions |
166 | containing references to that register, and only those, |
167 | must be removed. |
168 | |
169 | Because searching the entire hash table for expressions that contain |
170 | a register is very slow, we try to figure out when it isn't necessary. |
171 | Precisely, this is necessary only when expressions have been |
172 | entered in the hash table using this register, and then the value has |
173 | changed, and then another expression wants to be added to refer to |
174 | the register's new value. This sequence of circumstances is rare |
175 | within any one basic block. |
176 | |
177 | `REG_TICK' and `REG_IN_TABLE', accessors for members of |
178 | cse_reg_info, are used to detect this case. REG_TICK (i) is |
179 | incremented whenever a value is stored in register i. |
180 | REG_IN_TABLE (i) holds -1 if no references to register i have been |
181 | entered in the table; otherwise, it contains the value REG_TICK (i) |
182 | had when the references were entered. If we want to enter a |
183 | reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and |
184 | remove old references. Until we want to enter a new entry, the |
185 | mere fact that the two vectors don't match makes the entries be |
186 | ignored if anyone tries to match them. |
187 | |
188 | Registers themselves are entered in the hash table as well as in |
189 | the equivalent-register chains. However, `REG_TICK' and |
190 | `REG_IN_TABLE' do not apply to expressions which are simple |
191 | register references. These expressions are removed from the table |
192 | immediately when they become invalid, and this can be done even if |
193 | we do not immediately search for all the expressions that refer to |
194 | the register. |
195 | |
196 | A CLOBBER rtx in an instruction invalidates its operand for further |
197 | reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK |
198 | invalidates everything that resides in memory. |
199 | |
200 | Related expressions: |
201 | |
202 | Constant expressions that differ only by an additive integer |
203 | are called related. When a constant expression is put in |
204 | the table, the related expression with no constant term |
205 | is also entered. These are made to point at each other |
206 | so that it is possible to find out if there exists any |
207 | register equivalent to an expression related to a given expression. */ |
208 | |
209 | /* Length of qty_table vector. We know in advance we will not need |
210 | a quantity number this big. */ |
211 | |
212 | static int max_qty; |
213 | |
214 | /* Next quantity number to be allocated. |
215 | This is 1 + the largest number needed so far. */ |
216 | |
217 | static int next_qty; |
218 | |
219 | /* Per-qty information tracking. |
220 | |
221 | `first_reg' and `last_reg' track the head and tail of the |
222 | chain of registers which currently contain this quantity. |
223 | |
224 | `mode' contains the machine mode of this quantity. |
225 | |
226 | `const_rtx' holds the rtx of the constant value of this |
227 | quantity, if known. A summations of the frame/arg pointer |
228 | and a constant can also be entered here. When this holds |
229 | a known value, `const_insn' is the insn which stored the |
230 | constant value. |
231 | |
232 | `comparison_{code,const,qty}' are used to track when a |
233 | comparison between a quantity and some constant or register has |
234 | been passed. In such a case, we know the results of the comparison |
235 | in case we see it again. These members record a comparison that |
236 | is known to be true. `comparison_code' holds the rtx code of such |
237 | a comparison, else it is set to UNKNOWN and the other two |
238 | comparison members are undefined. `comparison_const' holds |
239 | the constant being compared against, or zero if the comparison |
240 | is not against a constant. `comparison_qty' holds the quantity |
241 | being compared against when the result is known. If the comparison |
242 | is not with a register, `comparison_qty' is -1. */ |
243 | |
244 | struct qty_table_elem |
245 | { |
246 | rtx const_rtx; |
247 | rtx_insn *const_insn; |
248 | rtx comparison_const; |
249 | int comparison_qty; |
250 | unsigned int first_reg, last_reg; |
251 | ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE; |
252 | ENUM_BITFIELD(rtx_code) comparison_code : RTX_CODE_BITSIZE; |
253 | }; |
254 | |
255 | /* The table of all qtys, indexed by qty number. */ |
256 | static struct qty_table_elem *qty_table; |
257 | |
258 | /* Insn being scanned. */ |
259 | |
260 | static rtx_insn *this_insn; |
261 | static bool optimize_this_for_speed_p; |
262 | |
263 | /* Index by register number, gives the number of the next (or |
264 | previous) register in the chain of registers sharing the same |
265 | value. |
266 | |
267 | Or -1 if this register is at the end of the chain. |
268 | |
269 | If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */ |
270 | |
271 | /* Per-register equivalence chain. */ |
272 | struct reg_eqv_elem |
273 | { |
274 | int next, prev; |
275 | }; |
276 | |
277 | /* The table of all register equivalence chains. */ |
278 | static struct reg_eqv_elem *reg_eqv_table; |
279 | |
280 | struct cse_reg_info |
281 | { |
282 | /* The timestamp at which this register is initialized. */ |
283 | unsigned int timestamp; |
284 | |
285 | /* The quantity number of the register's current contents. */ |
286 | int reg_qty; |
287 | |
288 | /* The number of times the register has been altered in the current |
289 | basic block. */ |
290 | int reg_tick; |
291 | |
292 | /* The REG_TICK value at which rtx's containing this register are |
293 | valid in the hash table. If this does not equal the current |
294 | reg_tick value, such expressions existing in the hash table are |
295 | invalid. */ |
296 | int reg_in_table; |
297 | |
298 | /* The SUBREG that was set when REG_TICK was last incremented. Set |
299 | to -1 if the last store was to the whole register, not a subreg. */ |
300 | unsigned int subreg_ticked; |
301 | }; |
302 | |
303 | /* A table of cse_reg_info indexed by register numbers. */ |
304 | static struct cse_reg_info *cse_reg_info_table; |
305 | |
306 | /* The size of the above table. */ |
307 | static unsigned int cse_reg_info_table_size; |
308 | |
309 | /* The index of the first entry that has not been initialized. */ |
310 | static unsigned int cse_reg_info_table_first_uninitialized; |
311 | |
312 | /* The timestamp at the beginning of the current run of |
313 | cse_extended_basic_block. We increment this variable at the beginning of |
314 | the current run of cse_extended_basic_block. The timestamp field of a |
315 | cse_reg_info entry matches the value of this variable if and only |
316 | if the entry has been initialized during the current run of |
317 | cse_extended_basic_block. */ |
318 | static unsigned int cse_reg_info_timestamp; |
319 | |
320 | /* A HARD_REG_SET containing all the hard registers for which there is |
321 | currently a REG expression in the hash table. Note the difference |
322 | from the above variables, which indicate if the REG is mentioned in some |
323 | expression in the table. */ |
324 | |
325 | static HARD_REG_SET hard_regs_in_table; |
326 | |
327 | /* True if CSE has altered the CFG. */ |
328 | static bool cse_cfg_altered; |
329 | |
330 | /* True if CSE has altered conditional jump insns in such a way |
331 | that jump optimization should be redone. */ |
332 | static bool cse_jumps_altered; |
333 | |
334 | /* True if we put a LABEL_REF into the hash table for an INSN |
335 | without a REG_LABEL_OPERAND, we have to rerun jump after CSE |
336 | to put in the note. */ |
337 | static bool recorded_label_ref; |
338 | |
339 | /* canon_hash stores 1 in do_not_record if it notices a reference to PC or |
340 | some other volatile subexpression. */ |
341 | |
342 | static int do_not_record; |
343 | |
344 | /* canon_hash stores 1 in hash_arg_in_memory |
345 | if it notices a reference to memory within the expression being hashed. */ |
346 | |
347 | static int hash_arg_in_memory; |
348 | |
349 | /* The hash table contains buckets which are chains of `struct table_elt's, |
350 | each recording one expression's information. |
351 | That expression is in the `exp' field. |
352 | |
353 | The canon_exp field contains a canonical (from the point of view of |
354 | alias analysis) version of the `exp' field. |
355 | |
356 | Those elements with the same hash code are chained in both directions |
357 | through the `next_same_hash' and `prev_same_hash' fields. |
358 | |
359 | Each set of expressions with equivalent values |
360 | are on a two-way chain through the `next_same_value' |
361 | and `prev_same_value' fields, and all point with |
362 | the `first_same_value' field at the first element in |
363 | that chain. The chain is in order of increasing cost. |
364 | Each element's cost value is in its `cost' field. |
365 | |
366 | The `in_memory' field is nonzero for elements that |
367 | involve any reference to memory. These elements are removed |
368 | whenever a write is done to an unidentified location in memory. |
369 | To be safe, we assume that a memory address is unidentified unless |
370 | the address is either a symbol constant or a constant plus |
371 | the frame pointer or argument pointer. |
372 | |
373 | The `related_value' field is used to connect related expressions |
374 | (that differ by adding an integer). |
375 | The related expressions are chained in a circular fashion. |
376 | `related_value' is zero for expressions for which this |
377 | chain is not useful. |
378 | |
379 | The `cost' field stores the cost of this element's expression. |
380 | The `regcost' field stores the value returned by approx_reg_cost for |
381 | this element's expression. |
382 | |
383 | The `is_const' flag is set if the element is a constant (including |
384 | a fixed address). |
385 | |
386 | The `flag' field is used as a temporary during some search routines. |
387 | |
388 | The `mode' field is usually the same as GET_MODE (`exp'), but |
389 | if `exp' is a CONST_INT and has no machine mode then the `mode' |
390 | field is the mode it was being used as. Each constant is |
391 | recorded separately for each mode it is used with. */ |
392 | |
393 | struct table_elt |
394 | { |
395 | rtx exp; |
396 | rtx canon_exp; |
397 | struct table_elt *next_same_hash; |
398 | struct table_elt *prev_same_hash; |
399 | struct table_elt *next_same_value; |
400 | struct table_elt *prev_same_value; |
401 | struct table_elt *first_same_value; |
402 | struct table_elt *related_value; |
403 | int cost; |
404 | int regcost; |
405 | ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE; |
406 | char in_memory; |
407 | char is_const; |
408 | char flag; |
409 | }; |
410 | |
411 | /* We don't want a lot of buckets, because we rarely have very many |
412 | things stored in the hash table, and a lot of buckets slows |
413 | down a lot of loops that happen frequently. */ |
414 | #define HASH_SHIFT 5 |
415 | #define HASH_SIZE (1 << HASH_SHIFT) |
416 | #define HASH_MASK (HASH_SIZE - 1) |
417 | |
418 | /* Determine whether register number N is considered a fixed register for the |
419 | purpose of approximating register costs. |
420 | It is desirable to replace other regs with fixed regs, to reduce need for |
421 | non-fixed hard regs. |
422 | A reg wins if it is either the frame pointer or designated as fixed. */ |
423 | #define FIXED_REGNO_P(N) \ |
424 | ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ |
425 | || fixed_regs[N] || global_regs[N]) |
426 | |
427 | /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed |
428 | hard registers and pointers into the frame are the cheapest with a cost |
429 | of 0. Next come pseudos with a cost of one and other hard registers with |
430 | a cost of 2. Aside from these special cases, call `rtx_cost'. */ |
431 | |
432 | #define CHEAP_REGNO(N) \ |
433 | (REGNO_PTR_FRAME_P (N) \ |
434 | || (HARD_REGISTER_NUM_P (N) \ |
435 | && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS)) |
436 | |
437 | #define COST(X, MODE) \ |
438 | (REG_P (X) ? 0 : notreg_cost (X, MODE, SET, 1)) |
439 | #define COST_IN(X, MODE, OUTER, OPNO) \ |
440 | (REG_P (X) ? 0 : notreg_cost (X, MODE, OUTER, OPNO)) |
441 | |
442 | /* Get the number of times this register has been updated in this |
443 | basic block. */ |
444 | |
445 | #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick) |
446 | |
447 | /* Get the point at which REG was recorded in the table. */ |
448 | |
449 | #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table) |
450 | |
451 | /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a |
452 | SUBREG). */ |
453 | |
454 | #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked) |
455 | |
456 | /* Get the quantity number for REG. */ |
457 | |
458 | #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty) |
459 | |
460 | /* Determine if the quantity number for register X represents a valid index |
461 | into the qty_table. */ |
462 | |
463 | #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0) |
464 | |
465 | /* Compare table_elt X and Y and return true iff X is cheaper than Y. */ |
466 | |
467 | #define CHEAPER(X, Y) \ |
468 | (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0) |
469 | |
470 | static struct table_elt *table[HASH_SIZE]; |
471 | |
472 | /* Chain of `struct table_elt's made so far for this function |
473 | but currently removed from the table. */ |
474 | |
475 | static struct table_elt *free_element_chain; |
476 | |
477 | /* Trace a patch through the CFG. */ |
478 | |
479 | struct branch_path |
480 | { |
481 | /* The basic block for this path entry. */ |
482 | basic_block bb; |
483 | }; |
484 | |
485 | /* This data describes a block that will be processed by |
486 | cse_extended_basic_block. */ |
487 | |
488 | struct cse_basic_block_data |
489 | { |
490 | /* Total number of SETs in block. */ |
491 | int nsets; |
492 | /* Size of current branch path, if any. */ |
493 | int path_size; |
494 | /* Current path, indicating which basic_blocks will be processed. */ |
495 | struct branch_path *path; |
496 | }; |
497 | |
498 | |
499 | /* Pointers to the live in/live out bitmaps for the boundaries of the |
500 | current EBB. */ |
501 | static bitmap cse_ebb_live_in, cse_ebb_live_out; |
502 | |
503 | /* A simple bitmap to track which basic blocks have been visited |
504 | already as part of an already processed extended basic block. */ |
505 | static sbitmap cse_visited_basic_blocks; |
506 | |
507 | static bool fixed_base_plus_p (rtx x); |
508 | static int notreg_cost (rtx, machine_mode, enum rtx_code, int); |
509 | static int preferable (int, int, int, int); |
510 | static void new_basic_block (void); |
511 | static void make_new_qty (unsigned int, machine_mode); |
512 | static void make_regs_eqv (unsigned int, unsigned int); |
513 | static void delete_reg_equiv (unsigned int); |
514 | static bool mention_regs (rtx); |
515 | static bool insert_regs (rtx, struct table_elt *, bool); |
516 | static void remove_from_table (struct table_elt *, unsigned); |
517 | static void remove_pseudo_from_table (rtx, unsigned); |
518 | static struct table_elt *lookup (rtx, unsigned, machine_mode); |
519 | static struct table_elt *lookup_for_remove (rtx, unsigned, machine_mode); |
520 | static rtx lookup_as_function (rtx, enum rtx_code); |
521 | static struct table_elt *insert_with_costs (rtx, struct table_elt *, unsigned, |
522 | machine_mode, int, int); |
523 | static struct table_elt *insert (rtx, struct table_elt *, unsigned, |
524 | machine_mode); |
525 | static void merge_equiv_classes (struct table_elt *, struct table_elt *); |
526 | static void invalidate (rtx, machine_mode); |
527 | static void remove_invalid_refs (unsigned int); |
528 | static void remove_invalid_subreg_refs (unsigned int, poly_uint64, |
529 | machine_mode); |
530 | static void rehash_using_reg (rtx); |
531 | static void invalidate_memory (void); |
532 | static rtx use_related_value (rtx, struct table_elt *); |
533 | |
534 | static inline unsigned canon_hash (rtx, machine_mode); |
535 | static inline unsigned safe_hash (rtx, machine_mode); |
536 | static inline unsigned hash_rtx_string (const char *); |
537 | |
538 | static rtx canon_reg (rtx, rtx_insn *); |
539 | static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *, |
540 | machine_mode *, |
541 | machine_mode *); |
542 | static rtx fold_rtx (rtx, rtx_insn *); |
543 | static rtx equiv_constant (rtx); |
544 | static void record_jump_equiv (rtx_insn *, bool); |
545 | static void record_jump_cond (enum rtx_code, machine_mode, rtx, rtx); |
546 | static void cse_insn (rtx_insn *); |
547 | static void cse_prescan_path (struct cse_basic_block_data *); |
548 | static void invalidate_from_clobbers (rtx_insn *); |
549 | static void invalidate_from_sets_and_clobbers (rtx_insn *); |
550 | static void cse_extended_basic_block (struct cse_basic_block_data *); |
551 | extern void dump_class (struct table_elt*); |
552 | static void get_cse_reg_info_1 (unsigned int regno); |
553 | static struct cse_reg_info * get_cse_reg_info (unsigned int regno); |
554 | |
555 | static void flush_hash_table (void); |
556 | static bool insn_live_p (rtx_insn *, int *); |
557 | static bool set_live_p (rtx, int *); |
558 | static void cse_change_cc_mode_insn (rtx_insn *, rtx); |
559 | static void cse_change_cc_mode_insns (rtx_insn *, rtx_insn *, rtx); |
560 | static machine_mode cse_cc_succs (basic_block, basic_block, rtx, rtx, |
561 | bool); |
562 | |
563 | |
564 | #undef RTL_HOOKS_GEN_LOWPART |
565 | #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible |
566 | |
567 | static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER; |
568 | |
569 | /* Compute hash code of X in mode M. Special-case case where X is a pseudo |
570 | register (hard registers may require `do_not_record' to be set). */ |
571 | |
572 | static inline unsigned |
573 | HASH (rtx x, machine_mode mode) |
574 | { |
575 | unsigned h = (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER |
576 | ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (x))) |
577 | : canon_hash (x, mode)); |
578 | return (h ^ (h >> HASH_SHIFT)) & HASH_MASK; |
579 | } |
580 | |
581 | /* Like HASH, but without side-effects. */ |
582 | |
583 | static inline unsigned |
584 | SAFE_HASH (rtx x, machine_mode mode) |
585 | { |
586 | unsigned h = (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER |
587 | ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (x))) |
588 | : safe_hash (x, mode)); |
589 | return (h ^ (h >> HASH_SHIFT)) & HASH_MASK; |
590 | } |
591 | |
592 | /* Nonzero if X has the form (PLUS frame-pointer integer). */ |
593 | |
594 | static bool |
595 | fixed_base_plus_p (rtx x) |
596 | { |
597 | switch (GET_CODE (x)) |
598 | { |
599 | case REG: |
600 | if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx) |
601 | return true; |
602 | if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]) |
603 | return true; |
604 | return false; |
605 | |
606 | case PLUS: |
607 | if (!CONST_INT_P (XEXP (x, 1))) |
608 | return false; |
609 | return fixed_base_plus_p (XEXP (x, 0)); |
610 | |
611 | default: |
612 | return false; |
613 | } |
614 | } |
615 | |
616 | /* Dump the expressions in the equivalence class indicated by CLASSP. |
617 | This function is used only for debugging. */ |
618 | DEBUG_FUNCTION void |
619 | dump_class (struct table_elt *classp) |
620 | { |
621 | struct table_elt *elt; |
622 | |
623 | fprintf (stderr, format: "Equivalence chain for " ); |
624 | print_rtl (stderr, classp->exp); |
625 | fprintf (stderr, format: ": \n" ); |
626 | |
627 | for (elt = classp->first_same_value; elt; elt = elt->next_same_value) |
628 | { |
629 | print_rtl (stderr, elt->exp); |
630 | fprintf (stderr, format: "\n" ); |
631 | } |
632 | } |
633 | |
634 | /* Return an estimate of the cost of the registers used in an rtx. |
635 | This is mostly the number of different REG expressions in the rtx; |
636 | however for some exceptions like fixed registers we use a cost of |
637 | 0. If any other hard register reference occurs, return MAX_COST. */ |
638 | |
639 | static int |
640 | approx_reg_cost (const_rtx x) |
641 | { |
642 | int cost = 0; |
643 | subrtx_iterator::array_type array; |
644 | FOR_EACH_SUBRTX (iter, array, x, NONCONST) |
645 | { |
646 | const_rtx x = *iter; |
647 | if (REG_P (x)) |
648 | { |
649 | unsigned int regno = REGNO (x); |
650 | if (!CHEAP_REGNO (regno)) |
651 | { |
652 | if (regno < FIRST_PSEUDO_REGISTER) |
653 | { |
654 | if (targetm.small_register_classes_for_mode_p (GET_MODE (x))) |
655 | return MAX_COST; |
656 | cost += 2; |
657 | } |
658 | else |
659 | cost += 1; |
660 | } |
661 | } |
662 | } |
663 | return cost; |
664 | } |
665 | |
666 | /* Return a negative value if an rtx A, whose costs are given by COST_A |
667 | and REGCOST_A, is more desirable than an rtx B. |
668 | Return a positive value if A is less desirable, or 0 if the two are |
669 | equally good. */ |
670 | static int |
671 | preferable (int cost_a, int regcost_a, int cost_b, int regcost_b) |
672 | { |
673 | /* First, get rid of cases involving expressions that are entirely |
674 | unwanted. */ |
675 | if (cost_a != cost_b) |
676 | { |
677 | if (cost_a == MAX_COST) |
678 | return 1; |
679 | if (cost_b == MAX_COST) |
680 | return -1; |
681 | } |
682 | |
683 | /* Avoid extending lifetimes of hardregs. */ |
684 | if (regcost_a != regcost_b) |
685 | { |
686 | if (regcost_a == MAX_COST) |
687 | return 1; |
688 | if (regcost_b == MAX_COST) |
689 | return -1; |
690 | } |
691 | |
692 | /* Normal operation costs take precedence. */ |
693 | if (cost_a != cost_b) |
694 | return cost_a - cost_b; |
695 | /* Only if these are identical consider effects on register pressure. */ |
696 | if (regcost_a != regcost_b) |
697 | return regcost_a - regcost_b; |
698 | return 0; |
699 | } |
700 | |
701 | /* Internal function, to compute cost when X is not a register; called |
702 | from COST macro to keep it simple. */ |
703 | |
704 | static int |
705 | notreg_cost (rtx x, machine_mode mode, enum rtx_code outer, int opno) |
706 | { |
707 | scalar_int_mode int_mode, inner_mode; |
708 | return ((GET_CODE (x) == SUBREG |
709 | && REG_P (SUBREG_REG (x)) |
710 | && is_int_mode (mode, int_mode: &int_mode) |
711 | && is_int_mode (GET_MODE (SUBREG_REG (x)), int_mode: &inner_mode) |
712 | && GET_MODE_SIZE (mode: int_mode) < GET_MODE_SIZE (mode: inner_mode) |
713 | && subreg_lowpart_p (x) |
714 | && TRULY_NOOP_TRUNCATION_MODES_P (int_mode, inner_mode)) |
715 | ? 0 |
716 | : rtx_cost (x, mode, outer, opno, optimize_this_for_speed_p) * 2); |
717 | } |
718 | |
719 | |
720 | /* Initialize CSE_REG_INFO_TABLE. */ |
721 | |
722 | static void |
723 | init_cse_reg_info (unsigned int nregs) |
724 | { |
725 | /* Do we need to grow the table? */ |
726 | if (nregs > cse_reg_info_table_size) |
727 | { |
728 | unsigned int new_size; |
729 | |
730 | if (cse_reg_info_table_size < 2048) |
731 | { |
732 | /* Compute a new size that is a power of 2 and no smaller |
733 | than the large of NREGS and 64. */ |
734 | new_size = (cse_reg_info_table_size |
735 | ? cse_reg_info_table_size : 64); |
736 | |
737 | while (new_size < nregs) |
738 | new_size *= 2; |
739 | } |
740 | else |
741 | { |
742 | /* If we need a big table, allocate just enough to hold |
743 | NREGS registers. */ |
744 | new_size = nregs; |
745 | } |
746 | |
747 | /* Reallocate the table with NEW_SIZE entries. */ |
748 | free (ptr: cse_reg_info_table); |
749 | cse_reg_info_table = XNEWVEC (struct cse_reg_info, new_size); |
750 | cse_reg_info_table_size = new_size; |
751 | cse_reg_info_table_first_uninitialized = 0; |
752 | } |
753 | |
754 | /* Do we have all of the first NREGS entries initialized? */ |
755 | if (cse_reg_info_table_first_uninitialized < nregs) |
756 | { |
757 | unsigned int old_timestamp = cse_reg_info_timestamp - 1; |
758 | unsigned int i; |
759 | |
760 | /* Put the old timestamp on newly allocated entries so that they |
761 | will all be considered out of date. We do not touch those |
762 | entries beyond the first NREGS entries to be nice to the |
763 | virtual memory. */ |
764 | for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++) |
765 | cse_reg_info_table[i].timestamp = old_timestamp; |
766 | |
767 | cse_reg_info_table_first_uninitialized = nregs; |
768 | } |
769 | } |
770 | |
771 | /* Given REGNO, initialize the cse_reg_info entry for REGNO. */ |
772 | |
773 | static void |
774 | get_cse_reg_info_1 (unsigned int regno) |
775 | { |
776 | /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this |
777 | entry will be considered to have been initialized. */ |
778 | cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp; |
779 | |
780 | /* Initialize the rest of the entry. */ |
781 | cse_reg_info_table[regno].reg_tick = 1; |
782 | cse_reg_info_table[regno].reg_in_table = -1; |
783 | cse_reg_info_table[regno].subreg_ticked = -1; |
784 | cse_reg_info_table[regno].reg_qty = -regno - 1; |
785 | } |
786 | |
787 | /* Find a cse_reg_info entry for REGNO. */ |
788 | |
789 | static inline struct cse_reg_info * |
790 | get_cse_reg_info (unsigned int regno) |
791 | { |
792 | struct cse_reg_info *p = &cse_reg_info_table[regno]; |
793 | |
794 | /* If this entry has not been initialized, go ahead and initialize |
795 | it. */ |
796 | if (p->timestamp != cse_reg_info_timestamp) |
797 | get_cse_reg_info_1 (regno); |
798 | |
799 | return p; |
800 | } |
801 | |
802 | /* Clear the hash table and initialize each register with its own quantity, |
803 | for a new basic block. */ |
804 | |
805 | static void |
806 | new_basic_block (void) |
807 | { |
808 | int i; |
809 | |
810 | next_qty = 0; |
811 | |
812 | /* Invalidate cse_reg_info_table. */ |
813 | cse_reg_info_timestamp++; |
814 | |
815 | /* Clear out hash table state for this pass. */ |
816 | CLEAR_HARD_REG_SET (set&: hard_regs_in_table); |
817 | |
818 | /* The per-quantity values used to be initialized here, but it is |
819 | much faster to initialize each as it is made in `make_new_qty'. */ |
820 | |
821 | for (i = 0; i < HASH_SIZE; i++) |
822 | { |
823 | struct table_elt *first; |
824 | |
825 | first = table[i]; |
826 | if (first != NULL) |
827 | { |
828 | struct table_elt *last = first; |
829 | |
830 | table[i] = NULL; |
831 | |
832 | while (last->next_same_hash != NULL) |
833 | last = last->next_same_hash; |
834 | |
835 | /* Now relink this hash entire chain into |
836 | the free element list. */ |
837 | |
838 | last->next_same_hash = free_element_chain; |
839 | free_element_chain = first; |
840 | } |
841 | } |
842 | } |
843 | |
844 | /* Say that register REG contains a quantity in mode MODE not in any |
845 | register before and initialize that quantity. */ |
846 | |
847 | static void |
848 | make_new_qty (unsigned int reg, machine_mode mode) |
849 | { |
850 | int q; |
851 | struct qty_table_elem *ent; |
852 | struct reg_eqv_elem *eqv; |
853 | |
854 | gcc_assert (next_qty < max_qty); |
855 | |
856 | q = REG_QTY (reg) = next_qty++; |
857 | ent = &qty_table[q]; |
858 | ent->first_reg = reg; |
859 | ent->last_reg = reg; |
860 | ent->mode = mode; |
861 | ent->const_rtx = ent->const_insn = NULL; |
862 | ent->comparison_code = UNKNOWN; |
863 | |
864 | eqv = ®_eqv_table[reg]; |
865 | eqv->next = eqv->prev = -1; |
866 | } |
867 | |
868 | /* Make reg NEW equivalent to reg OLD. |
869 | OLD is not changing; NEW is. */ |
870 | |
871 | static void |
872 | make_regs_eqv (unsigned int new_reg, unsigned int old_reg) |
873 | { |
874 | unsigned int lastr, firstr; |
875 | int q = REG_QTY (old_reg); |
876 | struct qty_table_elem *ent; |
877 | |
878 | ent = &qty_table[q]; |
879 | |
880 | /* Nothing should become eqv until it has a "non-invalid" qty number. */ |
881 | gcc_assert (REGNO_QTY_VALID_P (old_reg)); |
882 | |
883 | REG_QTY (new_reg) = q; |
884 | firstr = ent->first_reg; |
885 | lastr = ent->last_reg; |
886 | |
887 | /* Prefer fixed hard registers to anything. Prefer pseudo regs to other |
888 | hard regs. Among pseudos, if NEW will live longer than any other reg |
889 | of the same qty, and that is beyond the current basic block, |
890 | make it the new canonical replacement for this qty. */ |
891 | if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr)) |
892 | /* Certain fixed registers might be of the class NO_REGS. This means |
893 | that not only can they not be allocated by the compiler, but |
894 | they cannot be used in substitutions or canonicalizations |
895 | either. */ |
896 | && (new_reg >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new_reg) != NO_REGS) |
897 | && ((new_reg < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new_reg)) |
898 | || (new_reg >= FIRST_PSEUDO_REGISTER |
899 | && (firstr < FIRST_PSEUDO_REGISTER |
900 | || (bitmap_bit_p (cse_ebb_live_out, new_reg) |
901 | && !bitmap_bit_p (cse_ebb_live_out, firstr)) |
902 | || (bitmap_bit_p (cse_ebb_live_in, new_reg) |
903 | && !bitmap_bit_p (cse_ebb_live_in, firstr)))))) |
904 | { |
905 | reg_eqv_table[firstr].prev = new_reg; |
906 | reg_eqv_table[new_reg].next = firstr; |
907 | reg_eqv_table[new_reg].prev = -1; |
908 | ent->first_reg = new_reg; |
909 | } |
910 | else |
911 | { |
912 | /* If NEW is a hard reg (known to be non-fixed), insert at end. |
913 | Otherwise, insert before any non-fixed hard regs that are at the |
914 | end. Registers of class NO_REGS cannot be used as an |
915 | equivalent for anything. */ |
916 | while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0 |
917 | && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr)) |
918 | && new_reg >= FIRST_PSEUDO_REGISTER) |
919 | lastr = reg_eqv_table[lastr].prev; |
920 | reg_eqv_table[new_reg].next = reg_eqv_table[lastr].next; |
921 | if (reg_eqv_table[lastr].next >= 0) |
922 | reg_eqv_table[reg_eqv_table[lastr].next].prev = new_reg; |
923 | else |
924 | qty_table[q].last_reg = new_reg; |
925 | reg_eqv_table[lastr].next = new_reg; |
926 | reg_eqv_table[new_reg].prev = lastr; |
927 | } |
928 | } |
929 | |
930 | /* Remove REG from its equivalence class. */ |
931 | |
932 | static void |
933 | delete_reg_equiv (unsigned int reg) |
934 | { |
935 | struct qty_table_elem *ent; |
936 | int q = REG_QTY (reg); |
937 | int p, n; |
938 | |
939 | /* If invalid, do nothing. */ |
940 | if (! REGNO_QTY_VALID_P (reg)) |
941 | return; |
942 | |
943 | ent = &qty_table[q]; |
944 | |
945 | p = reg_eqv_table[reg].prev; |
946 | n = reg_eqv_table[reg].next; |
947 | |
948 | if (n != -1) |
949 | reg_eqv_table[n].prev = p; |
950 | else |
951 | ent->last_reg = p; |
952 | if (p != -1) |
953 | reg_eqv_table[p].next = n; |
954 | else |
955 | ent->first_reg = n; |
956 | |
957 | REG_QTY (reg) = -reg - 1; |
958 | } |
959 | |
960 | /* Remove any invalid expressions from the hash table |
961 | that refer to any of the registers contained in expression X. |
962 | |
963 | Make sure that newly inserted references to those registers |
964 | as subexpressions will be considered valid. |
965 | |
966 | mention_regs is not called when a register itself |
967 | is being stored in the table. |
968 | |
969 | Return true if we have done something that may have changed |
970 | the hash code of X. */ |
971 | |
972 | static bool |
973 | mention_regs (rtx x) |
974 | { |
975 | enum rtx_code code; |
976 | int i, j; |
977 | const char *fmt; |
978 | bool changed = false; |
979 | |
980 | if (x == 0) |
981 | return false; |
982 | |
983 | code = GET_CODE (x); |
984 | if (code == REG) |
985 | { |
986 | unsigned int regno = REGNO (x); |
987 | unsigned int endregno = END_REGNO (x); |
988 | unsigned int i; |
989 | |
990 | for (i = regno; i < endregno; i++) |
991 | { |
992 | if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i)) |
993 | remove_invalid_refs (i); |
994 | |
995 | REG_IN_TABLE (i) = REG_TICK (i); |
996 | SUBREG_TICKED (i) = -1; |
997 | } |
998 | |
999 | return false; |
1000 | } |
1001 | |
1002 | /* If this is a SUBREG, we don't want to discard other SUBREGs of the same |
1003 | pseudo if they don't use overlapping words. We handle only pseudos |
1004 | here for simplicity. */ |
1005 | if (code == SUBREG && REG_P (SUBREG_REG (x)) |
1006 | && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER) |
1007 | { |
1008 | unsigned int i = REGNO (SUBREG_REG (x)); |
1009 | |
1010 | if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i)) |
1011 | { |
1012 | /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and |
1013 | the last store to this register really stored into this |
1014 | subreg, then remove the memory of this subreg. |
1015 | Otherwise, remove any memory of the entire register and |
1016 | all its subregs from the table. */ |
1017 | if (REG_TICK (i) - REG_IN_TABLE (i) > 1 |
1018 | || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x))) |
1019 | remove_invalid_refs (i); |
1020 | else |
1021 | remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x)); |
1022 | } |
1023 | |
1024 | REG_IN_TABLE (i) = REG_TICK (i); |
1025 | SUBREG_TICKED (i) = REGNO (SUBREG_REG (x)); |
1026 | return false; |
1027 | } |
1028 | |
1029 | /* If X is a comparison or a COMPARE and either operand is a register |
1030 | that does not have a quantity, give it one. This is so that a later |
1031 | call to record_jump_equiv won't cause X to be assigned a different |
1032 | hash code and not found in the table after that call. |
1033 | |
1034 | It is not necessary to do this here, since rehash_using_reg can |
1035 | fix up the table later, but doing this here eliminates the need to |
1036 | call that expensive function in the most common case where the only |
1037 | use of the register is in the comparison. */ |
1038 | |
1039 | if (code == COMPARE || COMPARISON_P (x)) |
1040 | { |
1041 | if (REG_P (XEXP (x, 0)) |
1042 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))) |
1043 | if (insert_regs (XEXP (x, 0), NULL, false)) |
1044 | { |
1045 | rehash_using_reg (XEXP (x, 0)); |
1046 | changed = true; |
1047 | } |
1048 | |
1049 | if (REG_P (XEXP (x, 1)) |
1050 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))) |
1051 | if (insert_regs (XEXP (x, 1), NULL, false)) |
1052 | { |
1053 | rehash_using_reg (XEXP (x, 1)); |
1054 | changed = true; |
1055 | } |
1056 | } |
1057 | |
1058 | fmt = GET_RTX_FORMAT (code); |
1059 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
1060 | if (fmt[i] == 'e') |
1061 | { |
1062 | if (mention_regs (XEXP (x, i))) |
1063 | changed = true; |
1064 | } |
1065 | else if (fmt[i] == 'E') |
1066 | for (j = 0; j < XVECLEN (x, i); j++) |
1067 | if (mention_regs (XVECEXP (x, i, j))) |
1068 | changed = true; |
1069 | |
1070 | return changed; |
1071 | } |
1072 | |
1073 | /* Update the register quantities for inserting X into the hash table |
1074 | with a value equivalent to CLASSP. |
1075 | (If the class does not contain a REG, it is irrelevant.) |
1076 | If MODIFIED is true, X is a destination; it is being modified. |
1077 | Note that delete_reg_equiv should be called on a register |
1078 | before insert_regs is done on that register with MODIFIED != 0. |
1079 | |
1080 | True value means that elements of reg_qty have changed |
1081 | so X's hash code may be different. */ |
1082 | |
1083 | static bool |
1084 | insert_regs (rtx x, struct table_elt *classp, bool modified) |
1085 | { |
1086 | if (REG_P (x)) |
1087 | { |
1088 | unsigned int regno = REGNO (x); |
1089 | int qty_valid; |
1090 | |
1091 | /* If REGNO is in the equivalence table already but is of the |
1092 | wrong mode for that equivalence, don't do anything here. */ |
1093 | |
1094 | qty_valid = REGNO_QTY_VALID_P (regno); |
1095 | if (qty_valid) |
1096 | { |
1097 | struct qty_table_elem *ent = &qty_table[REG_QTY (regno)]; |
1098 | |
1099 | if (ent->mode != GET_MODE (x)) |
1100 | return false; |
1101 | } |
1102 | |
1103 | if (modified || ! qty_valid) |
1104 | { |
1105 | if (classp) |
1106 | for (classp = classp->first_same_value; |
1107 | classp != 0; |
1108 | classp = classp->next_same_value) |
1109 | if (REG_P (classp->exp) |
1110 | && GET_MODE (classp->exp) == GET_MODE (x)) |
1111 | { |
1112 | unsigned c_regno = REGNO (classp->exp); |
1113 | |
1114 | gcc_assert (REGNO_QTY_VALID_P (c_regno)); |
1115 | |
1116 | /* Suppose that 5 is hard reg and 100 and 101 are |
1117 | pseudos. Consider |
1118 | |
1119 | (set (reg:si 100) (reg:si 5)) |
1120 | (set (reg:si 5) (reg:si 100)) |
1121 | (set (reg:di 101) (reg:di 5)) |
1122 | |
1123 | We would now set REG_QTY (101) = REG_QTY (5), but the |
1124 | entry for 5 is in SImode. When we use this later in |
1125 | copy propagation, we get the register in wrong mode. */ |
1126 | if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x)) |
1127 | continue; |
1128 | |
1129 | make_regs_eqv (new_reg: regno, old_reg: c_regno); |
1130 | return true; |
1131 | } |
1132 | |
1133 | /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger |
1134 | than REG_IN_TABLE to find out if there was only a single preceding |
1135 | invalidation - for the SUBREG - or another one, which would be |
1136 | for the full register. However, if we find here that REG_TICK |
1137 | indicates that the register is invalid, it means that it has |
1138 | been invalidated in a separate operation. The SUBREG might be used |
1139 | now (then this is a recursive call), or we might use the full REG |
1140 | now and a SUBREG of it later. So bump up REG_TICK so that |
1141 | mention_regs will do the right thing. */ |
1142 | if (! modified |
1143 | && REG_IN_TABLE (regno) >= 0 |
1144 | && REG_TICK (regno) == REG_IN_TABLE (regno) + 1) |
1145 | REG_TICK (regno)++; |
1146 | make_new_qty (reg: regno, GET_MODE (x)); |
1147 | return true; |
1148 | } |
1149 | |
1150 | return false; |
1151 | } |
1152 | |
1153 | /* If X is a SUBREG, we will likely be inserting the inner register in the |
1154 | table. If that register doesn't have an assigned quantity number at |
1155 | this point but does later, the insertion that we will be doing now will |
1156 | not be accessible because its hash code will have changed. So assign |
1157 | a quantity number now. */ |
1158 | |
1159 | else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x)) |
1160 | && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x)))) |
1161 | { |
1162 | insert_regs (SUBREG_REG (x), NULL, modified: false); |
1163 | mention_regs (x); |
1164 | return true; |
1165 | } |
1166 | else |
1167 | return mention_regs (x); |
1168 | } |
1169 | |
1170 | |
1171 | /* Compute upper and lower anchors for CST. Also compute the offset of CST |
1172 | from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff |
1173 | CST is equal to an anchor. */ |
1174 | |
1175 | static bool |
1176 | compute_const_anchors (rtx cst, |
1177 | HOST_WIDE_INT *lower_base, HOST_WIDE_INT *lower_offs, |
1178 | HOST_WIDE_INT *upper_base, HOST_WIDE_INT *upper_offs) |
1179 | { |
1180 | unsigned HOST_WIDE_INT n = UINTVAL (cst); |
1181 | |
1182 | *lower_base = n & ~(targetm.const_anchor - 1); |
1183 | if ((unsigned HOST_WIDE_INT) *lower_base == n) |
1184 | return false; |
1185 | |
1186 | *upper_base = ((n + (targetm.const_anchor - 1)) |
1187 | & ~(targetm.const_anchor - 1)); |
1188 | *upper_offs = n - *upper_base; |
1189 | *lower_offs = n - *lower_base; |
1190 | return true; |
1191 | } |
1192 | |
1193 | /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */ |
1194 | |
1195 | static void |
1196 | insert_const_anchor (HOST_WIDE_INT anchor, rtx reg, HOST_WIDE_INT offs, |
1197 | machine_mode mode) |
1198 | { |
1199 | struct table_elt *elt; |
1200 | unsigned hash; |
1201 | rtx anchor_exp; |
1202 | rtx exp; |
1203 | |
1204 | anchor_exp = gen_int_mode (anchor, mode); |
1205 | hash = HASH (x: anchor_exp, mode); |
1206 | elt = lookup (anchor_exp, hash, mode); |
1207 | if (!elt) |
1208 | elt = insert (anchor_exp, NULL, hash, mode); |
1209 | |
1210 | exp = plus_constant (mode, reg, offs); |
1211 | /* REG has just been inserted and the hash codes recomputed. */ |
1212 | mention_regs (x: exp); |
1213 | hash = HASH (x: exp, mode); |
1214 | |
1215 | /* Use the cost of the register rather than the whole expression. When |
1216 | looking up constant anchors we will further offset the corresponding |
1217 | expression therefore it does not make sense to prefer REGs over |
1218 | reg-immediate additions. Prefer instead the oldest expression. Also |
1219 | don't prefer pseudos over hard regs so that we derive constants in |
1220 | argument registers from other argument registers rather than from the |
1221 | original pseudo that was used to synthesize the constant. */ |
1222 | insert_with_costs (exp, elt, hash, mode, COST (reg, mode), 1); |
1223 | } |
1224 | |
1225 | /* The constant CST is equivalent to the register REG. Create |
1226 | equivalences between the two anchors of CST and the corresponding |
1227 | register-offset expressions using REG. */ |
1228 | |
1229 | static void |
1230 | insert_const_anchors (rtx reg, rtx cst, machine_mode mode) |
1231 | { |
1232 | HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs; |
1233 | |
1234 | if (!compute_const_anchors (cst, lower_base: &lower_base, lower_offs: &lower_offs, |
1235 | upper_base: &upper_base, upper_offs: &upper_offs)) |
1236 | return; |
1237 | |
1238 | /* Ignore anchors of value 0. Constants accessible from zero are |
1239 | simple. */ |
1240 | if (lower_base != 0) |
1241 | insert_const_anchor (anchor: lower_base, reg, offs: -lower_offs, mode); |
1242 | |
1243 | if (upper_base != 0) |
1244 | insert_const_anchor (anchor: upper_base, reg, offs: -upper_offs, mode); |
1245 | } |
1246 | |
1247 | /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of |
1248 | ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a |
1249 | valid expression. Return the cheapest and oldest of such expressions. In |
1250 | *OLD, return how old the resulting expression is compared to the other |
1251 | equivalent expressions. */ |
1252 | |
1253 | static rtx |
1254 | find_reg_offset_for_const (struct table_elt *anchor_elt, HOST_WIDE_INT offs, |
1255 | unsigned *old) |
1256 | { |
1257 | struct table_elt *elt; |
1258 | unsigned idx; |
1259 | struct table_elt *match_elt; |
1260 | rtx match; |
1261 | |
1262 | /* Find the cheapest and *oldest* expression to maximize the chance of |
1263 | reusing the same pseudo. */ |
1264 | |
1265 | match_elt = NULL; |
1266 | match = NULL_RTX; |
1267 | for (elt = anchor_elt->first_same_value, idx = 0; |
1268 | elt; |
1269 | elt = elt->next_same_value, idx++) |
1270 | { |
1271 | if (match_elt && CHEAPER (match_elt, elt)) |
1272 | return match; |
1273 | |
1274 | if (REG_P (elt->exp) |
1275 | || (GET_CODE (elt->exp) == PLUS |
1276 | && REG_P (XEXP (elt->exp, 0)) |
1277 | && GET_CODE (XEXP (elt->exp, 1)) == CONST_INT)) |
1278 | { |
1279 | rtx x; |
1280 | |
1281 | /* Ignore expressions that are no longer valid. */ |
1282 | if (!REG_P (elt->exp) && !exp_equiv_p (elt->exp, elt->exp, 1, false)) |
1283 | continue; |
1284 | |
1285 | x = plus_constant (GET_MODE (elt->exp), elt->exp, offs); |
1286 | if (REG_P (x) |
1287 | || (GET_CODE (x) == PLUS |
1288 | && IN_RANGE (INTVAL (XEXP (x, 1)), |
1289 | -targetm.const_anchor, |
1290 | targetm.const_anchor - 1))) |
1291 | { |
1292 | match = x; |
1293 | match_elt = elt; |
1294 | *old = idx; |
1295 | } |
1296 | } |
1297 | } |
1298 | |
1299 | return match; |
1300 | } |
1301 | |
1302 | /* Try to express the constant SRC_CONST using a register+offset expression |
1303 | derived from a constant anchor. Return it if successful or NULL_RTX, |
1304 | otherwise. */ |
1305 | |
1306 | static rtx |
1307 | try_const_anchors (rtx src_const, machine_mode mode) |
1308 | { |
1309 | struct table_elt *lower_elt, *upper_elt; |
1310 | HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs; |
1311 | rtx lower_anchor_rtx, upper_anchor_rtx; |
1312 | rtx lower_exp = NULL_RTX, upper_exp = NULL_RTX; |
1313 | unsigned lower_old, upper_old; |
1314 | |
1315 | /* CONST_INT may be in various modes, avoid non-scalar-int mode. */ |
1316 | if (!SCALAR_INT_MODE_P (mode)) |
1317 | return NULL_RTX; |
1318 | |
1319 | if (!compute_const_anchors (cst: src_const, lower_base: &lower_base, lower_offs: &lower_offs, |
1320 | upper_base: &upper_base, upper_offs: &upper_offs)) |
1321 | return NULL_RTX; |
1322 | |
1323 | lower_anchor_rtx = GEN_INT (lower_base); |
1324 | upper_anchor_rtx = GEN_INT (upper_base); |
1325 | lower_elt = lookup (lower_anchor_rtx, HASH (x: lower_anchor_rtx, mode), mode); |
1326 | upper_elt = lookup (upper_anchor_rtx, HASH (x: upper_anchor_rtx, mode), mode); |
1327 | |
1328 | if (lower_elt) |
1329 | lower_exp = find_reg_offset_for_const (anchor_elt: lower_elt, offs: lower_offs, old: &lower_old); |
1330 | if (upper_elt) |
1331 | upper_exp = find_reg_offset_for_const (anchor_elt: upper_elt, offs: upper_offs, old: &upper_old); |
1332 | |
1333 | if (!lower_exp) |
1334 | return upper_exp; |
1335 | if (!upper_exp) |
1336 | return lower_exp; |
1337 | |
1338 | /* Return the older expression. */ |
1339 | return (upper_old > lower_old ? upper_exp : lower_exp); |
1340 | } |
1341 | |
1342 | /* Look in or update the hash table. */ |
1343 | |
1344 | /* Remove table element ELT from use in the table. |
1345 | HASH is its hash code, made using the HASH macro. |
1346 | It's an argument because often that is known in advance |
1347 | and we save much time not recomputing it. */ |
1348 | |
1349 | static void |
1350 | remove_from_table (struct table_elt *elt, unsigned int hash) |
1351 | { |
1352 | if (elt == 0) |
1353 | return; |
1354 | |
1355 | /* Mark this element as removed. See cse_insn. */ |
1356 | elt->first_same_value = 0; |
1357 | |
1358 | /* Remove the table element from its equivalence class. */ |
1359 | |
1360 | { |
1361 | struct table_elt *prev = elt->prev_same_value; |
1362 | struct table_elt *next = elt->next_same_value; |
1363 | |
1364 | if (next) |
1365 | next->prev_same_value = prev; |
1366 | |
1367 | if (prev) |
1368 | prev->next_same_value = next; |
1369 | else |
1370 | { |
1371 | struct table_elt *newfirst = next; |
1372 | while (next) |
1373 | { |
1374 | next->first_same_value = newfirst; |
1375 | next = next->next_same_value; |
1376 | } |
1377 | } |
1378 | } |
1379 | |
1380 | /* Remove the table element from its hash bucket. */ |
1381 | |
1382 | { |
1383 | struct table_elt *prev = elt->prev_same_hash; |
1384 | struct table_elt *next = elt->next_same_hash; |
1385 | |
1386 | if (next) |
1387 | next->prev_same_hash = prev; |
1388 | |
1389 | if (prev) |
1390 | prev->next_same_hash = next; |
1391 | else if (table[hash] == elt) |
1392 | table[hash] = next; |
1393 | else |
1394 | { |
1395 | /* This entry is not in the proper hash bucket. This can happen |
1396 | when two classes were merged by `merge_equiv_classes'. Search |
1397 | for the hash bucket that it heads. This happens only very |
1398 | rarely, so the cost is acceptable. */ |
1399 | for (hash = 0; hash < HASH_SIZE; hash++) |
1400 | if (table[hash] == elt) |
1401 | table[hash] = next; |
1402 | } |
1403 | } |
1404 | |
1405 | /* Remove the table element from its related-value circular chain. */ |
1406 | |
1407 | if (elt->related_value != 0 && elt->related_value != elt) |
1408 | { |
1409 | struct table_elt *p = elt->related_value; |
1410 | |
1411 | while (p->related_value != elt) |
1412 | p = p->related_value; |
1413 | p->related_value = elt->related_value; |
1414 | if (p->related_value == p) |
1415 | p->related_value = 0; |
1416 | } |
1417 | |
1418 | /* Now add it to the free element chain. */ |
1419 | elt->next_same_hash = free_element_chain; |
1420 | free_element_chain = elt; |
1421 | } |
1422 | |
1423 | /* Same as above, but X is a pseudo-register. */ |
1424 | |
1425 | static void |
1426 | remove_pseudo_from_table (rtx x, unsigned int hash) |
1427 | { |
1428 | struct table_elt *elt; |
1429 | |
1430 | /* Because a pseudo-register can be referenced in more than one |
1431 | mode, we might have to remove more than one table entry. */ |
1432 | while ((elt = lookup_for_remove (x, hash, VOIDmode))) |
1433 | remove_from_table (elt, hash); |
1434 | } |
1435 | |
1436 | /* Look up X in the hash table and return its table element, |
1437 | or 0 if X is not in the table. |
1438 | |
1439 | MODE is the machine-mode of X, or if X is an integer constant |
1440 | with VOIDmode then MODE is the mode with which X will be used. |
1441 | |
1442 | Here we are satisfied to find an expression whose tree structure |
1443 | looks like X. */ |
1444 | |
1445 | static struct table_elt * |
1446 | lookup (rtx x, unsigned int hash, machine_mode mode) |
1447 | { |
1448 | struct table_elt *p; |
1449 | |
1450 | for (p = table[hash]; p; p = p->next_same_hash) |
1451 | if (mode == p->mode && ((x == p->exp && REG_P (x)) |
1452 | || exp_equiv_p (x, p->exp, !REG_P (x), false))) |
1453 | return p; |
1454 | |
1455 | return 0; |
1456 | } |
1457 | |
1458 | /* Like `lookup' but don't care whether the table element uses invalid regs. |
1459 | Also ignore discrepancies in the machine mode of a register. */ |
1460 | |
1461 | static struct table_elt * |
1462 | lookup_for_remove (rtx x, unsigned int hash, machine_mode mode) |
1463 | { |
1464 | struct table_elt *p; |
1465 | |
1466 | if (REG_P (x)) |
1467 | { |
1468 | unsigned int regno = REGNO (x); |
1469 | |
1470 | /* Don't check the machine mode when comparing registers; |
1471 | invalidating (REG:SI 0) also invalidates (REG:DF 0). */ |
1472 | for (p = table[hash]; p; p = p->next_same_hash) |
1473 | if (REG_P (p->exp) |
1474 | && REGNO (p->exp) == regno) |
1475 | return p; |
1476 | } |
1477 | else |
1478 | { |
1479 | for (p = table[hash]; p; p = p->next_same_hash) |
1480 | if (mode == p->mode |
1481 | && (x == p->exp || exp_equiv_p (x, p->exp, 0, false))) |
1482 | return p; |
1483 | } |
1484 | |
1485 | return 0; |
1486 | } |
1487 | |
1488 | /* Look for an expression equivalent to X and with code CODE. |
1489 | If one is found, return that expression. */ |
1490 | |
1491 | static rtx |
1492 | lookup_as_function (rtx x, enum rtx_code code) |
1493 | { |
1494 | struct table_elt *p |
1495 | = lookup (x, hash: SAFE_HASH (x, VOIDmode), GET_MODE (x)); |
1496 | |
1497 | if (p == 0) |
1498 | return 0; |
1499 | |
1500 | for (p = p->first_same_value; p; p = p->next_same_value) |
1501 | if (GET_CODE (p->exp) == code |
1502 | /* Make sure this is a valid entry in the table. */ |
1503 | && exp_equiv_p (p->exp, p->exp, 1, false)) |
1504 | return p->exp; |
1505 | |
1506 | return 0; |
1507 | } |
1508 | |
1509 | /* Insert X in the hash table, assuming HASH is its hash code and |
1510 | CLASSP is an element of the class it should go in (or 0 if a new |
1511 | class should be made). COST is the code of X and reg_cost is the |
1512 | cost of registers in X. It is inserted at the proper position to |
1513 | keep the class in the order cheapest first. |
1514 | |
1515 | MODE is the machine-mode of X, or if X is an integer constant |
1516 | with VOIDmode then MODE is the mode with which X will be used. |
1517 | |
1518 | For elements of equal cheapness, the most recent one |
1519 | goes in front, except that the first element in the list |
1520 | remains first unless a cheaper element is added. The order of |
1521 | pseudo-registers does not matter, as canon_reg will be called to |
1522 | find the cheapest when a register is retrieved from the table. |
1523 | |
1524 | The in_memory field in the hash table element is set to 0. |
1525 | The caller must set it nonzero if appropriate. |
1526 | |
1527 | You should call insert_regs (X, CLASSP, MODIFY) before calling here, |
1528 | and if insert_regs returns a nonzero value |
1529 | you must then recompute its hash code before calling here. |
1530 | |
1531 | If necessary, update table showing constant values of quantities. */ |
1532 | |
1533 | static struct table_elt * |
1534 | insert_with_costs (rtx x, struct table_elt *classp, unsigned int hash, |
1535 | machine_mode mode, int cost, int reg_cost) |
1536 | { |
1537 | struct table_elt *elt; |
1538 | |
1539 | /* If X is a register and we haven't made a quantity for it, |
1540 | something is wrong. */ |
1541 | gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x))); |
1542 | |
1543 | /* If X is a hard register, show it is being put in the table. */ |
1544 | if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER) |
1545 | add_to_hard_reg_set (regs: &hard_regs_in_table, GET_MODE (x), REGNO (x)); |
1546 | |
1547 | /* Put an element for X into the right hash bucket. */ |
1548 | |
1549 | elt = free_element_chain; |
1550 | if (elt) |
1551 | free_element_chain = elt->next_same_hash; |
1552 | else |
1553 | elt = XNEW (struct table_elt); |
1554 | |
1555 | elt->exp = x; |
1556 | elt->canon_exp = NULL_RTX; |
1557 | elt->cost = cost; |
1558 | elt->regcost = reg_cost; |
1559 | elt->next_same_value = 0; |
1560 | elt->prev_same_value = 0; |
1561 | elt->next_same_hash = table[hash]; |
1562 | elt->prev_same_hash = 0; |
1563 | elt->related_value = 0; |
1564 | elt->in_memory = 0; |
1565 | elt->mode = mode; |
1566 | elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x)); |
1567 | |
1568 | if (table[hash]) |
1569 | table[hash]->prev_same_hash = elt; |
1570 | table[hash] = elt; |
1571 | |
1572 | /* Put it into the proper value-class. */ |
1573 | if (classp) |
1574 | { |
1575 | classp = classp->first_same_value; |
1576 | if (CHEAPER (elt, classp)) |
1577 | /* Insert at the head of the class. */ |
1578 | { |
1579 | struct table_elt *p; |
1580 | elt->next_same_value = classp; |
1581 | classp->prev_same_value = elt; |
1582 | elt->first_same_value = elt; |
1583 | |
1584 | for (p = classp; p; p = p->next_same_value) |
1585 | p->first_same_value = elt; |
1586 | } |
1587 | else |
1588 | { |
1589 | /* Insert not at head of the class. */ |
1590 | /* Put it after the last element cheaper than X. */ |
1591 | struct table_elt *p, *next; |
1592 | |
1593 | for (p = classp; |
1594 | (next = p->next_same_value) && CHEAPER (next, elt); |
1595 | p = next) |
1596 | ; |
1597 | |
1598 | /* Put it after P and before NEXT. */ |
1599 | elt->next_same_value = next; |
1600 | if (next) |
1601 | next->prev_same_value = elt; |
1602 | |
1603 | elt->prev_same_value = p; |
1604 | p->next_same_value = elt; |
1605 | elt->first_same_value = classp; |
1606 | } |
1607 | } |
1608 | else |
1609 | elt->first_same_value = elt; |
1610 | |
1611 | /* If this is a constant being set equivalent to a register or a register |
1612 | being set equivalent to a constant, note the constant equivalence. |
1613 | |
1614 | If this is a constant, it cannot be equivalent to a different constant, |
1615 | and a constant is the only thing that can be cheaper than a register. So |
1616 | we know the register is the head of the class (before the constant was |
1617 | inserted). |
1618 | |
1619 | If this is a register that is not already known equivalent to a |
1620 | constant, we must check the entire class. |
1621 | |
1622 | If this is a register that is already known equivalent to an insn, |
1623 | update the qtys `const_insn' to show that `this_insn' is the latest |
1624 | insn making that quantity equivalent to the constant. */ |
1625 | |
1626 | if (elt->is_const && classp && REG_P (classp->exp) |
1627 | && !REG_P (x)) |
1628 | { |
1629 | int exp_q = REG_QTY (REGNO (classp->exp)); |
1630 | struct qty_table_elem *exp_ent = &qty_table[exp_q]; |
1631 | |
1632 | exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x); |
1633 | exp_ent->const_insn = this_insn; |
1634 | } |
1635 | |
1636 | else if (REG_P (x) |
1637 | && classp |
1638 | && ! qty_table[REG_QTY (REGNO (x))].const_rtx |
1639 | && ! elt->is_const) |
1640 | { |
1641 | struct table_elt *p; |
1642 | |
1643 | for (p = classp; p != 0; p = p->next_same_value) |
1644 | { |
1645 | if (p->is_const && !REG_P (p->exp)) |
1646 | { |
1647 | int x_q = REG_QTY (REGNO (x)); |
1648 | struct qty_table_elem *x_ent = &qty_table[x_q]; |
1649 | |
1650 | x_ent->const_rtx |
1651 | = gen_lowpart (GET_MODE (x), p->exp); |
1652 | x_ent->const_insn = this_insn; |
1653 | break; |
1654 | } |
1655 | } |
1656 | } |
1657 | |
1658 | else if (REG_P (x) |
1659 | && qty_table[REG_QTY (REGNO (x))].const_rtx |
1660 | && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode) |
1661 | qty_table[REG_QTY (REGNO (x))].const_insn = this_insn; |
1662 | |
1663 | /* If this is a constant with symbolic value, |
1664 | and it has a term with an explicit integer value, |
1665 | link it up with related expressions. */ |
1666 | if (GET_CODE (x) == CONST) |
1667 | { |
1668 | rtx subexp = get_related_value (x); |
1669 | unsigned subhash; |
1670 | struct table_elt *subelt, *subelt_prev; |
1671 | |
1672 | if (subexp != 0) |
1673 | { |
1674 | /* Get the integer-free subexpression in the hash table. */ |
1675 | subhash = SAFE_HASH (x: subexp, mode); |
1676 | subelt = lookup (x: subexp, hash: subhash, mode); |
1677 | if (subelt == 0) |
1678 | subelt = insert (subexp, NULL, subhash, mode); |
1679 | /* Initialize SUBELT's circular chain if it has none. */ |
1680 | if (subelt->related_value == 0) |
1681 | subelt->related_value = subelt; |
1682 | /* Find the element in the circular chain that precedes SUBELT. */ |
1683 | subelt_prev = subelt; |
1684 | while (subelt_prev->related_value != subelt) |
1685 | subelt_prev = subelt_prev->related_value; |
1686 | /* Put new ELT into SUBELT's circular chain just before SUBELT. |
1687 | This way the element that follows SUBELT is the oldest one. */ |
1688 | elt->related_value = subelt_prev->related_value; |
1689 | subelt_prev->related_value = elt; |
1690 | } |
1691 | } |
1692 | |
1693 | return elt; |
1694 | } |
1695 | |
1696 | /* Wrap insert_with_costs by passing the default costs. */ |
1697 | |
1698 | static struct table_elt * |
1699 | insert (rtx x, struct table_elt *classp, unsigned int hash, |
1700 | machine_mode mode) |
1701 | { |
1702 | return insert_with_costs (x, classp, hash, mode, |
1703 | COST (x, mode), reg_cost: approx_reg_cost (x)); |
1704 | } |
1705 | |
1706 | |
1707 | /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from |
1708 | CLASS2 into CLASS1. This is done when we have reached an insn which makes |
1709 | the two classes equivalent. |
1710 | |
1711 | CLASS1 will be the surviving class; CLASS2 should not be used after this |
1712 | call. |
1713 | |
1714 | Any invalid entries in CLASS2 will not be copied. */ |
1715 | |
1716 | static void |
1717 | merge_equiv_classes (struct table_elt *class1, struct table_elt *class2) |
1718 | { |
1719 | struct table_elt *elt, *next, *new_elt; |
1720 | |
1721 | /* Ensure we start with the head of the classes. */ |
1722 | class1 = class1->first_same_value; |
1723 | class2 = class2->first_same_value; |
1724 | |
1725 | /* If they were already equal, forget it. */ |
1726 | if (class1 == class2) |
1727 | return; |
1728 | |
1729 | for (elt = class2; elt; elt = next) |
1730 | { |
1731 | unsigned int hash; |
1732 | rtx exp = elt->exp; |
1733 | machine_mode mode = elt->mode; |
1734 | |
1735 | next = elt->next_same_value; |
1736 | |
1737 | /* Remove old entry, make a new one in CLASS1's class. |
1738 | Don't do this for invalid entries as we cannot find their |
1739 | hash code (it also isn't necessary). */ |
1740 | if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false)) |
1741 | { |
1742 | bool need_rehash = false; |
1743 | |
1744 | hash_arg_in_memory = 0; |
1745 | hash = HASH (x: exp, mode); |
1746 | |
1747 | if (REG_P (exp)) |
1748 | { |
1749 | need_rehash = REGNO_QTY_VALID_P (REGNO (exp)); |
1750 | delete_reg_equiv (REGNO (exp)); |
1751 | } |
1752 | |
1753 | if (REG_P (exp) && REGNO (exp) >= FIRST_PSEUDO_REGISTER) |
1754 | remove_pseudo_from_table (x: exp, hash); |
1755 | else |
1756 | remove_from_table (elt, hash); |
1757 | |
1758 | if (insert_regs (x: exp, classp: class1, modified: false) || need_rehash) |
1759 | { |
1760 | rehash_using_reg (exp); |
1761 | hash = HASH (x: exp, mode); |
1762 | } |
1763 | new_elt = insert (x: exp, classp: class1, hash, mode); |
1764 | new_elt->in_memory = hash_arg_in_memory; |
1765 | if (GET_CODE (exp) == ASM_OPERANDS && elt->cost == MAX_COST) |
1766 | new_elt->cost = MAX_COST; |
1767 | } |
1768 | } |
1769 | } |
1770 | |
1771 | /* Flush the entire hash table. */ |
1772 | |
1773 | static void |
1774 | flush_hash_table (void) |
1775 | { |
1776 | int i; |
1777 | struct table_elt *p; |
1778 | |
1779 | for (i = 0; i < HASH_SIZE; i++) |
1780 | for (p = table[i]; p; p = table[i]) |
1781 | { |
1782 | /* Note that invalidate can remove elements |
1783 | after P in the current hash chain. */ |
1784 | if (REG_P (p->exp)) |
1785 | invalidate (p->exp, VOIDmode); |
1786 | else |
1787 | remove_from_table (elt: p, hash: i); |
1788 | } |
1789 | } |
1790 | |
1791 | /* Check whether an anti dependence exists between X and EXP. MODE and |
1792 | ADDR are as for canon_anti_dependence. */ |
1793 | |
1794 | static bool |
1795 | check_dependence (const_rtx x, rtx exp, machine_mode mode, rtx addr) |
1796 | { |
1797 | subrtx_iterator::array_type array; |
1798 | FOR_EACH_SUBRTX (iter, array, x, NONCONST) |
1799 | { |
1800 | const_rtx x = *iter; |
1801 | if (MEM_P (x) && canon_anti_dependence (x, true, exp, mode, addr)) |
1802 | return true; |
1803 | } |
1804 | return false; |
1805 | } |
1806 | |
1807 | /* Remove from the hash table, or mark as invalid, all expressions whose |
1808 | values could be altered by storing in register X. */ |
1809 | |
1810 | static void |
1811 | invalidate_reg (rtx x) |
1812 | { |
1813 | gcc_assert (GET_CODE (x) == REG); |
1814 | |
1815 | /* If X is a register, dependencies on its contents are recorded |
1816 | through the qty number mechanism. Just change the qty number of |
1817 | the register, mark it as invalid for expressions that refer to it, |
1818 | and remove it itself. */ |
1819 | unsigned int regno = REGNO (x); |
1820 | unsigned int hash = HASH (x, GET_MODE (x)); |
1821 | |
1822 | /* Remove REGNO from any quantity list it might be on and indicate |
1823 | that its value might have changed. If it is a pseudo, remove its |
1824 | entry from the hash table. |
1825 | |
1826 | For a hard register, we do the first two actions above for any |
1827 | additional hard registers corresponding to X. Then, if any of these |
1828 | registers are in the table, we must remove any REG entries that |
1829 | overlap these registers. */ |
1830 | |
1831 | delete_reg_equiv (reg: regno); |
1832 | REG_TICK (regno)++; |
1833 | SUBREG_TICKED (regno) = -1; |
1834 | |
1835 | if (regno >= FIRST_PSEUDO_REGISTER) |
1836 | remove_pseudo_from_table (x, hash); |
1837 | else |
1838 | { |
1839 | HOST_WIDE_INT in_table = TEST_HARD_REG_BIT (set: hard_regs_in_table, bit: regno); |
1840 | unsigned int endregno = END_REGNO (x); |
1841 | unsigned int rn; |
1842 | struct table_elt *p, *next; |
1843 | |
1844 | CLEAR_HARD_REG_BIT (set&: hard_regs_in_table, bit: regno); |
1845 | |
1846 | for (rn = regno + 1; rn < endregno; rn++) |
1847 | { |
1848 | in_table |= TEST_HARD_REG_BIT (set: hard_regs_in_table, bit: rn); |
1849 | CLEAR_HARD_REG_BIT (set&: hard_regs_in_table, bit: rn); |
1850 | delete_reg_equiv (reg: rn); |
1851 | REG_TICK (rn)++; |
1852 | SUBREG_TICKED (rn) = -1; |
1853 | } |
1854 | |
1855 | if (in_table) |
1856 | for (hash = 0; hash < HASH_SIZE; hash++) |
1857 | for (p = table[hash]; p; p = next) |
1858 | { |
1859 | next = p->next_same_hash; |
1860 | |
1861 | if (!REG_P (p->exp) || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) |
1862 | continue; |
1863 | |
1864 | unsigned int tregno = REGNO (p->exp); |
1865 | unsigned int tendregno = END_REGNO (x: p->exp); |
1866 | if (tendregno > regno && tregno < endregno) |
1867 | remove_from_table (elt: p, hash); |
1868 | } |
1869 | } |
1870 | } |
1871 | |
1872 | /* Remove from the hash table, or mark as invalid, all expressions whose |
1873 | values could be altered by storing in X. X is a register, a subreg, or |
1874 | a memory reference with nonvarying address (because, when a memory |
1875 | reference with a varying address is stored in, all memory references are |
1876 | removed by invalidate_memory so specific invalidation is superfluous). |
1877 | FULL_MODE, if not VOIDmode, indicates that this much should be |
1878 | invalidated instead of just the amount indicated by the mode of X. This |
1879 | is only used for bitfield stores into memory. |
1880 | |
1881 | A nonvarying address may be just a register or just a symbol reference, |
1882 | or it may be either of those plus a numeric offset. */ |
1883 | |
1884 | static void |
1885 | invalidate (rtx x, machine_mode full_mode) |
1886 | { |
1887 | int i; |
1888 | struct table_elt *p; |
1889 | rtx addr; |
1890 | |
1891 | switch (GET_CODE (x)) |
1892 | { |
1893 | case REG: |
1894 | invalidate_reg (x); |
1895 | return; |
1896 | |
1897 | case SUBREG: |
1898 | invalidate (SUBREG_REG (x), VOIDmode); |
1899 | return; |
1900 | |
1901 | case PARALLEL: |
1902 | for (i = XVECLEN (x, 0) - 1; i >= 0; --i) |
1903 | invalidate (XVECEXP (x, 0, i), VOIDmode); |
1904 | return; |
1905 | |
1906 | case EXPR_LIST: |
1907 | /* This is part of a disjoint return value; extract the location in |
1908 | question ignoring the offset. */ |
1909 | invalidate (XEXP (x, 0), VOIDmode); |
1910 | return; |
1911 | |
1912 | case MEM: |
1913 | addr = canon_rtx (get_addr (XEXP (x, 0))); |
1914 | /* Calculate the canonical version of X here so that |
1915 | true_dependence doesn't generate new RTL for X on each call. */ |
1916 | x = canon_rtx (x); |
1917 | |
1918 | /* Remove all hash table elements that refer to overlapping pieces of |
1919 | memory. */ |
1920 | if (full_mode == VOIDmode) |
1921 | full_mode = GET_MODE (x); |
1922 | |
1923 | for (i = 0; i < HASH_SIZE; i++) |
1924 | { |
1925 | struct table_elt *next; |
1926 | |
1927 | for (p = table[i]; p; p = next) |
1928 | { |
1929 | next = p->next_same_hash; |
1930 | if (p->in_memory) |
1931 | { |
1932 | /* Just canonicalize the expression once; |
1933 | otherwise each time we call invalidate |
1934 | true_dependence will canonicalize the |
1935 | expression again. */ |
1936 | if (!p->canon_exp) |
1937 | p->canon_exp = canon_rtx (p->exp); |
1938 | if (check_dependence (x: p->canon_exp, exp: x, mode: full_mode, addr)) |
1939 | remove_from_table (elt: p, hash: i); |
1940 | } |
1941 | } |
1942 | } |
1943 | return; |
1944 | |
1945 | default: |
1946 | gcc_unreachable (); |
1947 | } |
1948 | } |
1949 | |
1950 | /* Invalidate DEST. Used when DEST is not going to be added |
1951 | into the hash table for some reason, e.g. do_not_record |
1952 | flagged on it. */ |
1953 | |
1954 | static void |
1955 | invalidate_dest (rtx dest) |
1956 | { |
1957 | if (REG_P (dest) |
1958 | || GET_CODE (dest) == SUBREG |
1959 | || MEM_P (dest)) |
1960 | invalidate (x: dest, VOIDmode); |
1961 | else if (GET_CODE (dest) == STRICT_LOW_PART |
1962 | || GET_CODE (dest) == ZERO_EXTRACT) |
1963 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
1964 | } |
1965 | |
1966 | /* Remove all expressions that refer to register REGNO, |
1967 | since they are already invalid, and we are about to |
1968 | mark that register valid again and don't want the old |
1969 | expressions to reappear as valid. */ |
1970 | |
1971 | static void |
1972 | remove_invalid_refs (unsigned int regno) |
1973 | { |
1974 | unsigned int i; |
1975 | struct table_elt *p, *next; |
1976 | |
1977 | for (i = 0; i < HASH_SIZE; i++) |
1978 | for (p = table[i]; p; p = next) |
1979 | { |
1980 | next = p->next_same_hash; |
1981 | if (!REG_P (p->exp) && refers_to_regno_p (regnum: regno, x: p->exp)) |
1982 | remove_from_table (elt: p, hash: i); |
1983 | } |
1984 | } |
1985 | |
1986 | /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET, |
1987 | and mode MODE. */ |
1988 | static void |
1989 | remove_invalid_subreg_refs (unsigned int regno, poly_uint64 offset, |
1990 | machine_mode mode) |
1991 | { |
1992 | unsigned int i; |
1993 | struct table_elt *p, *next; |
1994 | |
1995 | for (i = 0; i < HASH_SIZE; i++) |
1996 | for (p = table[i]; p; p = next) |
1997 | { |
1998 | rtx exp = p->exp; |
1999 | next = p->next_same_hash; |
2000 | |
2001 | if (!REG_P (exp) |
2002 | && (GET_CODE (exp) != SUBREG |
2003 | || !REG_P (SUBREG_REG (exp)) |
2004 | || REGNO (SUBREG_REG (exp)) != regno |
2005 | || ranges_maybe_overlap_p (SUBREG_BYTE (exp), |
2006 | size1: GET_MODE_SIZE (GET_MODE (exp)), |
2007 | pos2: offset, size2: GET_MODE_SIZE (mode))) |
2008 | && refers_to_regno_p (regnum: regno, x: p->exp)) |
2009 | remove_from_table (elt: p, hash: i); |
2010 | } |
2011 | } |
2012 | |
2013 | /* Recompute the hash codes of any valid entries in the hash table that |
2014 | reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG. |
2015 | |
2016 | This is called when we make a jump equivalence. */ |
2017 | |
2018 | static void |
2019 | rehash_using_reg (rtx x) |
2020 | { |
2021 | unsigned int i; |
2022 | struct table_elt *p, *next; |
2023 | unsigned hash; |
2024 | |
2025 | if (GET_CODE (x) == SUBREG) |
2026 | x = SUBREG_REG (x); |
2027 | |
2028 | /* If X is not a register or if the register is known not to be in any |
2029 | valid entries in the table, we have no work to do. */ |
2030 | |
2031 | if (!REG_P (x) |
2032 | || REG_IN_TABLE (REGNO (x)) < 0 |
2033 | || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x))) |
2034 | return; |
2035 | |
2036 | /* Scan all hash chains looking for valid entries that mention X. |
2037 | If we find one and it is in the wrong hash chain, move it. */ |
2038 | |
2039 | for (i = 0; i < HASH_SIZE; i++) |
2040 | for (p = table[i]; p; p = next) |
2041 | { |
2042 | next = p->next_same_hash; |
2043 | if (reg_mentioned_p (x, p->exp) |
2044 | && exp_equiv_p (p->exp, p->exp, 1, false) |
2045 | && i != (hash = SAFE_HASH (x: p->exp, mode: p->mode))) |
2046 | { |
2047 | if (p->next_same_hash) |
2048 | p->next_same_hash->prev_same_hash = p->prev_same_hash; |
2049 | |
2050 | if (p->prev_same_hash) |
2051 | p->prev_same_hash->next_same_hash = p->next_same_hash; |
2052 | else |
2053 | table[i] = p->next_same_hash; |
2054 | |
2055 | p->next_same_hash = table[hash]; |
2056 | p->prev_same_hash = 0; |
2057 | if (table[hash]) |
2058 | table[hash]->prev_same_hash = p; |
2059 | table[hash] = p; |
2060 | } |
2061 | } |
2062 | } |
2063 | |
2064 | /* Remove from the hash table any expression that is a call-clobbered |
2065 | register in INSN. Also update their TICK values. */ |
2066 | |
2067 | static void |
2068 | invalidate_for_call (rtx_insn *insn) |
2069 | { |
2070 | unsigned int regno; |
2071 | unsigned hash; |
2072 | struct table_elt *p, *next; |
2073 | int in_table = 0; |
2074 | hard_reg_set_iterator hrsi; |
2075 | |
2076 | /* Go through all the hard registers. For each that might be clobbered |
2077 | in call insn INSN, remove the register from quantity chains and update |
2078 | reg_tick if defined. Also see if any of these registers is currently |
2079 | in the table. |
2080 | |
2081 | ??? We could be more precise for partially-clobbered registers, |
2082 | and only invalidate values that actually occupy the clobbered part |
2083 | of the registers. It doesn't seem worth the effort though, since |
2084 | we shouldn't see this situation much before RA. Whatever choice |
2085 | we make here has to be consistent with the table walk below, |
2086 | so any change to this test will require a change there too. */ |
2087 | HARD_REG_SET callee_clobbers |
2088 | = insn_callee_abi (insn).full_and_partial_reg_clobbers (); |
2089 | EXECUTE_IF_SET_IN_HARD_REG_SET (callee_clobbers, 0, regno, hrsi) |
2090 | { |
2091 | delete_reg_equiv (reg: regno); |
2092 | if (REG_TICK (regno) >= 0) |
2093 | { |
2094 | REG_TICK (regno)++; |
2095 | SUBREG_TICKED (regno) = -1; |
2096 | } |
2097 | in_table |= (TEST_HARD_REG_BIT (set: hard_regs_in_table, bit: regno) != 0); |
2098 | } |
2099 | |
2100 | /* In the case where we have no call-clobbered hard registers in the |
2101 | table, we are done. Otherwise, scan the table and remove any |
2102 | entry that overlaps a call-clobbered register. */ |
2103 | |
2104 | if (in_table) |
2105 | for (hash = 0; hash < HASH_SIZE; hash++) |
2106 | for (p = table[hash]; p; p = next) |
2107 | { |
2108 | next = p->next_same_hash; |
2109 | |
2110 | if (!REG_P (p->exp) |
2111 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) |
2112 | continue; |
2113 | |
2114 | /* This must use the same test as above rather than the |
2115 | more accurate clobbers_reg_p. */ |
2116 | if (overlaps_hard_reg_set_p (regs: callee_clobbers, GET_MODE (p->exp), |
2117 | REGNO (p->exp))) |
2118 | remove_from_table (elt: p, hash); |
2119 | } |
2120 | } |
2121 | |
2122 | /* Given an expression X of type CONST, |
2123 | and ELT which is its table entry (or 0 if it |
2124 | is not in the hash table), |
2125 | return an alternate expression for X as a register plus integer. |
2126 | If none can be found, return 0. */ |
2127 | |
2128 | static rtx |
2129 | use_related_value (rtx x, struct table_elt *elt) |
2130 | { |
2131 | struct table_elt *relt = 0; |
2132 | struct table_elt *p, *q; |
2133 | HOST_WIDE_INT offset; |
2134 | |
2135 | /* First, is there anything related known? |
2136 | If we have a table element, we can tell from that. |
2137 | Otherwise, must look it up. */ |
2138 | |
2139 | if (elt != 0 && elt->related_value != 0) |
2140 | relt = elt; |
2141 | else if (elt == 0 && GET_CODE (x) == CONST) |
2142 | { |
2143 | rtx subexp = get_related_value (x); |
2144 | if (subexp != 0) |
2145 | relt = lookup (x: subexp, |
2146 | hash: SAFE_HASH (x: subexp, GET_MODE (subexp)), |
2147 | GET_MODE (subexp)); |
2148 | } |
2149 | |
2150 | if (relt == 0) |
2151 | return 0; |
2152 | |
2153 | /* Search all related table entries for one that has an |
2154 | equivalent register. */ |
2155 | |
2156 | p = relt; |
2157 | while (1) |
2158 | { |
2159 | /* This loop is strange in that it is executed in two different cases. |
2160 | The first is when X is already in the table. Then it is searching |
2161 | the RELATED_VALUE list of X's class (RELT). The second case is when |
2162 | X is not in the table. Then RELT points to a class for the related |
2163 | value. |
2164 | |
2165 | Ensure that, whatever case we are in, that we ignore classes that have |
2166 | the same value as X. */ |
2167 | |
2168 | if (rtx_equal_p (x, p->exp)) |
2169 | q = 0; |
2170 | else |
2171 | for (q = p->first_same_value; q; q = q->next_same_value) |
2172 | if (REG_P (q->exp)) |
2173 | break; |
2174 | |
2175 | if (q) |
2176 | break; |
2177 | |
2178 | p = p->related_value; |
2179 | |
2180 | /* We went all the way around, so there is nothing to be found. |
2181 | Alternatively, perhaps RELT was in the table for some other reason |
2182 | and it has no related values recorded. */ |
2183 | if (p == relt || p == 0) |
2184 | break; |
2185 | } |
2186 | |
2187 | if (q == 0) |
2188 | return 0; |
2189 | |
2190 | offset = (get_integer_term (x) - get_integer_term (p->exp)); |
2191 | /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */ |
2192 | return plus_constant (q->mode, q->exp, offset); |
2193 | } |
2194 | |
2195 | |
2196 | /* Hash a string. Just add its bytes up. */ |
2197 | static inline unsigned |
2198 | hash_rtx_string (const char *ps) |
2199 | { |
2200 | unsigned hash = 0; |
2201 | const unsigned char *p = (const unsigned char *) ps; |
2202 | |
2203 | if (p) |
2204 | while (*p) |
2205 | hash += *p++; |
2206 | |
2207 | return hash; |
2208 | } |
2209 | |
2210 | /* Hash an rtx. We are careful to make sure the value is never negative. |
2211 | Equivalent registers hash identically. |
2212 | MODE is used in hashing for CONST_INTs only; |
2213 | otherwise the mode of X is used. |
2214 | |
2215 | Store 1 in DO_NOT_RECORD_P if any subexpression is volatile. |
2216 | |
2217 | If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains |
2218 | a MEM rtx which does not have the MEM_READONLY_P flag set. |
2219 | |
2220 | Note that cse_insn knows that the hash code of a MEM expression |
2221 | is just (int) MEM plus the hash code of the address. |
2222 | |
2223 | Call CB on each rtx if CB is not NULL. |
2224 | When the callback returns true, we continue with the new rtx. */ |
2225 | |
2226 | unsigned |
2227 | hash_rtx (const_rtx x, machine_mode mode, |
2228 | int *do_not_record_p, int *hash_arg_in_memory_p, |
2229 | bool have_reg_qty, hash_rtx_callback_function cb) |
2230 | { |
2231 | int i, j; |
2232 | unsigned hash = 0; |
2233 | enum rtx_code code; |
2234 | const char *fmt; |
2235 | machine_mode newmode; |
2236 | rtx newx; |
2237 | |
2238 | /* Used to turn recursion into iteration. We can't rely on GCC's |
2239 | tail-recursion elimination since we need to keep accumulating values |
2240 | in HASH. */ |
2241 | repeat: |
2242 | if (x == 0) |
2243 | return hash; |
2244 | |
2245 | /* Invoke the callback first. */ |
2246 | if (cb != NULL |
2247 | && ((*cb) (x, mode, &newx, &newmode))) |
2248 | { |
2249 | hash += hash_rtx (x: newx, mode: newmode, do_not_record_p, |
2250 | hash_arg_in_memory_p, have_reg_qty, cb); |
2251 | return hash; |
2252 | } |
2253 | |
2254 | code = GET_CODE (x); |
2255 | switch (code) |
2256 | { |
2257 | case REG: |
2258 | { |
2259 | unsigned int regno = REGNO (x); |
2260 | |
2261 | if (do_not_record_p && !reload_completed) |
2262 | { |
2263 | /* On some machines, we can't record any non-fixed hard register, |
2264 | because extending its life will cause reload problems. We |
2265 | consider ap, fp, sp, gp to be fixed for this purpose. |
2266 | |
2267 | We also consider CCmode registers to be fixed for this purpose; |
2268 | failure to do so leads to failure to simplify 0<100 type of |
2269 | conditionals. |
2270 | |
2271 | On all machines, we can't record any global registers. |
2272 | Nor should we record any register that is in a small |
2273 | class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. */ |
2274 | bool record; |
2275 | |
2276 | if (regno >= FIRST_PSEUDO_REGISTER) |
2277 | record = true; |
2278 | else if (x == frame_pointer_rtx |
2279 | || x == hard_frame_pointer_rtx |
2280 | || x == arg_pointer_rtx |
2281 | || x == stack_pointer_rtx |
2282 | || x == pic_offset_table_rtx) |
2283 | record = true; |
2284 | else if (global_regs[regno]) |
2285 | record = false; |
2286 | else if (fixed_regs[regno]) |
2287 | record = true; |
2288 | else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC) |
2289 | record = true; |
2290 | else if (targetm.small_register_classes_for_mode_p (GET_MODE (x))) |
2291 | record = false; |
2292 | else if (targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno))) |
2293 | record = false; |
2294 | else |
2295 | record = true; |
2296 | |
2297 | if (!record) |
2298 | { |
2299 | *do_not_record_p = 1; |
2300 | return 0; |
2301 | } |
2302 | } |
2303 | |
2304 | hash += ((unsigned int) REG << 7); |
2305 | hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno); |
2306 | return hash; |
2307 | } |
2308 | |
2309 | /* We handle SUBREG of a REG specially because the underlying |
2310 | reg changes its hash value with every value change; we don't |
2311 | want to have to forget unrelated subregs when one subreg changes. */ |
2312 | case SUBREG: |
2313 | { |
2314 | if (REG_P (SUBREG_REG (x))) |
2315 | { |
2316 | hash += (((unsigned int) SUBREG << 7) |
2317 | + REGNO (SUBREG_REG (x)) |
2318 | + (constant_lower_bound (SUBREG_BYTE (x)) |
2319 | / UNITS_PER_WORD)); |
2320 | return hash; |
2321 | } |
2322 | break; |
2323 | } |
2324 | |
2325 | case CONST_INT: |
2326 | hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode |
2327 | + (unsigned int) INTVAL (x)); |
2328 | return hash; |
2329 | |
2330 | case CONST_WIDE_INT: |
2331 | for (i = 0; i < CONST_WIDE_INT_NUNITS (x); i++) |
2332 | hash += CONST_WIDE_INT_ELT (x, i); |
2333 | return hash; |
2334 | |
2335 | case CONST_POLY_INT: |
2336 | { |
2337 | inchash::hash h; |
2338 | h.add_int (v: hash); |
2339 | for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i) |
2340 | h.add_wide_int (CONST_POLY_INT_COEFFS (x)[i]); |
2341 | return h.end (); |
2342 | } |
2343 | |
2344 | case CONST_DOUBLE: |
2345 | /* This is like the general case, except that it only counts |
2346 | the integers representing the constant. */ |
2347 | hash += (unsigned int) code + (unsigned int) GET_MODE (x); |
2348 | if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (x) == VOIDmode) |
2349 | hash += ((unsigned int) CONST_DOUBLE_LOW (x) |
2350 | + (unsigned int) CONST_DOUBLE_HIGH (x)); |
2351 | else |
2352 | hash += real_hash (CONST_DOUBLE_REAL_VALUE (x)); |
2353 | return hash; |
2354 | |
2355 | case CONST_FIXED: |
2356 | hash += (unsigned int) code + (unsigned int) GET_MODE (x); |
2357 | hash += fixed_hash (CONST_FIXED_VALUE (x)); |
2358 | return hash; |
2359 | |
2360 | case CONST_VECTOR: |
2361 | { |
2362 | int units; |
2363 | rtx elt; |
2364 | |
2365 | units = const_vector_encoded_nelts (x); |
2366 | |
2367 | for (i = 0; i < units; ++i) |
2368 | { |
2369 | elt = CONST_VECTOR_ENCODED_ELT (x, i); |
2370 | hash += hash_rtx (x: elt, GET_MODE (elt), |
2371 | do_not_record_p, hash_arg_in_memory_p, |
2372 | have_reg_qty, cb); |
2373 | } |
2374 | |
2375 | return hash; |
2376 | } |
2377 | |
2378 | /* Assume there is only one rtx object for any given label. */ |
2379 | case LABEL_REF: |
2380 | /* We don't hash on the address of the CODE_LABEL to avoid bootstrap |
2381 | differences and differences between each stage's debugging dumps. */ |
2382 | hash += (((unsigned int) LABEL_REF << 7) |
2383 | + CODE_LABEL_NUMBER (label_ref_label (x))); |
2384 | return hash; |
2385 | |
2386 | case SYMBOL_REF: |
2387 | { |
2388 | /* Don't hash on the symbol's address to avoid bootstrap differences. |
2389 | Different hash values may cause expressions to be recorded in |
2390 | different orders and thus different registers to be used in the |
2391 | final assembler. This also avoids differences in the dump files |
2392 | between various stages. */ |
2393 | unsigned int h = 0; |
2394 | const unsigned char *p = (const unsigned char *) XSTR (x, 0); |
2395 | |
2396 | while (*p) |
2397 | h += (h << 7) + *p++; /* ??? revisit */ |
2398 | |
2399 | hash += ((unsigned int) SYMBOL_REF << 7) + h; |
2400 | return hash; |
2401 | } |
2402 | |
2403 | case MEM: |
2404 | /* We don't record if marked volatile or if BLKmode since we don't |
2405 | know the size of the move. */ |
2406 | if (do_not_record_p && (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)) |
2407 | { |
2408 | *do_not_record_p = 1; |
2409 | return 0; |
2410 | } |
2411 | if (hash_arg_in_memory_p && !MEM_READONLY_P (x)) |
2412 | *hash_arg_in_memory_p = 1; |
2413 | |
2414 | /* Now that we have already found this special case, |
2415 | might as well speed it up as much as possible. */ |
2416 | hash += (unsigned) MEM; |
2417 | x = XEXP (x, 0); |
2418 | goto repeat; |
2419 | |
2420 | case USE: |
2421 | /* A USE that mentions non-volatile memory needs special |
2422 | handling since the MEM may be BLKmode which normally |
2423 | prevents an entry from being made. Pure calls are |
2424 | marked by a USE which mentions BLKmode memory. |
2425 | See calls.cc:emit_call_1. */ |
2426 | if (MEM_P (XEXP (x, 0)) |
2427 | && ! MEM_VOLATILE_P (XEXP (x, 0))) |
2428 | { |
2429 | hash += (unsigned) USE; |
2430 | x = XEXP (x, 0); |
2431 | |
2432 | if (hash_arg_in_memory_p && !MEM_READONLY_P (x)) |
2433 | *hash_arg_in_memory_p = 1; |
2434 | |
2435 | /* Now that we have already found this special case, |
2436 | might as well speed it up as much as possible. */ |
2437 | hash += (unsigned) MEM; |
2438 | x = XEXP (x, 0); |
2439 | goto repeat; |
2440 | } |
2441 | break; |
2442 | |
2443 | case PRE_DEC: |
2444 | case PRE_INC: |
2445 | case POST_DEC: |
2446 | case POST_INC: |
2447 | case PRE_MODIFY: |
2448 | case POST_MODIFY: |
2449 | case PC: |
2450 | case CALL: |
2451 | case UNSPEC_VOLATILE: |
2452 | if (do_not_record_p) { |
2453 | *do_not_record_p = 1; |
2454 | return 0; |
2455 | } |
2456 | else |
2457 | return hash; |
2458 | break; |
2459 | |
2460 | case ASM_OPERANDS: |
2461 | if (do_not_record_p && MEM_VOLATILE_P (x)) |
2462 | { |
2463 | *do_not_record_p = 1; |
2464 | return 0; |
2465 | } |
2466 | else |
2467 | { |
2468 | /* We don't want to take the filename and line into account. */ |
2469 | hash += (unsigned) code + (unsigned) GET_MODE (x) |
2470 | + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x)) |
2471 | + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x)) |
2472 | + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x); |
2473 | |
2474 | if (ASM_OPERANDS_INPUT_LENGTH (x)) |
2475 | { |
2476 | for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++) |
2477 | { |
2478 | hash += (hash_rtx (ASM_OPERANDS_INPUT (x, i), |
2479 | GET_MODE (ASM_OPERANDS_INPUT (x, i)), |
2480 | do_not_record_p, hash_arg_in_memory_p, |
2481 | have_reg_qty, cb) |
2482 | + hash_rtx_string |
2483 | (ASM_OPERANDS_INPUT_CONSTRAINT (x, i))); |
2484 | } |
2485 | |
2486 | hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0)); |
2487 | x = ASM_OPERANDS_INPUT (x, 0); |
2488 | mode = GET_MODE (x); |
2489 | goto repeat; |
2490 | } |
2491 | |
2492 | return hash; |
2493 | } |
2494 | break; |
2495 | |
2496 | default: |
2497 | break; |
2498 | } |
2499 | |
2500 | i = GET_RTX_LENGTH (code) - 1; |
2501 | hash += (unsigned) code + (unsigned) GET_MODE (x); |
2502 | fmt = GET_RTX_FORMAT (code); |
2503 | for (; i >= 0; i--) |
2504 | { |
2505 | switch (fmt[i]) |
2506 | { |
2507 | case 'e': |
2508 | /* If we are about to do the last recursive call |
2509 | needed at this level, change it into iteration. |
2510 | This function is called enough to be worth it. */ |
2511 | if (i == 0) |
2512 | { |
2513 | x = XEXP (x, i); |
2514 | goto repeat; |
2515 | } |
2516 | |
2517 | hash += hash_rtx (XEXP (x, i), VOIDmode, do_not_record_p, |
2518 | hash_arg_in_memory_p, |
2519 | have_reg_qty, cb); |
2520 | break; |
2521 | |
2522 | case 'E': |
2523 | for (j = 0; j < XVECLEN (x, i); j++) |
2524 | hash += hash_rtx (XVECEXP (x, i, j), VOIDmode, do_not_record_p, |
2525 | hash_arg_in_memory_p, |
2526 | have_reg_qty, cb); |
2527 | break; |
2528 | |
2529 | case 's': |
2530 | hash += hash_rtx_string (XSTR (x, i)); |
2531 | break; |
2532 | |
2533 | case 'i': |
2534 | hash += (unsigned int) XINT (x, i); |
2535 | break; |
2536 | |
2537 | case 'p': |
2538 | hash += constant_lower_bound (SUBREG_BYTE (x)); |
2539 | break; |
2540 | |
2541 | case '0': case 't': |
2542 | /* Unused. */ |
2543 | break; |
2544 | |
2545 | default: |
2546 | gcc_unreachable (); |
2547 | } |
2548 | } |
2549 | |
2550 | return hash; |
2551 | } |
2552 | |
2553 | /* Hash an rtx X for cse via hash_rtx. |
2554 | Stores 1 in do_not_record if any subexpression is volatile. |
2555 | Stores 1 in hash_arg_in_memory if X contains a mem rtx which |
2556 | does not have the MEM_READONLY_P flag set. */ |
2557 | |
2558 | static inline unsigned |
2559 | canon_hash (rtx x, machine_mode mode) |
2560 | { |
2561 | return hash_rtx (x, mode, do_not_record_p: &do_not_record, hash_arg_in_memory_p: &hash_arg_in_memory, have_reg_qty: true); |
2562 | } |
2563 | |
2564 | /* Like canon_hash but with no side effects, i.e. do_not_record |
2565 | and hash_arg_in_memory are not changed. */ |
2566 | |
2567 | static inline unsigned |
2568 | safe_hash (rtx x, machine_mode mode) |
2569 | { |
2570 | int dummy_do_not_record; |
2571 | return hash_rtx (x, mode, do_not_record_p: &dummy_do_not_record, NULL, have_reg_qty: true); |
2572 | } |
2573 | |
2574 | /* Return true iff X and Y would canonicalize into the same thing, |
2575 | without actually constructing the canonicalization of either one. |
2576 | If VALIDATE is nonzero, |
2577 | we assume X is an expression being processed from the rtl |
2578 | and Y was found in the hash table. We check register refs |
2579 | in Y for being marked as valid. |
2580 | |
2581 | If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */ |
2582 | |
2583 | bool |
2584 | exp_equiv_p (const_rtx x, const_rtx y, int validate, bool for_gcse) |
2585 | { |
2586 | int i, j; |
2587 | enum rtx_code code; |
2588 | const char *fmt; |
2589 | |
2590 | /* Note: it is incorrect to assume an expression is equivalent to itself |
2591 | if VALIDATE is nonzero. */ |
2592 | if (x == y && !validate) |
2593 | return true; |
2594 | |
2595 | if (x == 0 || y == 0) |
2596 | return x == y; |
2597 | |
2598 | code = GET_CODE (x); |
2599 | if (code != GET_CODE (y)) |
2600 | return false; |
2601 | |
2602 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ |
2603 | if (GET_MODE (x) != GET_MODE (y)) |
2604 | return false; |
2605 | |
2606 | /* MEMs referring to different address space are not equivalent. */ |
2607 | if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y)) |
2608 | return false; |
2609 | |
2610 | switch (code) |
2611 | { |
2612 | case PC: |
2613 | CASE_CONST_UNIQUE: |
2614 | return x == y; |
2615 | |
2616 | case CONST_VECTOR: |
2617 | if (!same_vector_encodings_p (x, y)) |
2618 | return false; |
2619 | break; |
2620 | |
2621 | case LABEL_REF: |
2622 | return label_ref_label (ref: x) == label_ref_label (ref: y); |
2623 | |
2624 | case SYMBOL_REF: |
2625 | return XSTR (x, 0) == XSTR (y, 0); |
2626 | |
2627 | case REG: |
2628 | if (for_gcse) |
2629 | return REGNO (x) == REGNO (y); |
2630 | else |
2631 | { |
2632 | unsigned int regno = REGNO (y); |
2633 | unsigned int i; |
2634 | unsigned int endregno = END_REGNO (x: y); |
2635 | |
2636 | /* If the quantities are not the same, the expressions are not |
2637 | equivalent. If there are and we are not to validate, they |
2638 | are equivalent. Otherwise, ensure all regs are up-to-date. */ |
2639 | |
2640 | if (REG_QTY (REGNO (x)) != REG_QTY (regno)) |
2641 | return false; |
2642 | |
2643 | if (! validate) |
2644 | return true; |
2645 | |
2646 | for (i = regno; i < endregno; i++) |
2647 | if (REG_IN_TABLE (i) != REG_TICK (i)) |
2648 | return false; |
2649 | |
2650 | return true; |
2651 | } |
2652 | |
2653 | case MEM: |
2654 | if (for_gcse) |
2655 | { |
2656 | /* A volatile mem should not be considered equivalent to any |
2657 | other. */ |
2658 | if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y)) |
2659 | return false; |
2660 | |
2661 | /* Can't merge two expressions in different alias sets, since we |
2662 | can decide that the expression is transparent in a block when |
2663 | it isn't, due to it being set with the different alias set. |
2664 | |
2665 | Also, can't merge two expressions with different MEM_ATTRS. |
2666 | They could e.g. be two different entities allocated into the |
2667 | same space on the stack (see e.g. PR25130). In that case, the |
2668 | MEM addresses can be the same, even though the two MEMs are |
2669 | absolutely not equivalent. |
2670 | |
2671 | But because really all MEM attributes should be the same for |
2672 | equivalent MEMs, we just use the invariant that MEMs that have |
2673 | the same attributes share the same mem_attrs data structure. */ |
2674 | if (!mem_attrs_eq_p (MEM_ATTRS (x), MEM_ATTRS (y))) |
2675 | return false; |
2676 | |
2677 | /* If we are handling exceptions, we cannot consider two expressions |
2678 | with different trapping status as equivalent, because simple_mem |
2679 | might accept one and reject the other. */ |
2680 | if (cfun->can_throw_non_call_exceptions |
2681 | && (MEM_NOTRAP_P (x) != MEM_NOTRAP_P (y))) |
2682 | return false; |
2683 | } |
2684 | break; |
2685 | |
2686 | /* For commutative operations, check both orders. */ |
2687 | case PLUS: |
2688 | case MULT: |
2689 | case AND: |
2690 | case IOR: |
2691 | case XOR: |
2692 | case NE: |
2693 | case EQ: |
2694 | return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), |
2695 | validate, for_gcse) |
2696 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 1), |
2697 | validate, for_gcse)) |
2698 | || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1), |
2699 | validate, for_gcse) |
2700 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 0), |
2701 | validate, for_gcse))); |
2702 | |
2703 | case ASM_OPERANDS: |
2704 | /* We don't use the generic code below because we want to |
2705 | disregard filename and line numbers. */ |
2706 | |
2707 | /* A volatile asm isn't equivalent to any other. */ |
2708 | if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y)) |
2709 | return false; |
2710 | |
2711 | if (GET_MODE (x) != GET_MODE (y) |
2712 | || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y)) |
2713 | || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x), |
2714 | ASM_OPERANDS_OUTPUT_CONSTRAINT (y)) |
2715 | || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y) |
2716 | || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y)) |
2717 | return false; |
2718 | |
2719 | if (ASM_OPERANDS_INPUT_LENGTH (x)) |
2720 | { |
2721 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) |
2722 | if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i), |
2723 | ASM_OPERANDS_INPUT (y, i), |
2724 | validate, for_gcse) |
2725 | || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i), |
2726 | ASM_OPERANDS_INPUT_CONSTRAINT (y, i))) |
2727 | return false; |
2728 | } |
2729 | |
2730 | return true; |
2731 | |
2732 | default: |
2733 | break; |
2734 | } |
2735 | |
2736 | /* Compare the elements. If any pair of corresponding elements |
2737 | fail to match, return 0 for the whole thing. */ |
2738 | |
2739 | fmt = GET_RTX_FORMAT (code); |
2740 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
2741 | { |
2742 | switch (fmt[i]) |
2743 | { |
2744 | case 'e': |
2745 | if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), |
2746 | validate, for_gcse)) |
2747 | return false; |
2748 | break; |
2749 | |
2750 | case 'E': |
2751 | if (XVECLEN (x, i) != XVECLEN (y, i)) |
2752 | return 0; |
2753 | for (j = 0; j < XVECLEN (x, i); j++) |
2754 | if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j), |
2755 | validate, for_gcse)) |
2756 | return false; |
2757 | break; |
2758 | |
2759 | case 's': |
2760 | if (strcmp (XSTR (x, i), XSTR (y, i))) |
2761 | return false; |
2762 | break; |
2763 | |
2764 | case 'i': |
2765 | if (XINT (x, i) != XINT (y, i)) |
2766 | return false; |
2767 | break; |
2768 | |
2769 | case 'w': |
2770 | if (XWINT (x, i) != XWINT (y, i)) |
2771 | return false; |
2772 | break; |
2773 | |
2774 | case 'p': |
2775 | if (maybe_ne (SUBREG_BYTE (x), SUBREG_BYTE (y))) |
2776 | return false; |
2777 | break; |
2778 | |
2779 | case '0': |
2780 | case 't': |
2781 | break; |
2782 | |
2783 | default: |
2784 | gcc_unreachable (); |
2785 | } |
2786 | } |
2787 | |
2788 | return true; |
2789 | } |
2790 | |
2791 | /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate |
2792 | the result if necessary. INSN is as for canon_reg. */ |
2793 | |
2794 | static void |
2795 | validate_canon_reg (rtx *xloc, rtx_insn *insn) |
2796 | { |
2797 | if (*xloc) |
2798 | { |
2799 | rtx new_rtx = canon_reg (*xloc, insn); |
2800 | |
2801 | /* If replacing pseudo with hard reg or vice versa, ensure the |
2802 | insn remains valid. Likewise if the insn has MATCH_DUPs. */ |
2803 | gcc_assert (insn && new_rtx); |
2804 | validate_change (insn, xloc, new_rtx, 1); |
2805 | } |
2806 | } |
2807 | |
2808 | /* Canonicalize an expression: |
2809 | replace each register reference inside it |
2810 | with the "oldest" equivalent register. |
2811 | |
2812 | If INSN is nonzero validate_change is used to ensure that INSN remains valid |
2813 | after we make our substitution. The calls are made with IN_GROUP nonzero |
2814 | so apply_change_group must be called upon the outermost return from this |
2815 | function (unless INSN is zero). The result of apply_change_group can |
2816 | generally be discarded since the changes we are making are optional. */ |
2817 | |
2818 | static rtx |
2819 | canon_reg (rtx x, rtx_insn *insn) |
2820 | { |
2821 | int i; |
2822 | enum rtx_code code; |
2823 | const char *fmt; |
2824 | |
2825 | if (x == 0) |
2826 | return x; |
2827 | |
2828 | code = GET_CODE (x); |
2829 | switch (code) |
2830 | { |
2831 | case PC: |
2832 | case CONST: |
2833 | CASE_CONST_ANY: |
2834 | case SYMBOL_REF: |
2835 | case LABEL_REF: |
2836 | case ADDR_VEC: |
2837 | case ADDR_DIFF_VEC: |
2838 | return x; |
2839 | |
2840 | case REG: |
2841 | { |
2842 | int first; |
2843 | int q; |
2844 | struct qty_table_elem *ent; |
2845 | |
2846 | /* Never replace a hard reg, because hard regs can appear |
2847 | in more than one machine mode, and we must preserve the mode |
2848 | of each occurrence. Also, some hard regs appear in |
2849 | MEMs that are shared and mustn't be altered. Don't try to |
2850 | replace any reg that maps to a reg of class NO_REGS. */ |
2851 | if (REGNO (x) < FIRST_PSEUDO_REGISTER |
2852 | || ! REGNO_QTY_VALID_P (REGNO (x))) |
2853 | return x; |
2854 | |
2855 | q = REG_QTY (REGNO (x)); |
2856 | ent = &qty_table[q]; |
2857 | first = ent->first_reg; |
2858 | return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first] |
2859 | : REGNO_REG_CLASS (first) == NO_REGS ? x |
2860 | : gen_rtx_REG (ent->mode, first)); |
2861 | } |
2862 | |
2863 | default: |
2864 | break; |
2865 | } |
2866 | |
2867 | fmt = GET_RTX_FORMAT (code); |
2868 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
2869 | { |
2870 | int j; |
2871 | |
2872 | if (fmt[i] == 'e') |
2873 | validate_canon_reg (xloc: &XEXP (x, i), insn); |
2874 | else if (fmt[i] == 'E') |
2875 | for (j = 0; j < XVECLEN (x, i); j++) |
2876 | validate_canon_reg (xloc: &XVECEXP (x, i, j), insn); |
2877 | } |
2878 | |
2879 | return x; |
2880 | } |
2881 | |
2882 | /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison |
2883 | operation (EQ, NE, GT, etc.), follow it back through the hash table and |
2884 | what values are being compared. |
2885 | |
2886 | *PARG1 and *PARG2 are updated to contain the rtx representing the values |
2887 | actually being compared. For example, if *PARG1 was (reg:CC CC_REG) and |
2888 | *PARG2 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that |
2889 | were compared to produce (reg:CC CC_REG). |
2890 | |
2891 | The return value is the comparison operator and is either the code of |
2892 | A or the code corresponding to the inverse of the comparison. */ |
2893 | |
2894 | static enum rtx_code |
2895 | find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2, |
2896 | machine_mode *pmode1, machine_mode *pmode2) |
2897 | { |
2898 | rtx arg1, arg2; |
2899 | hash_set<rtx> *visited = NULL; |
2900 | /* Set nonzero when we find something of interest. */ |
2901 | rtx x = NULL; |
2902 | |
2903 | arg1 = *parg1, arg2 = *parg2; |
2904 | |
2905 | /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */ |
2906 | |
2907 | while (arg2 == CONST0_RTX (GET_MODE (arg1))) |
2908 | { |
2909 | int reverse_code = 0; |
2910 | struct table_elt *p = 0; |
2911 | |
2912 | /* Remember state from previous iteration. */ |
2913 | if (x) |
2914 | { |
2915 | if (!visited) |
2916 | visited = new hash_set<rtx>; |
2917 | visited->add (k: x); |
2918 | x = 0; |
2919 | } |
2920 | |
2921 | /* If arg1 is a COMPARE, extract the comparison arguments from it. */ |
2922 | |
2923 | if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx) |
2924 | x = arg1; |
2925 | |
2926 | /* If ARG1 is a comparison operator and CODE is testing for |
2927 | STORE_FLAG_VALUE, get the inner arguments. */ |
2928 | |
2929 | else if (COMPARISON_P (arg1)) |
2930 | { |
2931 | #ifdef FLOAT_STORE_FLAG_VALUE |
2932 | REAL_VALUE_TYPE fsfv; |
2933 | #endif |
2934 | |
2935 | if (code == NE |
2936 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT |
2937 | && code == LT && STORE_FLAG_VALUE == -1) |
2938 | #ifdef FLOAT_STORE_FLAG_VALUE |
2939 | || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1)) |
2940 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
2941 | REAL_VALUE_NEGATIVE (fsfv))) |
2942 | #endif |
2943 | ) |
2944 | x = arg1; |
2945 | else if (code == EQ |
2946 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT |
2947 | && code == GE && STORE_FLAG_VALUE == -1) |
2948 | #ifdef FLOAT_STORE_FLAG_VALUE |
2949 | || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1)) |
2950 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
2951 | REAL_VALUE_NEGATIVE (fsfv))) |
2952 | #endif |
2953 | ) |
2954 | x = arg1, reverse_code = 1; |
2955 | } |
2956 | |
2957 | /* ??? We could also check for |
2958 | |
2959 | (ne (and (eq (...) (const_int 1))) (const_int 0)) |
2960 | |
2961 | and related forms, but let's wait until we see them occurring. */ |
2962 | |
2963 | if (x == 0) |
2964 | /* Look up ARG1 in the hash table and see if it has an equivalence |
2965 | that lets us see what is being compared. */ |
2966 | p = lookup (x: arg1, hash: SAFE_HASH (x: arg1, GET_MODE (arg1)), GET_MODE (arg1)); |
2967 | if (p) |
2968 | { |
2969 | p = p->first_same_value; |
2970 | |
2971 | /* If what we compare is already known to be constant, that is as |
2972 | good as it gets. |
2973 | We need to break the loop in this case, because otherwise we |
2974 | can have an infinite loop when looking at a reg that is known |
2975 | to be a constant which is the same as a comparison of a reg |
2976 | against zero which appears later in the insn stream, which in |
2977 | turn is constant and the same as the comparison of the first reg |
2978 | against zero... */ |
2979 | if (p->is_const) |
2980 | break; |
2981 | } |
2982 | |
2983 | for (; p; p = p->next_same_value) |
2984 | { |
2985 | machine_mode inner_mode = GET_MODE (p->exp); |
2986 | #ifdef FLOAT_STORE_FLAG_VALUE |
2987 | REAL_VALUE_TYPE fsfv; |
2988 | #endif |
2989 | |
2990 | /* If the entry isn't valid, skip it. */ |
2991 | if (! exp_equiv_p (x: p->exp, y: p->exp, validate: 1, for_gcse: false)) |
2992 | continue; |
2993 | |
2994 | /* If it's a comparison we've used before, skip it. */ |
2995 | if (visited && visited->contains (k: p->exp)) |
2996 | continue; |
2997 | |
2998 | if (GET_CODE (p->exp) == COMPARE |
2999 | /* Another possibility is that this machine has a compare insn |
3000 | that includes the comparison code. In that case, ARG1 would |
3001 | be equivalent to a comparison operation that would set ARG1 to |
3002 | either STORE_FLAG_VALUE or zero. If this is an NE operation, |
3003 | ORIG_CODE is the actual comparison being done; if it is an EQ, |
3004 | we must reverse ORIG_CODE. On machine with a negative value |
3005 | for STORE_FLAG_VALUE, also look at LT and GE operations. */ |
3006 | || ((code == NE |
3007 | || (code == LT |
3008 | && val_signbit_known_set_p (inner_mode, |
3009 | STORE_FLAG_VALUE)) |
3010 | #ifdef FLOAT_STORE_FLAG_VALUE |
3011 | || (code == LT |
3012 | && SCALAR_FLOAT_MODE_P (inner_mode) |
3013 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
3014 | REAL_VALUE_NEGATIVE (fsfv))) |
3015 | #endif |
3016 | ) |
3017 | && COMPARISON_P (p->exp))) |
3018 | { |
3019 | x = p->exp; |
3020 | break; |
3021 | } |
3022 | else if ((code == EQ |
3023 | || (code == GE |
3024 | && val_signbit_known_set_p (inner_mode, |
3025 | STORE_FLAG_VALUE)) |
3026 | #ifdef FLOAT_STORE_FLAG_VALUE |
3027 | || (code == GE |
3028 | && SCALAR_FLOAT_MODE_P (inner_mode) |
3029 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
3030 | REAL_VALUE_NEGATIVE (fsfv))) |
3031 | #endif |
3032 | ) |
3033 | && COMPARISON_P (p->exp)) |
3034 | { |
3035 | reverse_code = 1; |
3036 | x = p->exp; |
3037 | break; |
3038 | } |
3039 | |
3040 | /* If this non-trapping address, e.g. fp + constant, the |
3041 | equivalent is a better operand since it may let us predict |
3042 | the value of the comparison. */ |
3043 | else if (!rtx_addr_can_trap_p (p->exp)) |
3044 | { |
3045 | arg1 = p->exp; |
3046 | continue; |
3047 | } |
3048 | } |
3049 | |
3050 | /* If we didn't find a useful equivalence for ARG1, we are done. |
3051 | Otherwise, set up for the next iteration. */ |
3052 | if (x == 0) |
3053 | break; |
3054 | |
3055 | /* If we need to reverse the comparison, make sure that is |
3056 | possible -- we can't necessarily infer the value of GE from LT |
3057 | with floating-point operands. */ |
3058 | if (reverse_code) |
3059 | { |
3060 | enum rtx_code reversed = reversed_comparison_code (x, NULL); |
3061 | if (reversed == UNKNOWN) |
3062 | break; |
3063 | else |
3064 | code = reversed; |
3065 | } |
3066 | else if (COMPARISON_P (x)) |
3067 | code = GET_CODE (x); |
3068 | arg1 = XEXP (x, 0), arg2 = XEXP (x, 1); |
3069 | } |
3070 | |
3071 | /* Return our results. Return the modes from before fold_rtx |
3072 | because fold_rtx might produce const_int, and then it's too late. */ |
3073 | *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2); |
3074 | *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0); |
3075 | |
3076 | if (visited) |
3077 | delete visited; |
3078 | return code; |
3079 | } |
3080 | |
3081 | /* If X is a nontrivial arithmetic operation on an argument for which |
3082 | a constant value can be determined, return the result of operating |
3083 | on that value, as a constant. Otherwise, return X, possibly with |
3084 | one or more operands changed to a forward-propagated constant. |
3085 | |
3086 | If X is a register whose contents are known, we do NOT return |
3087 | those contents here; equiv_constant is called to perform that task. |
3088 | For SUBREGs and MEMs, we do that both here and in equiv_constant. |
3089 | |
3090 | INSN is the insn that we may be modifying. If it is 0, make a copy |
3091 | of X before modifying it. */ |
3092 | |
3093 | static rtx |
3094 | fold_rtx (rtx x, rtx_insn *insn) |
3095 | { |
3096 | enum rtx_code code; |
3097 | machine_mode mode; |
3098 | const char *fmt; |
3099 | int i; |
3100 | rtx new_rtx = 0; |
3101 | bool changed = false; |
3102 | poly_int64 xval; |
3103 | |
3104 | /* Operands of X. */ |
3105 | /* Workaround -Wmaybe-uninitialized false positive during |
3106 | profiledbootstrap by initializing them. */ |
3107 | rtx folded_arg0 = NULL_RTX; |
3108 | rtx folded_arg1 = NULL_RTX; |
3109 | |
3110 | /* Constant equivalents of first three operands of X; |
3111 | 0 when no such equivalent is known. */ |
3112 | rtx const_arg0; |
3113 | rtx const_arg1; |
3114 | rtx const_arg2; |
3115 | |
3116 | /* The mode of the first operand of X. We need this for sign and zero |
3117 | extends. */ |
3118 | machine_mode mode_arg0; |
3119 | |
3120 | if (x == 0) |
3121 | return x; |
3122 | |
3123 | /* Try to perform some initial simplifications on X. */ |
3124 | code = GET_CODE (x); |
3125 | switch (code) |
3126 | { |
3127 | case MEM: |
3128 | case SUBREG: |
3129 | /* The first operand of a SIGN/ZERO_EXTRACT has a different meaning |
3130 | than it would in other contexts. Basically its mode does not |
3131 | signify the size of the object read. That information is carried |
3132 | by size operand. If we happen to have a MEM of the appropriate |
3133 | mode in our tables with a constant value we could simplify the |
3134 | extraction incorrectly if we allowed substitution of that value |
3135 | for the MEM. */ |
3136 | case ZERO_EXTRACT: |
3137 | case SIGN_EXTRACT: |
3138 | if ((new_rtx = equiv_constant (x)) != NULL_RTX) |
3139 | return new_rtx; |
3140 | return x; |
3141 | |
3142 | case CONST: |
3143 | CASE_CONST_ANY: |
3144 | case SYMBOL_REF: |
3145 | case LABEL_REF: |
3146 | case REG: |
3147 | case PC: |
3148 | /* No use simplifying an EXPR_LIST |
3149 | since they are used only for lists of args |
3150 | in a function call's REG_EQUAL note. */ |
3151 | case EXPR_LIST: |
3152 | return x; |
3153 | |
3154 | case ASM_OPERANDS: |
3155 | if (insn) |
3156 | { |
3157 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) |
3158 | validate_change (insn, &ASM_OPERANDS_INPUT (x, i), |
3159 | fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0); |
3160 | } |
3161 | return x; |
3162 | |
3163 | case CALL: |
3164 | if (NO_FUNCTION_CSE && CONSTANT_P (XEXP (XEXP (x, 0), 0))) |
3165 | return x; |
3166 | break; |
3167 | case VEC_SELECT: |
3168 | { |
3169 | rtx trueop0 = XEXP (x, 0); |
3170 | mode = GET_MODE (trueop0); |
3171 | rtx trueop1 = XEXP (x, 1); |
3172 | /* If we select a low-part subreg, return that. */ |
3173 | if (vec_series_lowpart_p (GET_MODE (x), op_mode: mode, sel: trueop1)) |
3174 | { |
3175 | rtx new_rtx = lowpart_subreg (GET_MODE (x), op: trueop0, innermode: mode); |
3176 | if (new_rtx != NULL_RTX) |
3177 | return new_rtx; |
3178 | } |
3179 | } |
3180 | |
3181 | /* Anything else goes through the loop below. */ |
3182 | default: |
3183 | break; |
3184 | } |
3185 | |
3186 | mode = GET_MODE (x); |
3187 | const_arg0 = 0; |
3188 | const_arg1 = 0; |
3189 | const_arg2 = 0; |
3190 | mode_arg0 = VOIDmode; |
3191 | |
3192 | /* Try folding our operands. |
3193 | Then see which ones have constant values known. */ |
3194 | |
3195 | fmt = GET_RTX_FORMAT (code); |
3196 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
3197 | if (fmt[i] == 'e') |
3198 | { |
3199 | rtx folded_arg = XEXP (x, i), const_arg; |
3200 | machine_mode mode_arg = GET_MODE (folded_arg); |
3201 | |
3202 | switch (GET_CODE (folded_arg)) |
3203 | { |
3204 | case MEM: |
3205 | case REG: |
3206 | case SUBREG: |
3207 | const_arg = equiv_constant (folded_arg); |
3208 | break; |
3209 | |
3210 | case CONST: |
3211 | CASE_CONST_ANY: |
3212 | case SYMBOL_REF: |
3213 | case LABEL_REF: |
3214 | const_arg = folded_arg; |
3215 | break; |
3216 | |
3217 | default: |
3218 | folded_arg = fold_rtx (x: folded_arg, insn); |
3219 | const_arg = equiv_constant (folded_arg); |
3220 | break; |
3221 | } |
3222 | |
3223 | /* For the first three operands, see if the operand |
3224 | is constant or equivalent to a constant. */ |
3225 | switch (i) |
3226 | { |
3227 | case 0: |
3228 | folded_arg0 = folded_arg; |
3229 | const_arg0 = const_arg; |
3230 | mode_arg0 = mode_arg; |
3231 | break; |
3232 | case 1: |
3233 | folded_arg1 = folded_arg; |
3234 | const_arg1 = const_arg; |
3235 | break; |
3236 | case 2: |
3237 | const_arg2 = const_arg; |
3238 | break; |
3239 | } |
3240 | |
3241 | /* Pick the least expensive of the argument and an equivalent constant |
3242 | argument. */ |
3243 | if (const_arg != 0 |
3244 | && const_arg != folded_arg |
3245 | && (COST_IN (const_arg, mode_arg, code, i) |
3246 | <= COST_IN (folded_arg, mode_arg, code, i)) |
3247 | |
3248 | /* It's not safe to substitute the operand of a conversion |
3249 | operator with a constant, as the conversion's identity |
3250 | depends upon the mode of its operand. This optimization |
3251 | is handled by the call to simplify_unary_operation. */ |
3252 | && (GET_RTX_CLASS (code) != RTX_UNARY |
3253 | || GET_MODE (const_arg) == mode_arg0 |
3254 | || (code != ZERO_EXTEND |
3255 | && code != SIGN_EXTEND |
3256 | && code != TRUNCATE |
3257 | && code != FLOAT_TRUNCATE |
3258 | && code != FLOAT_EXTEND |
3259 | && code != FLOAT |
3260 | && code != FIX |
3261 | && code != UNSIGNED_FLOAT |
3262 | && code != UNSIGNED_FIX))) |
3263 | folded_arg = const_arg; |
3264 | |
3265 | if (folded_arg == XEXP (x, i)) |
3266 | continue; |
3267 | |
3268 | if (insn == NULL_RTX && !changed) |
3269 | x = copy_rtx (x); |
3270 | changed = true; |
3271 | validate_unshare_change (insn, &XEXP (x, i), folded_arg, 1); |
3272 | } |
3273 | |
3274 | if (changed) |
3275 | { |
3276 | /* Canonicalize X if necessary, and keep const_argN and folded_argN |
3277 | consistent with the order in X. */ |
3278 | if (canonicalize_change_group (insn, x)) |
3279 | { |
3280 | std::swap (a&: const_arg0, b&: const_arg1); |
3281 | std::swap (a&: folded_arg0, b&: folded_arg1); |
3282 | } |
3283 | |
3284 | apply_change_group (); |
3285 | } |
3286 | |
3287 | /* If X is an arithmetic operation, see if we can simplify it. */ |
3288 | |
3289 | switch (GET_RTX_CLASS (code)) |
3290 | { |
3291 | case RTX_UNARY: |
3292 | { |
3293 | /* We can't simplify extension ops unless we know the |
3294 | original mode. */ |
3295 | if ((code == ZERO_EXTEND || code == SIGN_EXTEND) |
3296 | && mode_arg0 == VOIDmode) |
3297 | break; |
3298 | |
3299 | new_rtx = simplify_unary_operation (code, mode, |
3300 | op: const_arg0 ? const_arg0 : folded_arg0, |
3301 | op_mode: mode_arg0); |
3302 | } |
3303 | break; |
3304 | |
3305 | case RTX_COMPARE: |
3306 | case RTX_COMM_COMPARE: |
3307 | /* See what items are actually being compared and set FOLDED_ARG[01] |
3308 | to those values and CODE to the actual comparison code. If any are |
3309 | constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't |
3310 | do anything if both operands are already known to be constant. */ |
3311 | |
3312 | /* ??? Vector mode comparisons are not supported yet. */ |
3313 | if (VECTOR_MODE_P (mode)) |
3314 | break; |
3315 | |
3316 | if (const_arg0 == 0 || const_arg1 == 0) |
3317 | { |
3318 | struct table_elt *p0, *p1; |
3319 | rtx true_rtx, false_rtx; |
3320 | machine_mode mode_arg1; |
3321 | |
3322 | if (SCALAR_FLOAT_MODE_P (mode)) |
3323 | { |
3324 | #ifdef FLOAT_STORE_FLAG_VALUE |
3325 | true_rtx = (const_double_from_real_value |
3326 | (FLOAT_STORE_FLAG_VALUE (mode), mode)); |
3327 | #else |
3328 | true_rtx = NULL_RTX; |
3329 | #endif |
3330 | false_rtx = CONST0_RTX (mode); |
3331 | } |
3332 | else |
3333 | { |
3334 | true_rtx = const_true_rtx; |
3335 | false_rtx = const0_rtx; |
3336 | } |
3337 | |
3338 | code = find_comparison_args (code, parg1: &folded_arg0, parg2: &folded_arg1, |
3339 | pmode1: &mode_arg0, pmode2: &mode_arg1); |
3340 | |
3341 | /* If the mode is VOIDmode or a MODE_CC mode, we don't know |
3342 | what kinds of things are being compared, so we can't do |
3343 | anything with this comparison. */ |
3344 | |
3345 | if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC) |
3346 | break; |
3347 | |
3348 | const_arg0 = equiv_constant (folded_arg0); |
3349 | const_arg1 = equiv_constant (folded_arg1); |
3350 | |
3351 | /* If we do not now have two constants being compared, see |
3352 | if we can nevertheless deduce some things about the |
3353 | comparison. */ |
3354 | if (const_arg0 == 0 || const_arg1 == 0) |
3355 | { |
3356 | if (const_arg1 != NULL) |
3357 | { |
3358 | rtx cheapest_simplification; |
3359 | int cheapest_cost; |
3360 | rtx simp_result; |
3361 | struct table_elt *p; |
3362 | |
3363 | /* See if we can find an equivalent of folded_arg0 |
3364 | that gets us a cheaper expression, possibly a |
3365 | constant through simplifications. */ |
3366 | p = lookup (x: folded_arg0, hash: SAFE_HASH (x: folded_arg0, mode: mode_arg0), |
3367 | mode: mode_arg0); |
3368 | |
3369 | if (p != NULL) |
3370 | { |
3371 | cheapest_simplification = x; |
3372 | cheapest_cost = COST (x, mode); |
3373 | |
3374 | for (p = p->first_same_value; p != NULL; p = p->next_same_value) |
3375 | { |
3376 | int cost; |
3377 | |
3378 | /* If the entry isn't valid, skip it. */ |
3379 | if (! exp_equiv_p (x: p->exp, y: p->exp, validate: 1, for_gcse: false)) |
3380 | continue; |
3381 | |
3382 | /* Try to simplify using this equivalence. */ |
3383 | simp_result |
3384 | = simplify_relational_operation (code, mode, |
3385 | op_mode: mode_arg0, |
3386 | op0: p->exp, |
3387 | op1: const_arg1); |
3388 | |
3389 | if (simp_result == NULL) |
3390 | continue; |
3391 | |
3392 | cost = COST (simp_result, mode); |
3393 | if (cost < cheapest_cost) |
3394 | { |
3395 | cheapest_cost = cost; |
3396 | cheapest_simplification = simp_result; |
3397 | } |
3398 | } |
3399 | |
3400 | /* If we have a cheaper expression now, use that |
3401 | and try folding it further, from the top. */ |
3402 | if (cheapest_simplification != x) |
3403 | return fold_rtx (x: copy_rtx (cheapest_simplification), |
3404 | insn); |
3405 | } |
3406 | } |
3407 | |
3408 | /* See if the two operands are the same. */ |
3409 | |
3410 | if ((REG_P (folded_arg0) |
3411 | && REG_P (folded_arg1) |
3412 | && (REG_QTY (REGNO (folded_arg0)) |
3413 | == REG_QTY (REGNO (folded_arg1)))) |
3414 | || ((p0 = lookup (x: folded_arg0, |
3415 | hash: SAFE_HASH (x: folded_arg0, mode: mode_arg0), |
3416 | mode: mode_arg0)) |
3417 | && (p1 = lookup (x: folded_arg1, |
3418 | hash: SAFE_HASH (x: folded_arg1, mode: mode_arg0), |
3419 | mode: mode_arg0)) |
3420 | && p0->first_same_value == p1->first_same_value)) |
3421 | folded_arg1 = folded_arg0; |
3422 | |
3423 | /* If FOLDED_ARG0 is a register, see if the comparison we are |
3424 | doing now is either the same as we did before or the reverse |
3425 | (we only check the reverse if not floating-point). */ |
3426 | else if (REG_P (folded_arg0)) |
3427 | { |
3428 | int qty = REG_QTY (REGNO (folded_arg0)); |
3429 | |
3430 | if (REGNO_QTY_VALID_P (REGNO (folded_arg0))) |
3431 | { |
3432 | struct qty_table_elem *ent = &qty_table[qty]; |
3433 | |
3434 | if ((comparison_dominates_p (ent->comparison_code, code) |
3435 | || (! FLOAT_MODE_P (mode_arg0) |
3436 | && comparison_dominates_p (ent->comparison_code, |
3437 | reverse_condition (code)))) |
3438 | && (rtx_equal_p (ent->comparison_const, folded_arg1) |
3439 | || (const_arg1 |
3440 | && rtx_equal_p (ent->comparison_const, |
3441 | const_arg1)) |
3442 | || (REG_P (folded_arg1) |
3443 | && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty)))) |
3444 | { |
3445 | if (comparison_dominates_p (ent->comparison_code, code)) |
3446 | { |
3447 | if (true_rtx) |
3448 | return true_rtx; |
3449 | else |
3450 | break; |
3451 | } |
3452 | else |
3453 | return false_rtx; |
3454 | } |
3455 | } |
3456 | } |
3457 | } |
3458 | } |
3459 | |
3460 | /* If we are comparing against zero, see if the first operand is |
3461 | equivalent to an IOR with a constant. If so, we may be able to |
3462 | determine the result of this comparison. */ |
3463 | if (const_arg1 == const0_rtx && !const_arg0) |
3464 | { |
3465 | rtx y = lookup_as_function (x: folded_arg0, code: IOR); |
3466 | rtx inner_const; |
3467 | |
3468 | if (y != 0 |
3469 | && (inner_const = equiv_constant (XEXP (y, 1))) != 0 |
3470 | && CONST_INT_P (inner_const) |
3471 | && INTVAL (inner_const) != 0) |
3472 | folded_arg0 = gen_rtx_IOR (mode_arg0, XEXP (y, 0), inner_const); |
3473 | } |
3474 | |
3475 | { |
3476 | rtx op0 = const_arg0 ? const_arg0 : copy_rtx (folded_arg0); |
3477 | rtx op1 = const_arg1 ? const_arg1 : copy_rtx (folded_arg1); |
3478 | new_rtx = simplify_relational_operation (code, mode, op_mode: mode_arg0, |
3479 | op0, op1); |
3480 | } |
3481 | break; |
3482 | |
3483 | case RTX_BIN_ARITH: |
3484 | case RTX_COMM_ARITH: |
3485 | switch (code) |
3486 | { |
3487 | case PLUS: |
3488 | /* If the second operand is a LABEL_REF, see if the first is a MINUS |
3489 | with that LABEL_REF as its second operand. If so, the result is |
3490 | the first operand of that MINUS. This handles switches with an |
3491 | ADDR_DIFF_VEC table. */ |
3492 | if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF) |
3493 | { |
3494 | rtx y |
3495 | = GET_CODE (folded_arg0) == MINUS ? folded_arg0 |
3496 | : lookup_as_function (x: folded_arg0, code: MINUS); |
3497 | |
3498 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF |
3499 | && label_ref_label (XEXP (y, 1)) == label_ref_label (ref: const_arg1)) |
3500 | return XEXP (y, 0); |
3501 | |
3502 | /* Now try for a CONST of a MINUS like the above. */ |
3503 | if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0 |
3504 | : lookup_as_function (x: folded_arg0, code: CONST))) != 0 |
3505 | && GET_CODE (XEXP (y, 0)) == MINUS |
3506 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF |
3507 | && label_ref_label (XEXP (XEXP (y, 0), 1)) == label_ref_label (ref: const_arg1)) |
3508 | return XEXP (XEXP (y, 0), 0); |
3509 | } |
3510 | |
3511 | /* Likewise if the operands are in the other order. */ |
3512 | if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF) |
3513 | { |
3514 | rtx y |
3515 | = GET_CODE (folded_arg1) == MINUS ? folded_arg1 |
3516 | : lookup_as_function (x: folded_arg1, code: MINUS); |
3517 | |
3518 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF |
3519 | && label_ref_label (XEXP (y, 1)) == label_ref_label (ref: const_arg0)) |
3520 | return XEXP (y, 0); |
3521 | |
3522 | /* Now try for a CONST of a MINUS like the above. */ |
3523 | if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1 |
3524 | : lookup_as_function (x: folded_arg1, code: CONST))) != 0 |
3525 | && GET_CODE (XEXP (y, 0)) == MINUS |
3526 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF |
3527 | && label_ref_label (XEXP (XEXP (y, 0), 1)) == label_ref_label (ref: const_arg0)) |
3528 | return XEXP (XEXP (y, 0), 0); |
3529 | } |
3530 | |
3531 | /* If second operand is a register equivalent to a negative |
3532 | CONST_INT, see if we can find a register equivalent to the |
3533 | positive constant. Make a MINUS if so. Don't do this for |
3534 | a non-negative constant since we might then alternate between |
3535 | choosing positive and negative constants. Having the positive |
3536 | constant previously-used is the more common case. Be sure |
3537 | the resulting constant is non-negative; if const_arg1 were |
3538 | the smallest negative number this would overflow: depending |
3539 | on the mode, this would either just be the same value (and |
3540 | hence not save anything) or be incorrect. */ |
3541 | if (const_arg1 != 0 && CONST_INT_P (const_arg1) |
3542 | && INTVAL (const_arg1) < 0 |
3543 | /* This used to test |
3544 | |
3545 | -INTVAL (const_arg1) >= 0 |
3546 | |
3547 | But The Sun V5.0 compilers mis-compiled that test. So |
3548 | instead we test for the problematic value in a more direct |
3549 | manner and hope the Sun compilers get it correct. */ |
3550 | && INTVAL (const_arg1) != |
3551 | (HOST_WIDE_INT_1 << (HOST_BITS_PER_WIDE_INT - 1)) |
3552 | && REG_P (folded_arg1)) |
3553 | { |
3554 | rtx new_const = GEN_INT (-INTVAL (const_arg1)); |
3555 | struct table_elt *p |
3556 | = lookup (x: new_const, hash: SAFE_HASH (x: new_const, mode), mode); |
3557 | |
3558 | if (p) |
3559 | for (p = p->first_same_value; p; p = p->next_same_value) |
3560 | if (REG_P (p->exp)) |
3561 | return simplify_gen_binary (code: MINUS, mode, op0: folded_arg0, |
3562 | op1: canon_reg (x: p->exp, NULL)); |
3563 | } |
3564 | goto from_plus; |
3565 | |
3566 | case MINUS: |
3567 | /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2). |
3568 | If so, produce (PLUS Z C2-C). */ |
3569 | if (const_arg1 != 0 && poly_int_rtx_p (x: const_arg1, res: &xval)) |
3570 | { |
3571 | rtx y = lookup_as_function (XEXP (x, 0), code: PLUS); |
3572 | if (y && poly_int_rtx_p (XEXP (y, 1))) |
3573 | return fold_rtx (x: plus_constant (mode, copy_rtx (y), -xval), |
3574 | NULL); |
3575 | } |
3576 | |
3577 | /* Fall through. */ |
3578 | |
3579 | from_plus: |
3580 | case SMIN: case SMAX: case UMIN: case UMAX: |
3581 | case IOR: case AND: case XOR: |
3582 | case MULT: |
3583 | case ASHIFT: case LSHIFTRT: case ASHIFTRT: |
3584 | /* If we have (<op> <reg> <const_int>) for an associative OP and REG |
3585 | is known to be of similar form, we may be able to replace the |
3586 | operation with a combined operation. This may eliminate the |
3587 | intermediate operation if every use is simplified in this way. |
3588 | Note that the similar optimization done by combine.cc only works |
3589 | if the intermediate operation's result has only one reference. */ |
3590 | |
3591 | if (REG_P (folded_arg0) |
3592 | && const_arg1 && CONST_INT_P (const_arg1)) |
3593 | { |
3594 | int is_shift |
3595 | = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT); |
3596 | rtx y, inner_const, new_const; |
3597 | rtx canon_const_arg1 = const_arg1; |
3598 | enum rtx_code associate_code; |
3599 | |
3600 | if (is_shift |
3601 | && (INTVAL (const_arg1) >= GET_MODE_UNIT_PRECISION (mode) |
3602 | || INTVAL (const_arg1) < 0)) |
3603 | { |
3604 | if (SHIFT_COUNT_TRUNCATED) |
3605 | canon_const_arg1 = gen_int_shift_amount |
3606 | (mode, (INTVAL (const_arg1) |
3607 | & (GET_MODE_UNIT_BITSIZE (mode) - 1))); |
3608 | else |
3609 | break; |
3610 | } |
3611 | |
3612 | y = lookup_as_function (x: folded_arg0, code); |
3613 | if (y == 0) |
3614 | break; |
3615 | |
3616 | /* If we have compiled a statement like |
3617 | "if (x == (x & mask1))", and now are looking at |
3618 | "x & mask2", we will have a case where the first operand |
3619 | of Y is the same as our first operand. Unless we detect |
3620 | this case, an infinite loop will result. */ |
3621 | if (XEXP (y, 0) == folded_arg0) |
3622 | break; |
3623 | |
3624 | inner_const = equiv_constant (fold_rtx (XEXP (y, 1), insn: 0)); |
3625 | if (!inner_const || !CONST_INT_P (inner_const)) |
3626 | break; |
3627 | |
3628 | /* Don't associate these operations if they are a PLUS with the |
3629 | same constant and it is a power of two. These might be doable |
3630 | with a pre- or post-increment. Similarly for two subtracts of |
3631 | identical powers of two with post decrement. */ |
3632 | |
3633 | if (code == PLUS && const_arg1 == inner_const |
3634 | && ((HAVE_PRE_INCREMENT |
3635 | && pow2p_hwi (INTVAL (const_arg1))) |
3636 | || (HAVE_POST_INCREMENT |
3637 | && pow2p_hwi (INTVAL (const_arg1))) |
3638 | || (HAVE_PRE_DECREMENT |
3639 | && pow2p_hwi (x: - INTVAL (const_arg1))) |
3640 | || (HAVE_POST_DECREMENT |
3641 | && pow2p_hwi (x: - INTVAL (const_arg1))))) |
3642 | break; |
3643 | |
3644 | /* ??? Vector mode shifts by scalar |
3645 | shift operand are not supported yet. */ |
3646 | if (is_shift && VECTOR_MODE_P (mode)) |
3647 | break; |
3648 | |
3649 | if (is_shift |
3650 | && (INTVAL (inner_const) >= GET_MODE_UNIT_PRECISION (mode) |
3651 | || INTVAL (inner_const) < 0)) |
3652 | { |
3653 | if (SHIFT_COUNT_TRUNCATED) |
3654 | inner_const = gen_int_shift_amount |
3655 | (mode, (INTVAL (inner_const) |
3656 | & (GET_MODE_UNIT_BITSIZE (mode) - 1))); |
3657 | else |
3658 | break; |
3659 | } |
3660 | |
3661 | /* Compute the code used to compose the constants. For example, |
3662 | A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */ |
3663 | |
3664 | associate_code = (is_shift || code == MINUS ? PLUS : code); |
3665 | |
3666 | new_const = simplify_binary_operation (code: associate_code, mode, |
3667 | op0: canon_const_arg1, |
3668 | op1: inner_const); |
3669 | |
3670 | if (new_const == 0) |
3671 | break; |
3672 | |
3673 | /* If we are associating shift operations, don't let this |
3674 | produce a shift of the size of the object or larger. |
3675 | This could occur when we follow a sign-extend by a right |
3676 | shift on a machine that does a sign-extend as a pair |
3677 | of shifts. */ |
3678 | |
3679 | if (is_shift |
3680 | && CONST_INT_P (new_const) |
3681 | && INTVAL (new_const) >= GET_MODE_UNIT_PRECISION (mode)) |
3682 | { |
3683 | /* As an exception, we can turn an ASHIFTRT of this |
3684 | form into a shift of the number of bits - 1. */ |
3685 | if (code == ASHIFTRT) |
3686 | new_const = gen_int_shift_amount |
3687 | (mode, GET_MODE_UNIT_BITSIZE (mode) - 1); |
3688 | else if (!side_effects_p (XEXP (y, 0))) |
3689 | return CONST0_RTX (mode); |
3690 | else |
3691 | break; |
3692 | } |
3693 | |
3694 | y = copy_rtx (XEXP (y, 0)); |
3695 | |
3696 | /* If Y contains our first operand (the most common way this |
3697 | can happen is if Y is a MEM), we would do into an infinite |
3698 | loop if we tried to fold it. So don't in that case. */ |
3699 | |
3700 | if (! reg_mentioned_p (folded_arg0, y)) |
3701 | y = fold_rtx (x: y, insn); |
3702 | |
3703 | return simplify_gen_binary (code, mode, op0: y, op1: new_const); |
3704 | } |
3705 | break; |
3706 | |
3707 | case DIV: case UDIV: |
3708 | /* ??? The associative optimization performed immediately above is |
3709 | also possible for DIV and UDIV using associate_code of MULT. |
3710 | However, we would need extra code to verify that the |
3711 | multiplication does not overflow, that is, there is no overflow |
3712 | in the calculation of new_const. */ |
3713 | break; |
3714 | |
3715 | default: |
3716 | break; |
3717 | } |
3718 | |
3719 | new_rtx = simplify_binary_operation (code, mode, |
3720 | op0: const_arg0 ? const_arg0 : folded_arg0, |
3721 | op1: const_arg1 ? const_arg1 : folded_arg1); |
3722 | break; |
3723 | |
3724 | case RTX_OBJ: |
3725 | /* (lo_sum (high X) X) is simply X. */ |
3726 | if (code == LO_SUM && const_arg0 != 0 |
3727 | && GET_CODE (const_arg0) == HIGH |
3728 | && rtx_equal_p (XEXP (const_arg0, 0), const_arg1)) |
3729 | return const_arg1; |
3730 | break; |
3731 | |
3732 | case RTX_TERNARY: |
3733 | case RTX_BITFIELD_OPS: |
3734 | new_rtx = simplify_ternary_operation (code, mode, op0_mode: mode_arg0, |
3735 | op0: const_arg0 ? const_arg0 : folded_arg0, |
3736 | op1: const_arg1 ? const_arg1 : folded_arg1, |
3737 | op2: const_arg2 ? const_arg2 : XEXP (x, 2)); |
3738 | break; |
3739 | |
3740 | default: |
3741 | break; |
3742 | } |
3743 | |
3744 | return new_rtx ? new_rtx : x; |
3745 | } |
3746 | |
3747 | /* Return a constant value currently equivalent to X. |
3748 | Return 0 if we don't know one. */ |
3749 | |
3750 | static rtx |
3751 | equiv_constant (rtx x) |
3752 | { |
3753 | if (REG_P (x) |
3754 | && REGNO_QTY_VALID_P (REGNO (x))) |
3755 | { |
3756 | int x_q = REG_QTY (REGNO (x)); |
3757 | struct qty_table_elem *x_ent = &qty_table[x_q]; |
3758 | |
3759 | if (x_ent->const_rtx) |
3760 | x = gen_lowpart (GET_MODE (x), x_ent->const_rtx); |
3761 | } |
3762 | |
3763 | if (x == 0 || CONSTANT_P (x)) |
3764 | return x; |
3765 | |
3766 | if (GET_CODE (x) == SUBREG) |
3767 | { |
3768 | machine_mode mode = GET_MODE (x); |
3769 | machine_mode imode = GET_MODE (SUBREG_REG (x)); |
3770 | rtx new_rtx; |
3771 | |
3772 | /* See if we previously assigned a constant value to this SUBREG. */ |
3773 | if ((new_rtx = lookup_as_function (x, code: CONST_INT)) != 0 |
3774 | || (new_rtx = lookup_as_function (x, code: CONST_WIDE_INT)) != 0 |
3775 | || (NUM_POLY_INT_COEFFS > 1 |
3776 | && (new_rtx = lookup_as_function (x, code: CONST_POLY_INT)) != 0) |
3777 | || (new_rtx = lookup_as_function (x, code: CONST_DOUBLE)) != 0 |
3778 | || (new_rtx = lookup_as_function (x, code: CONST_FIXED)) != 0) |
3779 | return new_rtx; |
3780 | |
3781 | /* If we didn't and if doing so makes sense, see if we previously |
3782 | assigned a constant value to the enclosing word mode SUBREG. */ |
3783 | if (known_lt (GET_MODE_SIZE (mode), UNITS_PER_WORD) |
3784 | && known_lt (UNITS_PER_WORD, GET_MODE_SIZE (imode))) |
3785 | { |
3786 | poly_int64 byte = (SUBREG_BYTE (x) |
3787 | - subreg_lowpart_offset (outermode: mode, innermode: word_mode)); |
3788 | if (known_ge (byte, 0) && multiple_p (a: byte, UNITS_PER_WORD)) |
3789 | { |
3790 | rtx y = gen_rtx_SUBREG (word_mode, SUBREG_REG (x), byte); |
3791 | new_rtx = lookup_as_function (x: y, code: CONST_INT); |
3792 | if (new_rtx) |
3793 | return gen_lowpart (mode, new_rtx); |
3794 | } |
3795 | } |
3796 | |
3797 | /* Otherwise see if we already have a constant for the inner REG, |
3798 | and if that is enough to calculate an equivalent constant for |
3799 | the subreg. Note that the upper bits of paradoxical subregs |
3800 | are undefined, so they cannot be said to equal anything. */ |
3801 | if (REG_P (SUBREG_REG (x)) |
3802 | && !paradoxical_subreg_p (x) |
3803 | && (new_rtx = equiv_constant (SUBREG_REG (x))) != 0) |
3804 | return simplify_subreg (outermode: mode, op: new_rtx, innermode: imode, SUBREG_BYTE (x)); |
3805 | |
3806 | return 0; |
3807 | } |
3808 | |
3809 | /* If X is a MEM, see if it is a constant-pool reference, or look it up in |
3810 | the hash table in case its value was seen before. */ |
3811 | |
3812 | if (MEM_P (x)) |
3813 | { |
3814 | struct table_elt *elt; |
3815 | |
3816 | x = avoid_constant_pool_reference (x); |
3817 | if (CONSTANT_P (x)) |
3818 | return x; |
3819 | |
3820 | elt = lookup (x, hash: SAFE_HASH (x, GET_MODE (x)), GET_MODE (x)); |
3821 | if (elt == 0) |
3822 | return 0; |
3823 | |
3824 | for (elt = elt->first_same_value; elt; elt = elt->next_same_value) |
3825 | if (elt->is_const && CONSTANT_P (elt->exp)) |
3826 | return elt->exp; |
3827 | } |
3828 | |
3829 | return 0; |
3830 | } |
3831 | |
3832 | /* Given INSN, a jump insn, TAKEN indicates if we are following the |
3833 | "taken" branch. |
3834 | |
3835 | In certain cases, this can cause us to add an equivalence. For example, |
3836 | if we are following the taken case of |
3837 | if (i == 2) |
3838 | we can add the fact that `i' and '2' are now equivalent. |
3839 | |
3840 | In any case, we can record that this comparison was passed. If the same |
3841 | comparison is seen later, we will know its value. */ |
3842 | |
3843 | static void |
3844 | record_jump_equiv (rtx_insn *insn, bool taken) |
3845 | { |
3846 | int cond_known_true; |
3847 | rtx op0, op1; |
3848 | rtx set; |
3849 | machine_mode mode, mode0, mode1; |
3850 | enum rtx_code code; |
3851 | |
3852 | /* Ensure this is the right kind of insn. */ |
3853 | gcc_assert (any_condjump_p (insn)); |
3854 | |
3855 | set = pc_set (insn); |
3856 | |
3857 | /* See if this jump condition is known true or false. */ |
3858 | if (taken) |
3859 | cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx); |
3860 | else |
3861 | cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx); |
3862 | |
3863 | /* Get the type of comparison being done and the operands being compared. |
3864 | If we had to reverse a non-equality condition, record that fact so we |
3865 | know that it isn't valid for floating-point. */ |
3866 | code = GET_CODE (XEXP (SET_SRC (set), 0)); |
3867 | op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn); |
3868 | op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn); |
3869 | |
3870 | /* If fold_rtx returns NULL_RTX, there's nothing to record. */ |
3871 | if (op0 == NULL_RTX || op1 == NULL_RTX) |
3872 | return; |
3873 | |
3874 | code = find_comparison_args (code, parg1: &op0, parg2: &op1, pmode1: &mode0, pmode2: &mode1); |
3875 | if (! cond_known_true) |
3876 | { |
3877 | code = reversed_comparison_code_parts (code, op0, op1, insn); |
3878 | |
3879 | /* Don't remember if we can't find the inverse. */ |
3880 | if (code == UNKNOWN) |
3881 | return; |
3882 | } |
3883 | |
3884 | /* The mode is the mode of the non-constant. */ |
3885 | mode = mode0; |
3886 | if (mode1 != VOIDmode) |
3887 | mode = mode1; |
3888 | |
3889 | record_jump_cond (code, mode, op0, op1); |
3890 | } |
3891 | |
3892 | /* Yet another form of subreg creation. In this case, we want something in |
3893 | MODE, and we should assume OP has MODE iff it is naturally modeless. */ |
3894 | |
3895 | static rtx |
3896 | record_jump_cond_subreg (machine_mode mode, rtx op) |
3897 | { |
3898 | machine_mode op_mode = GET_MODE (op); |
3899 | if (op_mode == mode || op_mode == VOIDmode) |
3900 | return op; |
3901 | return lowpart_subreg (outermode: mode, op, innermode: op_mode); |
3902 | } |
3903 | |
3904 | /* We know that comparison CODE applied to OP0 and OP1 in MODE is true. |
3905 | Make any useful entries we can with that information. Called from |
3906 | above function and called recursively. */ |
3907 | |
3908 | static void |
3909 | record_jump_cond (enum rtx_code code, machine_mode mode, rtx op0, rtx op1) |
3910 | { |
3911 | unsigned op0_hash, op1_hash; |
3912 | int op0_in_memory, op1_in_memory; |
3913 | struct table_elt *op0_elt, *op1_elt; |
3914 | |
3915 | /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG, |
3916 | we know that they are also equal in the smaller mode (this is also |
3917 | true for all smaller modes whether or not there is a SUBREG, but |
3918 | is not worth testing for with no SUBREG). */ |
3919 | |
3920 | /* Note that GET_MODE (op0) may not equal MODE. */ |
3921 | if (code == EQ && paradoxical_subreg_p (x: op0)) |
3922 | { |
3923 | machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); |
3924 | rtx tem = record_jump_cond_subreg (mode: inner_mode, op: op1); |
3925 | if (tem) |
3926 | record_jump_cond (code, mode, SUBREG_REG (op0), op1: tem); |
3927 | } |
3928 | |
3929 | if (code == EQ && paradoxical_subreg_p (x: op1)) |
3930 | { |
3931 | machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); |
3932 | rtx tem = record_jump_cond_subreg (mode: inner_mode, op: op0); |
3933 | if (tem) |
3934 | record_jump_cond (code, mode, SUBREG_REG (op1), op1: tem); |
3935 | } |
3936 | |
3937 | /* Similarly, if this is an NE comparison, and either is a SUBREG |
3938 | making a smaller mode, we know the whole thing is also NE. */ |
3939 | |
3940 | /* Note that GET_MODE (op0) may not equal MODE; |
3941 | if we test MODE instead, we can get an infinite recursion |
3942 | alternating between two modes each wider than MODE. */ |
3943 | |
3944 | if (code == NE |
3945 | && partial_subreg_p (x: op0) |
3946 | && subreg_lowpart_p (op0)) |
3947 | { |
3948 | machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); |
3949 | rtx tem = record_jump_cond_subreg (mode: inner_mode, op: op1); |
3950 | if (tem) |
3951 | record_jump_cond (code, mode, SUBREG_REG (op0), op1: tem); |
3952 | } |
3953 | |
3954 | if (code == NE |
3955 | && partial_subreg_p (x: op1) |
3956 | && subreg_lowpart_p (op1)) |
3957 | { |
3958 | machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); |
3959 | rtx tem = record_jump_cond_subreg (mode: inner_mode, op: op0); |
3960 | if (tem) |
3961 | record_jump_cond (code, mode, SUBREG_REG (op1), op1: tem); |
3962 | } |
3963 | |
3964 | /* Hash both operands. */ |
3965 | |
3966 | do_not_record = 0; |
3967 | hash_arg_in_memory = 0; |
3968 | op0_hash = HASH (x: op0, mode); |
3969 | op0_in_memory = hash_arg_in_memory; |
3970 | |
3971 | if (do_not_record) |
3972 | return; |
3973 | |
3974 | do_not_record = 0; |
3975 | hash_arg_in_memory = 0; |
3976 | op1_hash = HASH (x: op1, mode); |
3977 | op1_in_memory = hash_arg_in_memory; |
3978 | |
3979 | if (do_not_record) |
3980 | return; |
3981 | |
3982 | /* Look up both operands. */ |
3983 | op0_elt = lookup (x: op0, hash: op0_hash, mode); |
3984 | op1_elt = lookup (x: op1, hash: op1_hash, mode); |
3985 | |
3986 | /* If both operands are already equivalent or if they are not in the |
3987 | table but are identical, do nothing. */ |
3988 | if ((op0_elt != 0 && op1_elt != 0 |
3989 | && op0_elt->first_same_value == op1_elt->first_same_value) |
3990 | || op0 == op1 || rtx_equal_p (op0, op1)) |
3991 | return; |
3992 | |
3993 | /* If we aren't setting two things equal all we can do is save this |
3994 | comparison. Similarly if this is floating-point. In the latter |
3995 | case, OP1 might be zero and both -0.0 and 0.0 are equal to it. |
3996 | If we record the equality, we might inadvertently delete code |
3997 | whose intent was to change -0 to +0. */ |
3998 | |
3999 | if (code != EQ || FLOAT_MODE_P (GET_MODE (op0))) |
4000 | { |
4001 | struct qty_table_elem *ent; |
4002 | int qty; |
4003 | |
4004 | /* If OP0 is not a register, or if OP1 is neither a register |
4005 | or constant, we can't do anything. */ |
4006 | |
4007 | if (!REG_P (op1)) |
4008 | op1 = equiv_constant (x: op1); |
4009 | |
4010 | if (!REG_P (op0) || op1 == 0) |
4011 | return; |
4012 | |
4013 | /* Put OP0 in the hash table if it isn't already. This gives it a |
4014 | new quantity number. */ |
4015 | if (op0_elt == 0) |
4016 | { |
4017 | if (insert_regs (x: op0, NULL, modified: false)) |
4018 | { |
4019 | rehash_using_reg (x: op0); |
4020 | op0_hash = HASH (x: op0, mode); |
4021 | |
4022 | /* If OP0 is contained in OP1, this changes its hash code |
4023 | as well. Faster to rehash than to check, except |
4024 | for the simple case of a constant. */ |
4025 | if (! CONSTANT_P (op1)) |
4026 | op1_hash = HASH (x: op1,mode); |
4027 | } |
4028 | |
4029 | op0_elt = insert (x: op0, NULL, hash: op0_hash, mode); |
4030 | op0_elt->in_memory = op0_in_memory; |
4031 | } |
4032 | |
4033 | qty = REG_QTY (REGNO (op0)); |
4034 | ent = &qty_table[qty]; |
4035 | |
4036 | ent->comparison_code = code; |
4037 | if (REG_P (op1)) |
4038 | { |
4039 | /* Look it up again--in case op0 and op1 are the same. */ |
4040 | op1_elt = lookup (x: op1, hash: op1_hash, mode); |
4041 | |
4042 | /* Put OP1 in the hash table so it gets a new quantity number. */ |
4043 | if (op1_elt == 0) |
4044 | { |
4045 | if (insert_regs (x: op1, NULL, modified: false)) |
4046 | { |
4047 | rehash_using_reg (x: op1); |
4048 | op1_hash = HASH (x: op1, mode); |
4049 | } |
4050 | |
4051 | op1_elt = insert (x: op1, NULL, hash: op1_hash, mode); |
4052 | op1_elt->in_memory = op1_in_memory; |
4053 | } |
4054 | |
4055 | ent->comparison_const = NULL_RTX; |
4056 | ent->comparison_qty = REG_QTY (REGNO (op1)); |
4057 | } |
4058 | else |
4059 | { |
4060 | ent->comparison_const = op1; |
4061 | ent->comparison_qty = -1; |
4062 | } |
4063 | |
4064 | return; |
4065 | } |
4066 | |
4067 | /* If either side is still missing an equivalence, make it now, |
4068 | then merge the equivalences. */ |
4069 | |
4070 | if (op0_elt == 0) |
4071 | { |
4072 | if (insert_regs (x: op0, NULL, modified: false)) |
4073 | { |
4074 | rehash_using_reg (x: op0); |
4075 | op0_hash = HASH (x: op0, mode); |
4076 | } |
4077 | |
4078 | op0_elt = insert (x: op0, NULL, hash: op0_hash, mode); |
4079 | op0_elt->in_memory = op0_in_memory; |
4080 | } |
4081 | |
4082 | if (op1_elt == 0) |
4083 | { |
4084 | if (insert_regs (x: op1, NULL, modified: false)) |
4085 | { |
4086 | rehash_using_reg (x: op1); |
4087 | op1_hash = HASH (x: op1, mode); |
4088 | } |
4089 | |
4090 | op1_elt = insert (x: op1, NULL, hash: op1_hash, mode); |
4091 | op1_elt->in_memory = op1_in_memory; |
4092 | } |
4093 | |
4094 | merge_equiv_classes (class1: op0_elt, class2: op1_elt); |
4095 | } |
4096 | |
4097 | /* CSE processing for one instruction. |
4098 | |
4099 | Most "true" common subexpressions are mostly optimized away in GIMPLE, |
4100 | but the few that "leak through" are cleaned up by cse_insn, and complex |
4101 | addressing modes are often formed here. |
4102 | |
4103 | The main function is cse_insn, and between here and that function |
4104 | a couple of helper functions is defined to keep the size of cse_insn |
4105 | within reasonable proportions. |
4106 | |
4107 | Data is shared between the main and helper functions via STRUCT SET, |
4108 | that contains all data related for every set in the instruction that |
4109 | is being processed. |
4110 | |
4111 | Note that cse_main processes all sets in the instruction. Most |
4112 | passes in GCC only process simple SET insns or single_set insns, but |
4113 | CSE processes insns with multiple sets as well. */ |
4114 | |
4115 | /* Data on one SET contained in the instruction. */ |
4116 | |
4117 | struct set |
4118 | { |
4119 | /* The SET rtx itself. */ |
4120 | rtx rtl; |
4121 | /* The SET_SRC of the rtx (the original value, if it is changing). */ |
4122 | rtx src; |
4123 | /* The hash-table element for the SET_SRC of the SET. */ |
4124 | struct table_elt *src_elt; |
4125 | /* Hash value for the SET_SRC. */ |
4126 | unsigned src_hash; |
4127 | /* Hash value for the SET_DEST. */ |
4128 | unsigned dest_hash; |
4129 | /* The SET_DEST, with SUBREG, etc., stripped. */ |
4130 | rtx inner_dest; |
4131 | /* Nonzero if the SET_SRC is in memory. */ |
4132 | char src_in_memory; |
4133 | /* Nonzero if the SET_SRC contains something |
4134 | whose value cannot be predicted and understood. */ |
4135 | char src_volatile; |
4136 | /* Original machine mode, in case it becomes a CONST_INT. */ |
4137 | ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE; |
4138 | /* Hash value of constant equivalent for SET_SRC. */ |
4139 | unsigned src_const_hash; |
4140 | /* A constant equivalent for SET_SRC, if any. */ |
4141 | rtx src_const; |
4142 | /* Table entry for constant equivalent for SET_SRC, if any. */ |
4143 | struct table_elt *src_const_elt; |
4144 | /* Table entry for the destination address. */ |
4145 | struct table_elt *dest_addr_elt; |
4146 | }; |
4147 | |
4148 | /* Special handling for (set REG0 REG1) where REG0 is the |
4149 | "cheapest", cheaper than REG1. After cse, REG1 will probably not |
4150 | be used in the sequel, so (if easily done) change this insn to |
4151 | (set REG1 REG0) and replace REG1 with REG0 in the previous insn |
4152 | that computed their value. Then REG1 will become a dead store |
4153 | and won't cloud the situation for later optimizations. |
4154 | |
4155 | Do not make this change if REG1 is a hard register, because it will |
4156 | then be used in the sequel and we may be changing a two-operand insn |
4157 | into a three-operand insn. |
4158 | |
4159 | This is the last transformation that cse_insn will try to do. */ |
4160 | |
4161 | static void |
4162 | try_back_substitute_reg (rtx set, rtx_insn *insn) |
4163 | { |
4164 | rtx dest = SET_DEST (set); |
4165 | rtx src = SET_SRC (set); |
4166 | |
4167 | if (REG_P (dest) |
4168 | && REG_P (src) && ! HARD_REGISTER_P (src) |
4169 | && REGNO_QTY_VALID_P (REGNO (src))) |
4170 | { |
4171 | int src_q = REG_QTY (REGNO (src)); |
4172 | struct qty_table_elem *src_ent = &qty_table[src_q]; |
4173 | |
4174 | if (src_ent->first_reg == REGNO (dest)) |
4175 | { |
4176 | /* Scan for the previous nonnote insn, but stop at a basic |
4177 | block boundary. */ |
4178 | rtx_insn *prev = insn; |
4179 | rtx_insn *bb_head = BB_HEAD (BLOCK_FOR_INSN (insn)); |
4180 | do |
4181 | { |
4182 | prev = PREV_INSN (insn: prev); |
4183 | } |
4184 | while (prev != bb_head && (NOTE_P (prev) || DEBUG_INSN_P (prev))); |
4185 | |
4186 | /* Do not swap the registers around if the previous instruction |
4187 | attaches a REG_EQUIV note to REG1. |
4188 | |
4189 | ??? It's not entirely clear whether we can transfer a REG_EQUIV |
4190 | from the pseudo that originally shadowed an incoming argument |
4191 | to another register. Some uses of REG_EQUIV might rely on it |
4192 | being attached to REG1 rather than REG2. |
4193 | |
4194 | This section previously turned the REG_EQUIV into a REG_EQUAL |
4195 | note. We cannot do that because REG_EQUIV may provide an |
4196 | uninitialized stack slot when REG_PARM_STACK_SPACE is used. */ |
4197 | if (NONJUMP_INSN_P (prev) |
4198 | && GET_CODE (PATTERN (prev)) == SET |
4199 | && SET_DEST (PATTERN (prev)) == src |
4200 | && ! find_reg_note (prev, REG_EQUIV, NULL_RTX)) |
4201 | { |
4202 | rtx note; |
4203 | |
4204 | validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1); |
4205 | validate_change (insn, &SET_DEST (set), src, 1); |
4206 | validate_change (insn, &SET_SRC (set), dest, 1); |
4207 | apply_change_group (); |
4208 | |
4209 | /* If INSN has a REG_EQUAL note, and this note mentions |
4210 | REG0, then we must delete it, because the value in |
4211 | REG0 has changed. If the note's value is REG1, we must |
4212 | also delete it because that is now this insn's dest. */ |
4213 | note = find_reg_note (insn, REG_EQUAL, NULL_RTX); |
4214 | if (note != 0 |
4215 | && (reg_mentioned_p (dest, XEXP (note, 0)) |
4216 | || rtx_equal_p (src, XEXP (note, 0)))) |
4217 | remove_note (insn, note); |
4218 | |
4219 | /* If INSN has a REG_ARGS_SIZE note, move it to PREV. */ |
4220 | note = find_reg_note (insn, REG_ARGS_SIZE, NULL_RTX); |
4221 | if (note != 0) |
4222 | { |
4223 | remove_note (insn, note); |
4224 | gcc_assert (!find_reg_note (prev, REG_ARGS_SIZE, NULL_RTX)); |
4225 | set_unique_reg_note (prev, REG_ARGS_SIZE, XEXP (note, 0)); |
4226 | } |
4227 | } |
4228 | } |
4229 | } |
4230 | } |
4231 | |
4232 | /* Add an entry containing RTL X into SETS. */ |
4233 | static inline void |
4234 | add_to_set (vec<struct set> *sets, rtx x) |
4235 | { |
4236 | struct set entry = {}; |
4237 | entry.rtl = x; |
4238 | sets->safe_push (obj: entry); |
4239 | } |
4240 | |
4241 | /* Record all the SETs in this instruction into SETS_PTR, |
4242 | and return the number of recorded sets. */ |
4243 | static int |
4244 | find_sets_in_insn (rtx_insn *insn, vec<struct set> *psets) |
4245 | { |
4246 | rtx x = PATTERN (insn); |
4247 | |
4248 | if (GET_CODE (x) == SET) |
4249 | { |
4250 | /* Ignore SETs that are unconditional jumps. |
4251 | They never need cse processing, so this does not hurt. |
4252 | The reason is not efficiency but rather |
4253 | so that we can test at the end for instructions |
4254 | that have been simplified to unconditional jumps |
4255 | and not be misled by unchanged instructions |
4256 | that were unconditional jumps to begin with. */ |
4257 | if (SET_DEST (x) == pc_rtx |
4258 | && GET_CODE (SET_SRC (x)) == LABEL_REF) |
4259 | ; |
4260 | /* Don't count call-insns, (set (reg 0) (call ...)), as a set. |
4261 | The hard function value register is used only once, to copy to |
4262 | someplace else, so it isn't worth cse'ing. */ |
4263 | else if (GET_CODE (SET_SRC (x)) == CALL) |
4264 | ; |
4265 | else if (GET_CODE (SET_SRC (x)) == CONST_VECTOR |
4266 | && GET_MODE_CLASS (GET_MODE (SET_SRC (x))) != MODE_VECTOR_BOOL |
4267 | /* Prevent duplicates from being generated if the type is a V1 |
4268 | type and a subreg. Folding this will result in the same |
4269 | element as folding x itself. */ |
4270 | && !(SUBREG_P (SET_DEST (x)) |
4271 | && known_eq (GET_MODE_NUNITS (GET_MODE (SET_SRC (x))), 1))) |
4272 | { |
4273 | /* First register the vector itself. */ |
4274 | add_to_set (sets: psets, x); |
4275 | rtx src = SET_SRC (x); |
4276 | /* Go over the constants of the CONST_VECTOR in forward order, to |
4277 | put them in the same order in the SETS array. */ |
4278 | for (unsigned i = 0; i < const_vector_encoded_nelts (x: src) ; i++) |
4279 | { |
4280 | /* These are templates and don't actually get emitted but are |
4281 | used to tell CSE how to get to a particular constant. */ |
4282 | rtx y = simplify_gen_vec_select (SET_DEST (x), index: i); |
4283 | gcc_assert (y); |
4284 | add_to_set (sets: psets, gen_rtx_SET (y, CONST_VECTOR_ELT (src, i))); |
4285 | } |
4286 | } |
4287 | else |
4288 | add_to_set (sets: psets, x); |
4289 | } |
4290 | else if (GET_CODE (x) == PARALLEL) |
4291 | { |
4292 | int i, lim = XVECLEN (x, 0); |
4293 | |
4294 | /* Go over the expressions of the PARALLEL in forward order, to |
4295 | put them in the same order in the SETS array. */ |
4296 | for (i = 0; i < lim; i++) |
4297 | { |
4298 | rtx y = XVECEXP (x, 0, i); |
4299 | if (GET_CODE (y) == SET) |
4300 | { |
4301 | /* As above, we ignore unconditional jumps and call-insns and |
4302 | ignore the result of apply_change_group. */ |
4303 | if (SET_DEST (y) == pc_rtx |
4304 | && GET_CODE (SET_SRC (y)) == LABEL_REF) |
4305 | ; |
4306 | else if (GET_CODE (SET_SRC (y)) == CALL) |
4307 | ; |
4308 | else |
4309 | add_to_set (sets: psets, x: y); |
4310 | } |
4311 | } |
4312 | } |
4313 | |
4314 | return psets->length (); |
4315 | } |
4316 | |
4317 | /* Subroutine of canonicalize_insn. X is an ASM_OPERANDS in INSN. */ |
4318 | |
4319 | static void |
4320 | canon_asm_operands (rtx x, rtx_insn *insn) |
4321 | { |
4322 | for (int i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) |
4323 | { |
4324 | rtx input = ASM_OPERANDS_INPUT (x, i); |
4325 | if (!(REG_P (input) && HARD_REGISTER_P (input))) |
4326 | { |
4327 | input = canon_reg (x: input, insn); |
4328 | validate_change (insn, &ASM_OPERANDS_INPUT (x, i), input, 1); |
4329 | } |
4330 | } |
4331 | } |
4332 | |
4333 | /* Where possible, substitute every register reference in the N_SETS |
4334 | number of SETS in INSN with the canonical register. |
4335 | |
4336 | Register canonicalization propagatest the earliest register (i.e. |
4337 | one that is set before INSN) with the same value. This is a very |
4338 | useful, simple form of CSE, to clean up warts from expanding GIMPLE |
4339 | to RTL. For instance, a CONST for an address is usually expanded |
4340 | multiple times to loads into different registers, thus creating many |
4341 | subexpressions of the form: |
4342 | |
4343 | (set (reg1) (some_const)) |
4344 | (set (mem (... reg1 ...) (thing))) |
4345 | (set (reg2) (some_const)) |
4346 | (set (mem (... reg2 ...) (thing))) |
4347 | |
4348 | After canonicalizing, the code takes the following form: |
4349 | |
4350 | (set (reg1) (some_const)) |
4351 | (set (mem (... reg1 ...) (thing))) |
4352 | (set (reg2) (some_const)) |
4353 | (set (mem (... reg1 ...) (thing))) |
4354 | |
4355 | The set to reg2 is now trivially dead, and the memory reference (or |
4356 | address, or whatever) may be a candidate for further CSEing. |
4357 | |
4358 | In this function, the result of apply_change_group can be ignored; |
4359 | see canon_reg. */ |
4360 | |
4361 | static void |
4362 | canonicalize_insn (rtx_insn *insn, vec<struct set> *psets) |
4363 | { |
4364 | vec<struct set> sets = *psets; |
4365 | int n_sets = sets.length (); |
4366 | rtx tem; |
4367 | rtx x = PATTERN (insn); |
4368 | int i; |
4369 | |
4370 | if (CALL_P (insn)) |
4371 | { |
4372 | for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1)) |
4373 | if (GET_CODE (XEXP (tem, 0)) != SET) |
4374 | XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn); |
4375 | } |
4376 | |
4377 | if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL) |
4378 | { |
4379 | canon_reg (SET_SRC (x), insn); |
4380 | apply_change_group (); |
4381 | fold_rtx (SET_SRC (x), insn); |
4382 | } |
4383 | else if (GET_CODE (x) == CLOBBER) |
4384 | { |
4385 | /* If we clobber memory, canon the address. |
4386 | This does nothing when a register is clobbered |
4387 | because we have already invalidated the reg. */ |
4388 | if (MEM_P (XEXP (x, 0))) |
4389 | canon_reg (XEXP (x, 0), insn); |
4390 | } |
4391 | else if (GET_CODE (x) == USE |
4392 | && ! (REG_P (XEXP (x, 0)) |
4393 | && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)) |
4394 | /* Canonicalize a USE of a pseudo register or memory location. */ |
4395 | canon_reg (x, insn); |
4396 | else if (GET_CODE (x) == ASM_OPERANDS) |
4397 | canon_asm_operands (x, insn); |
4398 | else if (GET_CODE (x) == CALL) |
4399 | { |
4400 | canon_reg (x, insn); |
4401 | apply_change_group (); |
4402 | fold_rtx (x, insn); |
4403 | } |
4404 | else if (DEBUG_INSN_P (insn)) |
4405 | canon_reg (x: PATTERN (insn), insn); |
4406 | else if (GET_CODE (x) == PARALLEL) |
4407 | { |
4408 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) |
4409 | { |
4410 | rtx y = XVECEXP (x, 0, i); |
4411 | if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL) |
4412 | { |
4413 | canon_reg (SET_SRC (y), insn); |
4414 | apply_change_group (); |
4415 | fold_rtx (SET_SRC (y), insn); |
4416 | } |
4417 | else if (GET_CODE (y) == CLOBBER) |
4418 | { |
4419 | if (MEM_P (XEXP (y, 0))) |
4420 | canon_reg (XEXP (y, 0), insn); |
4421 | } |
4422 | else if (GET_CODE (y) == USE |
4423 | && ! (REG_P (XEXP (y, 0)) |
4424 | && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER)) |
4425 | canon_reg (x: y, insn); |
4426 | else if (GET_CODE (y) == ASM_OPERANDS) |
4427 | canon_asm_operands (x: y, insn); |
4428 | else if (GET_CODE (y) == CALL) |
4429 | { |
4430 | canon_reg (x: y, insn); |
4431 | apply_change_group (); |
4432 | fold_rtx (x: y, insn); |
4433 | } |
4434 | } |
4435 | } |
4436 | |
4437 | if (n_sets == 1 && REG_NOTES (insn) != 0 |
4438 | && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0) |
4439 | { |
4440 | /* We potentially will process this insn many times. Therefore, |
4441 | drop the REG_EQUAL note if it is equal to the SET_SRC of the |
4442 | unique set in INSN. |
4443 | |
4444 | Do not do so if the REG_EQUAL note is for a STRICT_LOW_PART, |
4445 | because cse_insn handles those specially. */ |
4446 | if (GET_CODE (SET_DEST (sets[0].rtl)) != STRICT_LOW_PART |
4447 | && rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))) |
4448 | remove_note (insn, tem); |
4449 | else |
4450 | { |
4451 | canon_reg (XEXP (tem, 0), insn); |
4452 | apply_change_group (); |
4453 | XEXP (tem, 0) = fold_rtx (XEXP (tem, 0), insn); |
4454 | df_notes_rescan (insn); |
4455 | } |
4456 | } |
4457 | |
4458 | /* Canonicalize sources and addresses of destinations. |
4459 | We do this in a separate pass to avoid problems when a MATCH_DUP is |
4460 | present in the insn pattern. In that case, we want to ensure that |
4461 | we don't break the duplicate nature of the pattern. So we will replace |
4462 | both operands at the same time. Otherwise, we would fail to find an |
4463 | equivalent substitution in the loop calling validate_change below. |
4464 | |
4465 | We used to suppress canonicalization of DEST if it appears in SRC, |
4466 | but we don't do this any more. */ |
4467 | |
4468 | for (i = 0; i < n_sets; i++) |
4469 | { |
4470 | rtx dest = SET_DEST (sets[i].rtl); |
4471 | rtx src = SET_SRC (sets[i].rtl); |
4472 | rtx new_rtx = canon_reg (x: src, insn); |
4473 | |
4474 | validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1); |
4475 | |
4476 | if (GET_CODE (dest) == ZERO_EXTRACT) |
4477 | { |
4478 | validate_change (insn, &XEXP (dest, 1), |
4479 | canon_reg (XEXP (dest, 1), insn), 1); |
4480 | validate_change (insn, &XEXP (dest, 2), |
4481 | canon_reg (XEXP (dest, 2), insn), 1); |
4482 | } |
4483 | |
4484 | while (GET_CODE (dest) == SUBREG |
4485 | || GET_CODE (dest) == ZERO_EXTRACT |
4486 | || GET_CODE (dest) == STRICT_LOW_PART) |
4487 | dest = XEXP (dest, 0); |
4488 | |
4489 | if (MEM_P (dest)) |
4490 | canon_reg (x: dest, insn); |
4491 | } |
4492 | |
4493 | /* Now that we have done all the replacements, we can apply the change |
4494 | group and see if they all work. Note that this will cause some |
4495 | canonicalizations that would have worked individually not to be applied |
4496 | because some other canonicalization didn't work, but this should not |
4497 | occur often. |
4498 | |
4499 | The result of apply_change_group can be ignored; see canon_reg. */ |
4500 | |
4501 | apply_change_group (); |
4502 | } |
4503 | |
4504 | /* Main function of CSE. |
4505 | First simplify sources and addresses of all assignments |
4506 | in the instruction, using previously-computed equivalents values. |
4507 | Then install the new sources and destinations in the table |
4508 | of available values. */ |
4509 | |
4510 | static void |
4511 | cse_insn (rtx_insn *insn) |
4512 | { |
4513 | rtx x = PATTERN (insn); |
4514 | int i; |
4515 | rtx tem; |
4516 | int n_sets = 0; |
4517 | |
4518 | rtx src_eqv = 0; |
4519 | struct table_elt *src_eqv_elt = 0; |
4520 | int src_eqv_volatile = 0; |
4521 | int src_eqv_in_memory = 0; |
4522 | unsigned src_eqv_hash = 0; |
4523 | |
4524 | this_insn = insn; |
4525 | |
4526 | /* Find all regs explicitly clobbered in this insn, |
4527 | to ensure they are not replaced with any other regs |
4528 | elsewhere in this insn. */ |
4529 | invalidate_from_sets_and_clobbers (insn); |
4530 | |
4531 | /* Record all the SETs in this instruction. */ |
4532 | auto_vec<struct set, 8> sets; |
4533 | n_sets = find_sets_in_insn (insn, psets: (vec<struct set>*)&sets); |
4534 | |
4535 | /* Substitute the canonical register where possible. */ |
4536 | canonicalize_insn (insn, psets: (vec<struct set>*)&sets); |
4537 | |
4538 | /* If this insn has a REG_EQUAL note, store the equivalent value in SRC_EQV, |
4539 | if different, or if the DEST is a STRICT_LOW_PART/ZERO_EXTRACT. The |
4540 | latter condition is necessary because SRC_EQV is handled specially for |
4541 | this case, and if it isn't set, then there will be no equivalence |
4542 | for the destination. */ |
4543 | if (n_sets == 1 && REG_NOTES (insn) != 0 |
4544 | && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0) |
4545 | { |
4546 | |
4547 | if (GET_CODE (SET_DEST (sets[0].rtl)) != ZERO_EXTRACT |
4548 | && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)) |
4549 | || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART)) |
4550 | src_eqv = copy_rtx (XEXP (tem, 0)); |
4551 | /* If DEST is of the form ZERO_EXTACT, as in: |
4552 | (set (zero_extract:SI (reg:SI 119) |
4553 | (const_int 16 [0x10]) |
4554 | (const_int 16 [0x10])) |
4555 | (const_int 51154 [0xc7d2])) |
4556 | REG_EQUAL note will specify the value of register (reg:SI 119) at this |
4557 | point. Note that this is different from SRC_EQV. We can however |
4558 | calculate SRC_EQV with the position and width of ZERO_EXTRACT. */ |
4559 | else if (GET_CODE (SET_DEST (sets[0].rtl)) == ZERO_EXTRACT |
4560 | && CONST_INT_P (XEXP (tem, 0)) |
4561 | && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 1)) |
4562 | && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 2))) |
4563 | { |
4564 | rtx dest_reg = XEXP (SET_DEST (sets[0].rtl), 0); |
4565 | /* This is the mode of XEXP (tem, 0) as well. */ |
4566 | scalar_int_mode dest_mode |
4567 | = as_a <scalar_int_mode> (GET_MODE (dest_reg)); |
4568 | rtx width = XEXP (SET_DEST (sets[0].rtl), 1); |
4569 | rtx pos = XEXP (SET_DEST (sets[0].rtl), 2); |
4570 | HOST_WIDE_INT val = INTVAL (XEXP (tem, 0)); |
4571 | HOST_WIDE_INT mask; |
4572 | unsigned int shift; |
4573 | if (BITS_BIG_ENDIAN) |
4574 | shift = (GET_MODE_PRECISION (mode: dest_mode) |
4575 | - INTVAL (pos) - INTVAL (width)); |
4576 | else |
4577 | shift = INTVAL (pos); |
4578 | if (INTVAL (width) == HOST_BITS_PER_WIDE_INT) |
4579 | mask = HOST_WIDE_INT_M1; |
4580 | else |
4581 | mask = (HOST_WIDE_INT_1 << INTVAL (width)) - 1; |
4582 | val = (val >> shift) & mask; |
4583 | src_eqv = GEN_INT (val); |
4584 | } |
4585 | } |
4586 | |
4587 | /* Set sets[i].src_elt to the class each source belongs to. |
4588 | Detect assignments from or to volatile things |
4589 | and set set[i] to zero so they will be ignored |
4590 | in the rest of this function. |
4591 | |
4592 | Nothing in this loop changes the hash table or the register chains. */ |
4593 | |
4594 | for (i = 0; i < n_sets; i++) |
4595 | { |
4596 | bool repeat = false; |
4597 | bool noop_insn = false; |
4598 | rtx src, dest; |
4599 | rtx src_folded; |
4600 | struct table_elt *elt = 0, *p; |
4601 | machine_mode mode; |
4602 | rtx src_eqv_here; |
4603 | rtx src_const = 0; |
4604 | rtx src_related = 0; |
4605 | rtx dest_related = 0; |
4606 | bool src_related_is_const_anchor = false; |
4607 | struct table_elt *src_const_elt = 0; |
4608 | int src_cost = MAX_COST; |
4609 | int src_eqv_cost = MAX_COST; |
4610 | int src_folded_cost = MAX_COST; |
4611 | int src_related_cost = MAX_COST; |
4612 | int src_elt_cost = MAX_COST; |
4613 | int src_regcost = MAX_COST; |
4614 | int src_eqv_regcost = MAX_COST; |
4615 | int src_folded_regcost = MAX_COST; |
4616 | int src_related_regcost = MAX_COST; |
4617 | int src_elt_regcost = MAX_COST; |
4618 | scalar_int_mode int_mode; |
4619 | |
4620 | dest = SET_DEST (sets[i].rtl); |
4621 | src = SET_SRC (sets[i].rtl); |
4622 | |
4623 | /* If SRC is a constant that has no machine mode, |
4624 | hash it with the destination's machine mode. |
4625 | This way we can keep different modes separate. */ |
4626 | |
4627 | mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); |
4628 | sets[i].mode = mode; |
4629 | |
4630 | if (src_eqv) |
4631 | { |
4632 | machine_mode eqvmode = mode; |
4633 | if (GET_CODE (dest) == STRICT_LOW_PART) |
4634 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); |
4635 | do_not_record = 0; |
4636 | hash_arg_in_memory = 0; |
4637 | src_eqv_hash = HASH (x: src_eqv, mode: eqvmode); |
4638 | |
4639 | /* Find the equivalence class for the equivalent expression. */ |
4640 | |
4641 | if (!do_not_record) |
4642 | src_eqv_elt = lookup (x: src_eqv, hash: src_eqv_hash, mode: eqvmode); |
4643 | |
4644 | src_eqv_volatile = do_not_record; |
4645 | src_eqv_in_memory = hash_arg_in_memory; |
4646 | } |
4647 | |
4648 | /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the |
4649 | value of the INNER register, not the destination. So it is not |
4650 | a valid substitution for the source. But save it for later. */ |
4651 | if (GET_CODE (dest) == STRICT_LOW_PART) |
4652 | src_eqv_here = 0; |
4653 | else |
4654 | src_eqv_here = src_eqv; |
4655 | |
4656 | /* Simplify and foldable subexpressions in SRC. Then get the fully- |
4657 | simplified result, which may not necessarily be valid. */ |
4658 | src_folded = fold_rtx (x: src, NULL); |
4659 | |
4660 | #if 0 |
4661 | /* ??? This caused bad code to be generated for the m68k port with -O2. |
4662 | Suppose src is (CONST_INT -1), and that after truncation src_folded |
4663 | is (CONST_INT 3). Suppose src_folded is then used for src_const. |
4664 | At the end we will add src and src_const to the same equivalence |
4665 | class. We now have 3 and -1 on the same equivalence class. This |
4666 | causes later instructions to be mis-optimized. */ |
4667 | /* If storing a constant in a bitfield, pre-truncate the constant |
4668 | so we will be able to record it later. */ |
4669 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT) |
4670 | { |
4671 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); |
4672 | |
4673 | if (CONST_INT_P (src) |
4674 | && CONST_INT_P (width) |
4675 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
4676 | && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) |
4677 | src_folded |
4678 | = GEN_INT (INTVAL (src) & ((HOST_WIDE_INT_1 |
4679 | << INTVAL (width)) - 1)); |
4680 | } |
4681 | #endif |
4682 | |
4683 | /* Compute SRC's hash code, and also notice if it |
4684 | should not be recorded at all. In that case, |
4685 | prevent any further processing of this assignment. |
4686 | |
4687 | We set DO_NOT_RECORD if the destination has a REG_UNUSED note. |
4688 | This avoids getting the source register into the tables, where it |
4689 | may be invalidated later (via REG_QTY), then trigger an ICE upon |
4690 | re-insertion. |
4691 | |
4692 | This is only a problem in multi-set insns. If it were a single |
4693 | set the dead copy would have been removed. If the RHS were anything |
4694 | but a simple REG, then we won't call insert_regs and thus there's |
4695 | no potential for triggering the ICE. */ |
4696 | do_not_record = (REG_P (dest) |
4697 | && REG_P (src) |
4698 | && find_reg_note (insn, REG_UNUSED, dest)); |
4699 | hash_arg_in_memory = 0; |
4700 | |
4701 | sets[i].src = src; |
4702 | sets[i].src_hash = HASH (x: src, mode); |
4703 | sets[i].src_volatile = do_not_record; |
4704 | sets[i].src_in_memory = hash_arg_in_memory; |
4705 | |
4706 | /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is |
4707 | a pseudo, do not record SRC. Using SRC as a replacement for |
4708 | anything else will be incorrect in that situation. Note that |
4709 | this usually occurs only for stack slots, in which case all the |
4710 | RTL would be referring to SRC, so we don't lose any optimization |
4711 | opportunities by not having SRC in the hash table. */ |
4712 | |
4713 | if (MEM_P (src) |
4714 | && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0 |
4715 | && REG_P (dest) |
4716 | && REGNO (dest) >= FIRST_PSEUDO_REGISTER) |
4717 | sets[i].src_volatile = 1; |
4718 | |
4719 | else if (GET_CODE (src) == ASM_OPERANDS |
4720 | && GET_CODE (x) == PARALLEL) |
4721 | { |
4722 | /* Do not record result of a non-volatile inline asm with |
4723 | more than one result. */ |
4724 | if (n_sets > 1) |
4725 | sets[i].src_volatile = 1; |
4726 | |
4727 | int j, lim = XVECLEN (x, 0); |
4728 | for (j = 0; j < lim; j++) |
4729 | { |
4730 | rtx y = XVECEXP (x, 0, j); |
4731 | /* And do not record result of a non-volatile inline asm |
4732 | with "memory" clobber. */ |
4733 | if (GET_CODE (y) == CLOBBER && MEM_P (XEXP (y, 0))) |
4734 | { |
4735 | sets[i].src_volatile = 1; |
4736 | break; |
4737 | } |
4738 | } |
4739 | } |
4740 | |
4741 | #if 0 |
4742 | /* It is no longer clear why we used to do this, but it doesn't |
4743 | appear to still be needed. So let's try without it since this |
4744 | code hurts cse'ing widened ops. */ |
4745 | /* If source is a paradoxical subreg (such as QI treated as an SI), |
4746 | treat it as volatile. It may do the work of an SI in one context |
4747 | where the extra bits are not being used, but cannot replace an SI |
4748 | in general. */ |
4749 | if (paradoxical_subreg_p (src)) |
4750 | sets[i].src_volatile = 1; |
4751 | #endif |
4752 | |
4753 | /* Locate all possible equivalent forms for SRC. Try to replace |
4754 | SRC in the insn with each cheaper equivalent. |
4755 | |
4756 | We have the following types of equivalents: SRC itself, a folded |
4757 | version, a value given in a REG_EQUAL note, or a value related |
4758 | to a constant. |
4759 | |
4760 | Each of these equivalents may be part of an additional class |
4761 | of equivalents (if more than one is in the table, they must be in |
4762 | the same class; we check for this). |
4763 | |
4764 | If the source is volatile, we don't do any table lookups. |
4765 | |
4766 | We note any constant equivalent for possible later use in a |
4767 | REG_NOTE. */ |
4768 | |
4769 | if (!sets[i].src_volatile) |
4770 | elt = lookup (x: src, hash: sets[i].src_hash, mode); |
4771 | |
4772 | sets[i].src_elt = elt; |
4773 | |
4774 | if (elt && src_eqv_here && src_eqv_elt) |
4775 | { |
4776 | if (elt->first_same_value != src_eqv_elt->first_same_value) |
4777 | { |
4778 | /* The REG_EQUAL is indicating that two formerly distinct |
4779 | classes are now equivalent. So merge them. */ |
4780 | merge_equiv_classes (class1: elt, class2: src_eqv_elt); |
4781 | src_eqv_hash = HASH (x: src_eqv, mode: elt->mode); |
4782 | src_eqv_elt = lookup (x: src_eqv, hash: src_eqv_hash, mode: elt->mode); |
4783 | } |
4784 | |
4785 | src_eqv_here = 0; |
4786 | } |
4787 | |
4788 | else if (src_eqv_elt) |
4789 | elt = src_eqv_elt; |
4790 | |
4791 | /* Try to find a constant somewhere and record it in `src_const'. |
4792 | Record its table element, if any, in `src_const_elt'. Look in |
4793 | any known equivalences first. (If the constant is not in the |
4794 | table, also set `sets[i].src_const_hash'). */ |
4795 | if (elt) |
4796 | for (p = elt->first_same_value; p; p = p->next_same_value) |
4797 | if (p->is_const) |
4798 | { |
4799 | src_const = p->exp; |
4800 | src_const_elt = elt; |
4801 | break; |
4802 | } |
4803 | |
4804 | if (src_const == 0 |
4805 | && (CONSTANT_P (src_folded) |
4806 | /* Consider (minus (label_ref L1) (label_ref L2)) as |
4807 | "constant" here so we will record it. This allows us |
4808 | to fold switch statements when an ADDR_DIFF_VEC is used. */ |
4809 | || (GET_CODE (src_folded) == MINUS |
4810 | && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF |
4811 | && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF))) |
4812 | src_const = src_folded, src_const_elt = elt; |
4813 | else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here)) |
4814 | src_const = src_eqv_here, src_const_elt = src_eqv_elt; |
4815 | |
4816 | /* If we don't know if the constant is in the table, get its |
4817 | hash code and look it up. */ |
4818 | if (src_const && src_const_elt == 0) |
4819 | { |
4820 | sets[i].src_const_hash = HASH (x: src_const, mode); |
4821 | src_const_elt = lookup (x: src_const, hash: sets[i].src_const_hash, mode); |
4822 | } |
4823 | |
4824 | sets[i].src_const = src_const; |
4825 | sets[i].src_const_elt = src_const_elt; |
4826 | |
4827 | /* If the constant and our source are both in the table, mark them as |
4828 | equivalent. Otherwise, if a constant is in the table but the source |
4829 | isn't, set ELT to it. */ |
4830 | if (src_const_elt && elt |
4831 | && src_const_elt->first_same_value != elt->first_same_value) |
4832 | merge_equiv_classes (class1: elt, class2: src_const_elt); |
4833 | else if (src_const_elt && elt == 0) |
4834 | elt = src_const_elt; |
4835 | |
4836 | /* See if there is a register linearly related to a constant |
4837 | equivalent of SRC. */ |
4838 | if (src_const |
4839 | && (GET_CODE (src_const) == CONST |
4840 | || (src_const_elt && src_const_elt->related_value != 0))) |
4841 | { |
4842 | src_related = use_related_value (x: src_const, elt: src_const_elt); |
4843 | if (src_related) |
4844 | { |
4845 | struct table_elt *src_related_elt |
4846 | = lookup (x: src_related, hash: HASH (x: src_related, mode), mode); |
4847 | if (src_related_elt && elt) |
4848 | { |
4849 | if (elt->first_same_value |
4850 | != src_related_elt->first_same_value) |
4851 | /* This can occur when we previously saw a CONST |
4852 | involving a SYMBOL_REF and then see the SYMBOL_REF |
4853 | twice. Merge the involved classes. */ |
4854 | merge_equiv_classes (class1: elt, class2: src_related_elt); |
4855 | |
4856 | src_related = 0; |
4857 | src_related_elt = 0; |
4858 | } |
4859 | else if (src_related_elt && elt == 0) |
4860 | elt = src_related_elt; |
4861 | } |
4862 | } |
4863 | |
4864 | /* See if we have a CONST_INT that is already in a register in a |
4865 | wider mode. */ |
4866 | |
4867 | if (src_const && src_related == 0 && CONST_INT_P (src_const) |
4868 | && is_int_mode (mode, int_mode: &int_mode) |
4869 | && GET_MODE_PRECISION (mode: int_mode) < BITS_PER_WORD) |
4870 | { |
4871 | opt_scalar_int_mode wider_mode_iter; |
4872 | FOR_EACH_WIDER_MODE (wider_mode_iter, int_mode) |
4873 | { |
4874 | scalar_int_mode wider_mode = wider_mode_iter.require (); |
4875 | if (GET_MODE_PRECISION (mode: wider_mode) > BITS_PER_WORD) |
4876 | break; |
4877 | |
4878 | struct table_elt *const_elt |
4879 | = lookup (x: src_const, hash: HASH (x: src_const, mode: wider_mode), mode: wider_mode); |
4880 | |
4881 | if (const_elt == 0) |
4882 | continue; |
4883 | |
4884 | for (const_elt = const_elt->first_same_value; |
4885 | const_elt; const_elt = const_elt->next_same_value) |
4886 | if (REG_P (const_elt->exp)) |
4887 | { |
4888 | src_related = gen_lowpart (int_mode, const_elt->exp); |
4889 | break; |
4890 | } |
4891 | |
4892 | if (src_related != 0) |
4893 | break; |
4894 | } |
4895 | } |
4896 | |
4897 | /* Another possibility is that we have an AND with a constant in |
4898 | a mode narrower than a word. If so, it might have been generated |
4899 | as part of an "if" which would narrow the AND. If we already |
4900 | have done the AND in a wider mode, we can use a SUBREG of that |
4901 | value. */ |
4902 | |
4903 | if (flag_expensive_optimizations && ! src_related |
4904 | && is_a <scalar_int_mode> (m: mode, result: &int_mode) |
4905 | && GET_CODE (src) == AND && CONST_INT_P (XEXP (src, 1)) |
4906 | && GET_MODE_SIZE (mode: int_mode) < UNITS_PER_WORD) |
4907 | { |
4908 | opt_scalar_int_mode tmode_iter; |
4909 | rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1)); |
4910 | |
4911 | FOR_EACH_WIDER_MODE (tmode_iter, int_mode) |
4912 | { |
4913 | scalar_int_mode tmode = tmode_iter.require (); |
4914 | if (GET_MODE_SIZE (mode: tmode) > UNITS_PER_WORD) |
4915 | break; |
4916 | |
4917 | rtx inner = gen_lowpart (tmode, XEXP (src, 0)); |
4918 | struct table_elt *larger_elt; |
4919 | |
4920 | if (inner) |
4921 | { |
4922 | PUT_MODE (x: new_and, mode: tmode); |
4923 | XEXP (new_and, 0) = inner; |
4924 | larger_elt = lookup (x: new_and, hash: HASH (x: new_and, mode: tmode), mode: tmode); |
4925 | if (larger_elt == 0) |
4926 | continue; |
4927 | |
4928 | for (larger_elt = larger_elt->first_same_value; |
4929 | larger_elt; larger_elt = larger_elt->next_same_value) |
4930 | if (REG_P (larger_elt->exp)) |
4931 | { |
4932 | src_related |
4933 | = gen_lowpart (int_mode, larger_elt->exp); |
4934 | break; |
4935 | } |
4936 | |
4937 | if (src_related) |
4938 | break; |
4939 | } |
4940 | } |
4941 | } |
4942 | |
4943 | /* See if a MEM has already been loaded with a widening operation; |
4944 | if it has, we can use a subreg of that. Many CISC machines |
4945 | also have such operations, but this is only likely to be |
4946 | beneficial on these machines. */ |
4947 | |
4948 | rtx_code extend_op; |
4949 | if (flag_expensive_optimizations && src_related == 0 |
4950 | && MEM_P (src) && ! do_not_record |
4951 | && is_a <scalar_int_mode> (m: mode, result: &int_mode) |
4952 | && (extend_op = load_extend_op (mode: int_mode)) != UNKNOWN) |
4953 | { |
4954 | #if GCC_VERSION >= 5000 |
4955 | struct rtx_def memory_extend_buf; |
4956 | rtx memory_extend_rtx = &memory_extend_buf; |
4957 | #else |
4958 | /* Workaround GCC < 5 bug, fixed in r5-3834 as part of PR63362 |
4959 | fix. */ |
4960 | alignas (rtx_def) unsigned char memory_extended_buf[sizeof (rtx_def)]; |
4961 | rtx memory_extend_rtx = (rtx) &memory_extended_buf[0]; |
4962 | #endif |
4963 | |
4964 | /* Set what we are trying to extend and the operation it might |
4965 | have been extended with. */ |
4966 | memset (s: memory_extend_rtx, c: 0, n: sizeof (*memory_extend_rtx)); |
4967 | PUT_CODE (memory_extend_rtx, extend_op); |
4968 | XEXP (memory_extend_rtx, 0) = src; |
4969 | |
4970 | opt_scalar_int_mode tmode_iter; |
4971 | FOR_EACH_WIDER_MODE (tmode_iter, int_mode) |
4972 | { |
4973 | struct table_elt *larger_elt; |
4974 | |
4975 | scalar_int_mode tmode = tmode_iter.require (); |
4976 | if (GET_MODE_SIZE (mode: tmode) > UNITS_PER_WORD) |
4977 | break; |
4978 | |
4979 | PUT_MODE (x: memory_extend_rtx, mode: tmode); |
4980 | larger_elt = lookup (x: memory_extend_rtx, |
4981 | hash: HASH (x: memory_extend_rtx, mode: tmode), mode: tmode); |
4982 | if (larger_elt == 0) |
4983 | continue; |
4984 | |
4985 | for (larger_elt = larger_elt->first_same_value; |
4986 | larger_elt; larger_elt = larger_elt->next_same_value) |
4987 | if (REG_P (larger_elt->exp)) |
4988 | { |
4989 | src_related = gen_lowpart (int_mode, larger_elt->exp); |
4990 | break; |
4991 | } |
4992 | |
4993 | if (src_related) |
4994 | break; |
4995 | } |
4996 | } |
4997 | |
4998 | /* Try to express the constant using a register+offset expression |
4999 | derived from a constant anchor. */ |
5000 | |
5001 | if (targetm.const_anchor |
5002 | && !src_related |
5003 | && src_const |
5004 | && GET_CODE (src_const) == CONST_INT) |
5005 | { |
5006 | src_related = try_const_anchors (src_const, mode); |
5007 | src_related_is_const_anchor = src_related != NULL_RTX; |
5008 | } |
5009 | |
5010 | /* Try to re-materialize a vec_dup with an existing constant. */ |
5011 | rtx src_elt; |
5012 | if ((!src_eqv_here || CONSTANT_P (src_eqv_here)) |
5013 | && const_vec_duplicate_p (x: src, elt: &src_elt)) |
5014 | { |
5015 | machine_mode const_mode = GET_MODE_INNER (GET_MODE (src)); |
5016 | struct table_elt *related_elt |
5017 | = lookup (x: src_elt, hash: HASH (x: src_elt, mode: const_mode), mode: const_mode); |
5018 | if (related_elt) |
5019 | { |
5020 | for (related_elt = related_elt->first_same_value; |
5021 | related_elt; related_elt = related_elt->next_same_value) |
5022 | if (REG_P (related_elt->exp)) |
5023 | { |
5024 | /* We don't need to compare costs with an existing (constant) |
5025 | src_eqv_here, since any such src_eqv_here should already be |
5026 | available in src_const. */ |
5027 | src_eqv_here |
5028 | = gen_rtx_VEC_DUPLICATE (GET_MODE (src), |
5029 | related_elt->exp); |
5030 | break; |
5031 | } |
5032 | } |
5033 | } |
5034 | |
5035 | if (src == src_folded) |
5036 | src_folded = 0; |
5037 | |
5038 | /* At this point, ELT, if nonzero, points to a class of expressions |
5039 | equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED, |
5040 | and SRC_RELATED, if nonzero, each contain additional equivalent |
5041 | expressions. Prune these latter expressions by deleting expressions |
5042 | already in the equivalence class. |
5043 | |
5044 | Check for an equivalent identical to the destination. If found, |
5045 | this is the preferred equivalent since it will likely lead to |
5046 | elimination of the insn. Indicate this by placing it in |
5047 | `src_related'. */ |
5048 | |
5049 | if (elt) |
5050 | elt = elt->first_same_value; |
5051 | for (p = elt; p; p = p->next_same_value) |
5052 | { |
5053 | enum rtx_code code = GET_CODE (p->exp); |
5054 | |
5055 | /* If the expression is not valid, ignore it. Then we do not |
5056 | have to check for validity below. In most cases, we can use |
5057 | `rtx_equal_p', since canonicalization has already been done. */ |
5058 | if (code != REG && ! exp_equiv_p (x: p->exp, y: p->exp, validate: 1, for_gcse: false)) |
5059 | continue; |
5060 | |
5061 | /* Also skip paradoxical subregs, unless that's what we're |
5062 | looking for. */ |
5063 | if (paradoxical_subreg_p (x: p->exp) |
5064 | && ! (src != 0 |
5065 | && GET_CODE (src) == SUBREG |
5066 | && GET_MODE (src) == GET_MODE (p->exp) |
5067 | && partial_subreg_p (GET_MODE (SUBREG_REG (src)), |
5068 | GET_MODE (SUBREG_REG (p->exp))))) |
5069 | continue; |
5070 | |
5071 | if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp)) |
5072 | src = 0; |
5073 | else if (src_folded && GET_CODE (src_folded) == code |
5074 | && rtx_equal_p (src_folded, p->exp)) |
5075 | src_folded = 0; |
5076 | else if (src_eqv_here && GET_CODE (src_eqv_here) == code |
5077 | && rtx_equal_p (src_eqv_here, p->exp)) |
5078 | src_eqv_here = 0; |
5079 | else if (src_related && GET_CODE (src_related) == code |
5080 | && rtx_equal_p (src_related, p->exp)) |
5081 | src_related = 0; |
5082 | |
5083 | /* This is the same as the destination of the insns, we want |
5084 | to prefer it. The code below will then give it a negative |
5085 | cost. */ |
5086 | if (!dest_related |
5087 | && GET_CODE (dest) == code && rtx_equal_p (p->exp, dest)) |
5088 | dest_related = p->exp; |
5089 | } |
5090 | |
5091 | /* Find the cheapest valid equivalent, trying all the available |
5092 | possibilities. Prefer items not in the hash table to ones |
5093 | that are when they are equal cost. Note that we can never |
5094 | worsen an insn as the current contents will also succeed. |
5095 | If we find an equivalent identical to the destination, use it as best, |
5096 | since this insn will probably be eliminated in that case. */ |
5097 | if (src) |
5098 | { |
5099 | if (rtx_equal_p (src, dest)) |
5100 | src_cost = src_regcost = -1; |
5101 | else |
5102 | { |
5103 | src_cost = COST (src, mode); |
5104 | src_regcost = approx_reg_cost (x: src); |
5105 | } |
5106 | } |
5107 | |
5108 | if (src_eqv_here) |
5109 | { |
5110 | if (rtx_equal_p (src_eqv_here, dest)) |
5111 | src_eqv_cost = src_eqv_regcost = -1; |
5112 | else |
5113 | { |
5114 | src_eqv_cost = COST (src_eqv_here, mode); |
5115 | src_eqv_regcost = approx_reg_cost (x: src_eqv_here); |
5116 | } |
5117 | } |
5118 | |
5119 | if (src_folded) |
5120 | { |
5121 | if (rtx_equal_p (src_folded, dest)) |
5122 | src_folded_cost = src_folded_regcost = -1; |
5123 | else |
5124 | { |
5125 | src_folded_cost = COST (src_folded, mode); |
5126 | src_folded_regcost = approx_reg_cost (x: src_folded); |
5127 | } |
5128 | } |
5129 | |
5130 | if (dest_related) |
5131 | { |
5132 | src_related_cost = src_related_regcost = -1; |
5133 | /* Handle it as src_related. */ |
5134 | src_related = dest_related; |
5135 | } |
5136 | else if (src_related) |
5137 | { |
5138 | src_related_cost = COST (src_related, mode); |
5139 | src_related_regcost = approx_reg_cost (x: src_related); |
5140 | |
5141 | /* If a const-anchor is used to synthesize a constant that |
5142 | normally requires multiple instructions then slightly prefer |
5143 | it over the original sequence. These instructions are likely |
5144 | to become redundant now. We can't compare against the cost |
5145 | of src_eqv_here because, on MIPS for example, multi-insn |
5146 | constants have zero cost; they are assumed to be hoisted from |
5147 | loops. */ |
5148 | if (src_related_is_const_anchor |
5149 | && src_related_cost == src_cost |
5150 | && src_eqv_here) |
5151 | src_related_cost--; |
5152 | } |
5153 | |
5154 | /* If this was an indirect jump insn, a known label will really be |
5155 | cheaper even though it looks more expensive. */ |
5156 | if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF) |
5157 | src_folded = src_const, src_folded_cost = src_folded_regcost = -1; |
5158 | |
5159 | /* Terminate loop when replacement made. This must terminate since |
5160 | the current contents will be tested and will always be valid. */ |
5161 | while (1) |
5162 | { |
5163 | rtx trial; |
5164 | |
5165 | /* Skip invalid entries. */ |
5166 | while (elt && !REG_P (elt->exp) |
5167 | && ! exp_equiv_p (x: elt->exp, y: elt->exp, validate: 1, for_gcse: false)) |
5168 | elt = elt->next_same_value; |
5169 | |
5170 | /* A paradoxical subreg would be bad here: it'll be the right |
5171 | size, but later may be adjusted so that the upper bits aren't |
5172 | what we want. So reject it. */ |
5173 | if (elt != 0 |
5174 | && paradoxical_subreg_p (x: elt->exp) |
5175 | /* It is okay, though, if the rtx we're trying to match |
5176 | will ignore any of the bits we can't predict. */ |
5177 | && ! (src != 0 |
5178 | && GET_CODE (src) == SUBREG |
5179 | && GET_MODE (src) == GET_MODE (elt->exp) |
5180 | && partial_subreg_p (GET_MODE (SUBREG_REG (src)), |
5181 | GET_MODE (SUBREG_REG (elt->exp))))) |
5182 | { |
5183 | elt = elt->next_same_value; |
5184 | continue; |
5185 | } |
5186 | |
5187 | if (elt) |
5188 | { |
5189 | src_elt_cost = elt->cost; |
5190 | src_elt_regcost = elt->regcost; |
5191 | } |
5192 | |
5193 | /* Find cheapest and skip it for the next time. For items |
5194 | of equal cost, use this order: |
5195 | src_folded, src, src_eqv, src_related and hash table entry. */ |
5196 | if (src_folded |
5197 | && preferable (cost_a: src_folded_cost, regcost_a: src_folded_regcost, |
5198 | cost_b: src_cost, regcost_b: src_regcost) <= 0 |
5199 | && preferable (cost_a: src_folded_cost, regcost_a: src_folded_regcost, |
5200 | cost_b: src_eqv_cost, regcost_b: src_eqv_regcost) <= 0 |
5201 | && preferable (cost_a: src_folded_cost, regcost_a: src_folded_regcost, |
5202 | cost_b: src_related_cost, regcost_b: src_related_regcost) <= 0 |
5203 | && preferable (cost_a: src_folded_cost, regcost_a: src_folded_regcost, |
5204 | cost_b: src_elt_cost, regcost_b: src_elt_regcost) <= 0) |
5205 | trial = src_folded, src_folded_cost = MAX_COST; |
5206 | else if (src |
5207 | && preferable (cost_a: src_cost, regcost_a: src_regcost, |
5208 | cost_b: src_eqv_cost, regcost_b: src_eqv_regcost) <= 0 |
5209 | && preferable (cost_a: src_cost, regcost_a: src_regcost, |
5210 | cost_b: src_related_cost, regcost_b: src_related_regcost) <= 0 |
5211 | && preferable (cost_a: src_cost, regcost_a: src_regcost, |
5212 | cost_b: src_elt_cost, regcost_b: src_elt_regcost) <= 0) |
5213 | trial = src, src_cost = MAX_COST; |
5214 | else if (src_eqv_here |
5215 | && preferable (cost_a: src_eqv_cost, regcost_a: src_eqv_regcost, |
5216 | cost_b: src_related_cost, regcost_b: src_related_regcost) <= 0 |
5217 | && preferable (cost_a: src_eqv_cost, regcost_a: src_eqv_regcost, |
5218 | cost_b: src_elt_cost, regcost_b: src_elt_regcost) <= 0) |
5219 | trial = src_eqv_here, src_eqv_cost = MAX_COST; |
5220 | else if (src_related |
5221 | && preferable (cost_a: src_related_cost, regcost_a: src_related_regcost, |
5222 | cost_b: src_elt_cost, regcost_b: src_elt_regcost) <= 0) |
5223 | trial = src_related, src_related_cost = MAX_COST; |
5224 | else |
5225 | { |
5226 | trial = elt->exp; |
5227 | elt = elt->next_same_value; |
5228 | src_elt_cost = MAX_COST; |
5229 | } |
5230 | |
5231 | /* Try to optimize |
5232 | (set (reg:M N) (const_int A)) |
5233 | (set (reg:M2 O) (const_int B)) |
5234 | (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D)) |
5235 | (reg:M2 O)). */ |
5236 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT |
5237 | && CONST_INT_P (trial) |
5238 | && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 1)) |
5239 | && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 2)) |
5240 | && REG_P (XEXP (SET_DEST (sets[i].rtl), 0)) |
5241 | && (known_ge |
5242 | (GET_MODE_PRECISION (GET_MODE (SET_DEST (sets[i].rtl))), |
5243 | INTVAL (XEXP (SET_DEST (sets[i].rtl), 1)))) |
5244 | && ((unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 1)) |
5245 | + (unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 2)) |
5246 | <= HOST_BITS_PER_WIDE_INT)) |
5247 | { |
5248 | rtx dest_reg = XEXP (SET_DEST (sets[i].rtl), 0); |
5249 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); |
5250 | rtx pos = XEXP (SET_DEST (sets[i].rtl), 2); |
5251 | unsigned int dest_hash = HASH (x: dest_reg, GET_MODE (dest_reg)); |
5252 | struct table_elt *dest_elt |
5253 | = lookup (x: dest_reg, hash: dest_hash, GET_MODE (dest_reg)); |
5254 | rtx dest_cst = NULL; |
5255 | |
5256 | if (dest_elt) |
5257 | for (p = dest_elt->first_same_value; p; p = p->next_same_value) |
5258 | if (p->is_const && CONST_INT_P (p->exp)) |
5259 | { |
5260 | dest_cst = p->exp; |
5261 | break; |
5262 | } |
5263 | if (dest_cst) |
5264 | { |
5265 | HOST_WIDE_INT val = INTVAL (dest_cst); |
5266 | HOST_WIDE_INT mask; |
5267 | unsigned int shift; |
5268 | /* This is the mode of DEST_CST as well. */ |
5269 | scalar_int_mode dest_mode |
5270 | = as_a <scalar_int_mode> (GET_MODE (dest_reg)); |
5271 | if (BITS_BIG_ENDIAN) |
5272 | shift = GET_MODE_PRECISION (mode: dest_mode) |
5273 | - INTVAL (pos) - INTVAL (width); |
5274 | else |
5275 | shift = INTVAL (pos); |
5276 | if (INTVAL (width) == HOST_BITS_PER_WIDE_INT) |
5277 | mask = HOST_WIDE_INT_M1; |
5278 | else |
5279 | mask = (HOST_WIDE_INT_1 << INTVAL (width)) - 1; |
5280 | val &= ~(mask << shift); |
5281 | val |= (INTVAL (trial) & mask) << shift; |
5282 | val = trunc_int_for_mode (val, dest_mode); |
5283 | validate_unshare_change (insn, &SET_DEST (sets[i].rtl), |
5284 | dest_reg, 1); |
5285 | validate_unshare_change (insn, &SET_SRC (sets[i].rtl), |
5286 | GEN_INT (val), 1); |
5287 | if (apply_change_group ()) |
5288 | { |
5289 | rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX); |
5290 | if (note) |
5291 | { |
5292 | remove_note (insn, note); |
5293 | df_notes_rescan (insn); |
5294 | } |
5295 | src_eqv = NULL_RTX; |
5296 | src_eqv_elt = NULL; |
5297 | src_eqv_volatile = 0; |
5298 | src_eqv_in_memory = 0; |
5299 | src_eqv_hash = 0; |
5300 | repeat = true; |
5301 | break; |
5302 | } |
5303 | } |
5304 | } |
5305 | |
5306 | /* We don't normally have an insn matching (set (pc) (pc)), so |
5307 | check for this separately here. We will delete such an |
5308 | insn below. |
5309 | |
5310 | For other cases such as a table jump or conditional jump |
5311 | where we know the ultimate target, go ahead and replace the |
5312 | operand. While that may not make a valid insn, we will |
5313 | reemit the jump below (and also insert any necessary |
5314 | barriers). */ |
5315 | if (n_sets == 1 && dest == pc_rtx |
5316 | && (trial == pc_rtx |
5317 | || (GET_CODE (trial) == LABEL_REF |
5318 | && ! condjump_p (insn)))) |
5319 | { |
5320 | /* Don't substitute non-local labels, this confuses CFG. */ |
5321 | if (GET_CODE (trial) == LABEL_REF |
5322 | && LABEL_REF_NONLOCAL_P (trial)) |
5323 | continue; |
5324 | |
5325 | SET_SRC (sets[i].rtl) = trial; |
5326 | cse_jumps_altered = true; |
5327 | break; |
5328 | } |
5329 | |
5330 | /* Similarly, lots of targets don't allow no-op |
5331 | (set (mem x) (mem x)) moves. Even (set (reg x) (reg x)) |
5332 | might be impossible for certain registers (like CC registers). */ |
5333 | else if (n_sets == 1 |
5334 | && !CALL_P (insn) |
5335 | && (MEM_P (trial) || REG_P (trial)) |
5336 | && rtx_equal_p (trial, dest) |
5337 | && !side_effects_p (dest) |
5338 | && (cfun->can_delete_dead_exceptions |
5339 | || insn_nothrow_p (insn)) |
5340 | /* We can only remove the later store if the earlier aliases |
5341 | at least all accesses the later one. */ |
5342 | && (!MEM_P (trial) |
5343 | || ((MEM_ALIAS_SET (dest) == MEM_ALIAS_SET (trial) |
5344 | || alias_set_subset_of (MEM_ALIAS_SET (dest), |
5345 | MEM_ALIAS_SET (trial))) |
5346 | && (!MEM_EXPR (trial) |
5347 | || refs_same_for_tbaa_p (MEM_EXPR (trial), |
5348 | MEM_EXPR (dest)))))) |
5349 | { |
5350 | SET_SRC (sets[i].rtl) = trial; |
5351 | noop_insn = true; |
5352 | break; |
5353 | } |
5354 | |
5355 | /* Reject certain invalid forms of CONST that we create. */ |
5356 | else if (CONSTANT_P (trial) |
5357 | && GET_CODE (trial) == CONST |
5358 | /* Reject cases that will cause decode_rtx_const to |
5359 | die. On the alpha when simplifying a switch, we |
5360 | get (const (truncate (minus (label_ref) |
5361 | (label_ref)))). */ |
5362 | && (GET_CODE (XEXP (trial, 0)) == TRUNCATE |
5363 | /* Likewise on IA-64, except without the |
5364 | truncate. */ |
5365 | || (GET_CODE (XEXP (trial, 0)) == MINUS |
5366 | && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF |
5367 | && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF))) |
5368 | /* Do nothing for this case. */ |
5369 | ; |
5370 | |
5371 | /* Do not replace anything with a MEM, except the replacement |
5372 | is a no-op. This allows this loop to terminate. */ |
5373 | else if (MEM_P (trial) && !rtx_equal_p (trial, SET_SRC(sets[i].rtl))) |
5374 | /* Do nothing for this case. */ |
5375 | ; |
5376 | |
5377 | /* Look for a substitution that makes a valid insn. */ |
5378 | else if (validate_unshare_change (insn, &SET_SRC (sets[i].rtl), |
5379 | trial, 0)) |
5380 | { |
5381 | rtx new_rtx = canon_reg (SET_SRC (sets[i].rtl), insn); |
5382 | |
5383 | /* The result of apply_change_group can be ignored; see |
5384 | canon_reg. */ |
5385 | |
5386 | validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1); |
5387 | apply_change_group (); |
5388 | |
5389 | break; |
5390 | } |
5391 | |
5392 | /* If the current function uses a constant pool and this is a |
5393 | constant, try making a pool entry. Put it in src_folded |
5394 | unless we already have done this since that is where it |
5395 | likely came from. */ |
5396 | |
5397 | else if (crtl->uses_const_pool |
5398 | && CONSTANT_P (trial) |
5399 | && !CONST_INT_P (trial) |
5400 | && (src_folded == 0 || !MEM_P (src_folded)) |
5401 | && GET_MODE_CLASS (mode) != MODE_CC |
5402 | && mode != VOIDmode) |
5403 | { |
5404 | src_folded = force_const_mem (mode, trial); |
5405 | if (src_folded) |
5406 | { |
5407 | src_folded_cost = COST (src_folded, mode); |
5408 | src_folded_regcost = approx_reg_cost (x: src_folded); |
5409 | } |
5410 | } |
5411 | } |
5412 | |
5413 | /* If we changed the insn too much, handle this set from scratch. */ |
5414 | if (repeat) |
5415 | { |
5416 | i--; |
5417 | continue; |
5418 | } |
5419 | |
5420 | src = SET_SRC (sets[i].rtl); |
5421 | |
5422 | /* In general, it is good to have a SET with SET_SRC == SET_DEST. |
5423 | However, there is an important exception: If both are registers |
5424 | that are not the head of their equivalence class, replace SET_SRC |
5425 | with the head of the class. If we do not do this, we will have |
5426 | both registers live over a portion of the basic block. This way, |
5427 | their lifetimes will likely abut instead of overlapping. */ |
5428 | if (REG_P (dest) |
5429 | && REGNO_QTY_VALID_P (REGNO (dest))) |
5430 | { |
5431 | int dest_q = REG_QTY (REGNO (dest)); |
5432 | struct qty_table_elem *dest_ent = &qty_table[dest_q]; |
5433 | |
5434 | if (dest_ent->mode == GET_MODE (dest) |
5435 | && dest_ent->first_reg != REGNO (dest) |
5436 | && REG_P (src) && REGNO (src) == REGNO (dest) |
5437 | /* Don't do this if the original insn had a hard reg as |
5438 | SET_SRC or SET_DEST. */ |
5439 | && (!REG_P (sets[i].src) |
5440 | || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER) |
5441 | && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER)) |
5442 | /* We can't call canon_reg here because it won't do anything if |
5443 | SRC is a hard register. */ |
5444 | { |
5445 | int src_q = REG_QTY (REGNO (src)); |
5446 | struct qty_table_elem *src_ent = &qty_table[src_q]; |
5447 | int first = src_ent->first_reg; |
5448 | rtx new_src |
5449 | = (first >= FIRST_PSEUDO_REGISTER |
5450 | ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first)); |
5451 | |
5452 | /* We must use validate-change even for this, because this |
5453 | might be a special no-op instruction, suitable only to |
5454 | tag notes onto. */ |
5455 | if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0)) |
5456 | { |
5457 | src = new_src; |
5458 | /* If we had a constant that is cheaper than what we are now |
5459 | setting SRC to, use that constant. We ignored it when we |
5460 | thought we could make this into a no-op. */ |
5461 | if (src_const && COST (src_const, mode) < COST (src, mode) |
5462 | && validate_change (insn, &SET_SRC (sets[i].rtl), |
5463 | src_const, 0)) |
5464 | src = src_const; |
5465 | } |
5466 | } |
5467 | } |
5468 | |
5469 | /* If we made a change, recompute SRC values. */ |
5470 | if (src != sets[i].src) |
5471 | { |
5472 | do_not_record = 0; |
5473 | hash_arg_in_memory = 0; |
5474 | sets[i].src = src; |
5475 | sets[i].src_hash = HASH (x: src, mode); |
5476 | sets[i].src_volatile = do_not_record; |
5477 | sets[i].src_in_memory = hash_arg_in_memory; |
5478 | sets[i].src_elt = lookup (x: src, hash: sets[i].src_hash, mode); |
5479 | } |
5480 | |
5481 | /* If this is a single SET, we are setting a register, and we have an |
5482 | equivalent constant, we want to add a REG_EQUAL note if the constant |
5483 | is different from the source. We don't want to do it for a constant |
5484 | pseudo since verifying that this pseudo hasn't been eliminated is a |
5485 | pain; moreover such a note won't help anything. |
5486 | |
5487 | Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF))) |
5488 | which can be created for a reference to a compile time computable |
5489 | entry in a jump table. */ |
5490 | if (n_sets == 1 |
5491 | && REG_P (dest) |
5492 | && src_const |
5493 | && !REG_P (src_const) |
5494 | && !(GET_CODE (src_const) == SUBREG |
5495 | && REG_P (SUBREG_REG (src_const))) |
5496 | && !(GET_CODE (src_const) == CONST |
5497 | && GET_CODE (XEXP (src_const, 0)) == MINUS |
5498 | && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF |
5499 | && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF) |
5500 | && !rtx_equal_p (src, src_const)) |
5501 | { |
5502 | /* Make sure that the rtx is not shared. */ |
5503 | src_const = copy_rtx (src_const); |
5504 | |
5505 | /* Record the actual constant value in a REG_EQUAL note, |
5506 | making a new one if one does not already exist. */ |
5507 | set_unique_reg_note (insn, REG_EQUAL, src_const); |
5508 | df_notes_rescan (insn); |
5509 | } |
5510 | |
5511 | /* Now deal with the destination. */ |
5512 | do_not_record = 0; |
5513 | |
5514 | /* Look within any ZERO_EXTRACT to the MEM or REG within it. */ |
5515 | while (GET_CODE (dest) == SUBREG |
5516 | || GET_CODE (dest) == ZERO_EXTRACT |
5517 | || GET_CODE (dest) == STRICT_LOW_PART) |
5518 | dest = XEXP (dest, 0); |
5519 | |
5520 | sets[i].inner_dest = dest; |
5521 | |
5522 | if (MEM_P (dest)) |
5523 | { |
5524 | #ifdef PUSH_ROUNDING |
5525 | /* Stack pushes invalidate the stack pointer. */ |
5526 | rtx addr = XEXP (dest, 0); |
5527 | if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC |
5528 | && XEXP (addr, 0) == stack_pointer_rtx) |
5529 | invalidate (stack_pointer_rtx, VOIDmode); |
5530 | #endif |
5531 | dest = fold_rtx (x: dest, insn); |
5532 | } |
5533 | |
5534 | /* Compute the hash code of the destination now, |
5535 | before the effects of this instruction are recorded, |
5536 | since the register values used in the address computation |
5537 | are those before this instruction. */ |
5538 | sets[i].dest_hash = HASH (x: dest, mode); |
5539 | |
5540 | /* Don't enter a bit-field in the hash table |
5541 | because the value in it after the store |
5542 | may not equal what was stored, due to truncation. */ |
5543 | |
5544 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT) |
5545 | { |
5546 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); |
5547 | |
5548 | if (src_const != 0 && CONST_INT_P (src_const) |
5549 | && CONST_INT_P (width) |
5550 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
5551 | && ! (INTVAL (src_const) |
5552 | & (HOST_WIDE_INT_M1U << INTVAL (width)))) |
5553 | /* Exception: if the value is constant, |
5554 | and it won't be truncated, record it. */ |
5555 | ; |
5556 | else |
5557 | { |
5558 | /* This is chosen so that the destination will be invalidated |
5559 | but no new value will be recorded. |
5560 | We must invalidate because sometimes constant |
5561 | values can be recorded for bitfields. */ |
5562 | sets[i].src_elt = 0; |
5563 | sets[i].src_volatile = 1; |
5564 | src_eqv = 0; |
5565 | src_eqv_elt = 0; |
5566 | } |
5567 | } |
5568 | |
5569 | /* If only one set in a JUMP_INSN and it is now a no-op, we can delete |
5570 | the insn. */ |
5571 | else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx) |
5572 | { |
5573 | /* One less use of the label this insn used to jump to. */ |
5574 | cse_cfg_altered |= delete_insn_and_edges (insn); |
5575 | cse_jumps_altered = true; |
5576 | /* No more processing for this set. */ |
5577 | sets[i].rtl = 0; |
5578 | } |
5579 | |
5580 | /* Similarly for no-op moves. */ |
5581 | else if (noop_insn) |
5582 | { |
5583 | if (cfun->can_throw_non_call_exceptions && can_throw_internal (insn)) |
5584 | cse_cfg_altered = true; |
5585 | cse_cfg_altered |= delete_insn_and_edges (insn); |
5586 | /* No more processing for this set. */ |
5587 | sets[i].rtl = 0; |
5588 | } |
5589 | |
5590 | /* If this SET is now setting PC to a label, we know it used to |
5591 | be a conditional or computed branch. */ |
5592 | else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF |
5593 | && !LABEL_REF_NONLOCAL_P (src)) |
5594 | { |
5595 | /* We reemit the jump in as many cases as possible just in |
5596 | case the form of an unconditional jump is significantly |
5597 | different than a computed jump or conditional jump. |
5598 | |
5599 | If this insn has multiple sets, then reemitting the |
5600 | jump is nontrivial. So instead we just force rerecognition |
5601 | and hope for the best. */ |
5602 | if (n_sets == 1) |
5603 | { |
5604 | rtx_jump_insn *new_rtx; |
5605 | rtx note; |
5606 | |
5607 | rtx_insn *seq = targetm.gen_jump (XEXP (src, 0)); |
5608 | new_rtx = emit_jump_insn_before (seq, insn); |
5609 | JUMP_LABEL (new_rtx) = XEXP (src, 0); |
5610 | LABEL_NUSES (XEXP (src, 0))++; |
5611 | |
5612 | /* Make sure to copy over REG_NON_LOCAL_GOTO. */ |
5613 | note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0); |
5614 | if (note) |
5615 | { |
5616 | XEXP (note, 1) = NULL_RTX; |
5617 | REG_NOTES (new_rtx) = note; |
5618 | } |
5619 | |
5620 | cse_cfg_altered |= delete_insn_and_edges (insn); |
5621 | insn = new_rtx; |
5622 | } |
5623 | else |
5624 | INSN_CODE (insn) = -1; |
5625 | |
5626 | /* Do not bother deleting any unreachable code, let jump do it. */ |
5627 | cse_jumps_altered = true; |
5628 | sets[i].rtl = 0; |
5629 | } |
5630 | |
5631 | /* If destination is volatile, invalidate it and then do no further |
5632 | processing for this assignment. */ |
5633 | |
5634 | else if (do_not_record) |
5635 | { |
5636 | invalidate_dest (dest); |
5637 | sets[i].rtl = 0; |
5638 | } |
5639 | |
5640 | if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl)) |
5641 | { |
5642 | do_not_record = 0; |
5643 | sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode); |
5644 | if (do_not_record) |
5645 | { |
5646 | invalidate_dest (SET_DEST (sets[i].rtl)); |
5647 | sets[i].rtl = 0; |
5648 | } |
5649 | } |
5650 | } |
5651 | |
5652 | /* Now enter all non-volatile source expressions in the hash table |
5653 | if they are not already present. |
5654 | Record their equivalence classes in src_elt. |
5655 | This way we can insert the corresponding destinations into |
5656 | the same classes even if the actual sources are no longer in them |
5657 | (having been invalidated). */ |
5658 | |
5659 | if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile |
5660 | && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl))) |
5661 | { |
5662 | struct table_elt *elt; |
5663 | struct table_elt *classp = sets[0].src_elt; |
5664 | rtx dest = SET_DEST (sets[0].rtl); |
5665 | machine_mode eqvmode = GET_MODE (dest); |
5666 | |
5667 | if (GET_CODE (dest) == STRICT_LOW_PART) |
5668 | { |
5669 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); |
5670 | classp = 0; |
5671 | } |
5672 | if (insert_regs (x: src_eqv, classp, modified: false)) |
5673 | { |
5674 | rehash_using_reg (x: src_eqv); |
5675 | src_eqv_hash = HASH (x: src_eqv, mode: eqvmode); |
5676 | } |
5677 | elt = insert (x: src_eqv, classp, hash: src_eqv_hash, mode: eqvmode); |
5678 | elt->in_memory = src_eqv_in_memory; |
5679 | src_eqv_elt = elt; |
5680 | |
5681 | /* Check to see if src_eqv_elt is the same as a set source which |
5682 | does not yet have an elt, and if so set the elt of the set source |
5683 | to src_eqv_elt. */ |
5684 | for (i = 0; i < n_sets; i++) |
5685 | if (sets[i].rtl && sets[i].src_elt == 0 |
5686 | && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv)) |
5687 | sets[i].src_elt = src_eqv_elt; |
5688 | } |
5689 | |
5690 | for (i = 0; i < n_sets; i++) |
5691 | if (sets[i].rtl && ! sets[i].src_volatile |
5692 | && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl))) |
5693 | { |
5694 | if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART) |
5695 | { |
5696 | /* REG_EQUAL in setting a STRICT_LOW_PART |
5697 | gives an equivalent for the entire destination register, |
5698 | not just for the subreg being stored in now. |
5699 | This is a more interesting equivalence, so we arrange later |
5700 | to treat the entire reg as the destination. */ |
5701 | sets[i].src_elt = src_eqv_elt; |
5702 | sets[i].src_hash = src_eqv_hash; |
5703 | } |
5704 | else |
5705 | { |
5706 | /* Insert source and constant equivalent into hash table, if not |
5707 | already present. */ |
5708 | struct table_elt *classp = src_eqv_elt; |
5709 | rtx src = sets[i].src; |
5710 | rtx dest = SET_DEST (sets[i].rtl); |
5711 | machine_mode mode |
5712 | = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); |
5713 | |
5714 | /* It's possible that we have a source value known to be |
5715 | constant but don't have a REG_EQUAL note on the insn. |
5716 | Lack of a note will mean src_eqv_elt will be NULL. This |
5717 | can happen where we've generated a SUBREG to access a |
5718 | CONST_INT that is already in a register in a wider mode. |
5719 | Ensure that the source expression is put in the proper |
5720 | constant class. */ |
5721 | if (!classp) |
5722 | classp = sets[i].src_const_elt; |
5723 | |
5724 | if (sets[i].src_elt == 0) |
5725 | { |
5726 | struct table_elt *elt; |
5727 | |
5728 | /* Note that these insert_regs calls cannot remove |
5729 | any of the src_elt's, because they would have failed to |
5730 | match if not still valid. */ |
5731 | if (insert_regs (x: src, classp, modified: false)) |
5732 | { |
5733 | rehash_using_reg (x: src); |
5734 | sets[i].src_hash = HASH (x: src, mode); |
5735 | } |
5736 | elt = insert (x: src, classp, hash: sets[i].src_hash, mode); |
5737 | elt->in_memory = sets[i].src_in_memory; |
5738 | /* If inline asm has any clobbers, ensure we only reuse |
5739 | existing inline asms and never try to put the ASM_OPERANDS |
5740 | into an insn that isn't inline asm. */ |
5741 | if (GET_CODE (src) == ASM_OPERANDS |
5742 | && GET_CODE (x) == PARALLEL) |
5743 | elt->cost = MAX_COST; |
5744 | sets[i].src_elt = classp = elt; |
5745 | } |
5746 | if (sets[i].src_const && sets[i].src_const_elt == 0 |
5747 | && src != sets[i].src_const |
5748 | && ! rtx_equal_p (sets[i].src_const, src)) |
5749 | sets[i].src_elt = insert (x: sets[i].src_const, classp, |
5750 | hash: sets[i].src_const_hash, mode); |
5751 | } |
5752 | } |
5753 | else if (sets[i].src_elt == 0) |
5754 | /* If we did not insert the source into the hash table (e.g., it was |
5755 | volatile), note the equivalence class for the REG_EQUAL value, if any, |
5756 | so that the destination goes into that class. */ |
5757 | sets[i].src_elt = src_eqv_elt; |
5758 | |
5759 | /* Record destination addresses in the hash table. This allows us to |
5760 | check if they are invalidated by other sets. */ |
5761 | for (i = 0; i < n_sets; i++) |
5762 | { |
5763 | if (sets[i].rtl) |
5764 | { |
5765 | rtx x = sets[i].inner_dest; |
5766 | struct table_elt *elt; |
5767 | machine_mode mode; |
5768 | unsigned hash; |
5769 | |
5770 | if (MEM_P (x)) |
5771 | { |
5772 | x = XEXP (x, 0); |
5773 | mode = GET_MODE (x); |
5774 | hash = HASH (x, mode); |
5775 | elt = lookup (x, hash, mode); |
5776 | if (!elt) |
5777 | { |
5778 | if (insert_regs (x, NULL, modified: false)) |
5779 | { |
5780 | rtx dest = SET_DEST (sets[i].rtl); |
5781 | |
5782 | rehash_using_reg (x); |
5783 | hash = HASH (x, mode); |
5784 | sets[i].dest_hash = HASH (x: dest, GET_MODE (dest)); |
5785 | } |
5786 | elt = insert (x, NULL, hash, mode); |
5787 | } |
5788 | |
5789 | sets[i].dest_addr_elt = elt; |
5790 | } |
5791 | else |
5792 | sets[i].dest_addr_elt = NULL; |
5793 | } |
5794 | } |
5795 | |
5796 | invalidate_from_clobbers (insn); |
5797 | |
5798 | /* Some registers are invalidated by subroutine calls. Memory is |
5799 | invalidated by non-constant calls. */ |
5800 | |
5801 | if (CALL_P (insn)) |
5802 | { |
5803 | if (!(RTL_CONST_OR_PURE_CALL_P (insn))) |
5804 | invalidate_memory (); |
5805 | else |
5806 | /* For const/pure calls, invalidate any argument slots, because |
5807 | those are owned by the callee. */ |
5808 | for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1)) |
5809 | if (GET_CODE (XEXP (tem, 0)) == USE |
5810 | && MEM_P (XEXP (XEXP (tem, 0), 0))) |
5811 | invalidate (XEXP (XEXP (tem, 0), 0), VOIDmode); |
5812 | invalidate_for_call (insn); |
5813 | } |
5814 | |
5815 | /* Now invalidate everything set by this instruction. |
5816 | If a SUBREG or other funny destination is being set, |
5817 | sets[i].rtl is still nonzero, so here we invalidate the reg |
5818 | a part of which is being set. */ |
5819 | |
5820 | for (i = 0; i < n_sets; i++) |
5821 | if (sets[i].rtl) |
5822 | { |
5823 | /* We can't use the inner dest, because the mode associated with |
5824 | a ZERO_EXTRACT is significant. */ |
5825 | rtx dest = SET_DEST (sets[i].rtl); |
5826 | |
5827 | /* Needed for registers to remove the register from its |
5828 | previous quantity's chain. |
5829 | Needed for memory if this is a nonvarying address, unless |
5830 | we have just done an invalidate_memory that covers even those. */ |
5831 | if (REG_P (dest) || GET_CODE (dest) == SUBREG) |
5832 | invalidate (x: dest, VOIDmode); |
5833 | else if (MEM_P (dest)) |
5834 | invalidate (x: dest, VOIDmode); |
5835 | else if (GET_CODE (dest) == STRICT_LOW_PART |
5836 | || GET_CODE (dest) == ZERO_EXTRACT) |
5837 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
5838 | } |
5839 | |
5840 | /* Don't cse over a call to setjmp; on some machines (eg VAX) |
5841 | the regs restored by the longjmp come from a later time |
5842 | than the setjmp. */ |
5843 | if (CALL_P (insn) && find_reg_note (insn, REG_SETJMP, NULL)) |
5844 | { |
5845 | flush_hash_table (); |
5846 | goto done; |
5847 | } |
5848 | |
5849 | /* Make sure registers mentioned in destinations |
5850 | are safe for use in an expression to be inserted. |
5851 | This removes from the hash table |
5852 | any invalid entry that refers to one of these registers. |
5853 | |
5854 | We don't care about the return value from mention_regs because |
5855 | we are going to hash the SET_DEST values unconditionally. */ |
5856 | |
5857 | for (i = 0; i < n_sets; i++) |
5858 | { |
5859 | if (sets[i].rtl) |
5860 | { |
5861 | rtx x = SET_DEST (sets[i].rtl); |
5862 | |
5863 | if (!REG_P (x)) |
5864 | mention_regs (x); |
5865 | else |
5866 | { |
5867 | /* We used to rely on all references to a register becoming |
5868 | inaccessible when a register changes to a new quantity, |
5869 | since that changes the hash code. However, that is not |
5870 | safe, since after HASH_SIZE new quantities we get a |
5871 | hash 'collision' of a register with its own invalid |
5872 | entries. And since SUBREGs have been changed not to |
5873 | change their hash code with the hash code of the register, |
5874 | it wouldn't work any longer at all. So we have to check |
5875 | for any invalid references lying around now. |
5876 | This code is similar to the REG case in mention_regs, |
5877 | but it knows that reg_tick has been incremented, and |
5878 | it leaves reg_in_table as -1 . */ |
5879 | unsigned int regno = REGNO (x); |
5880 | unsigned int endregno = END_REGNO (x); |
5881 | unsigned int i; |
5882 | |
5883 | for (i = regno; i < endregno; i++) |
5884 | { |
5885 | if (REG_IN_TABLE (i) >= 0) |
5886 | { |
5887 | remove_invalid_refs (regno: i); |
5888 | REG_IN_TABLE (i) = -1; |
5889 | } |
5890 | } |
5891 | } |
5892 | } |
5893 | } |
5894 | |
5895 | /* We may have just removed some of the src_elt's from the hash table. |
5896 | So replace each one with the current head of the same class. |
5897 | Also check if destination addresses have been removed. */ |
5898 | |
5899 | for (i = 0; i < n_sets; i++) |
5900 | if (sets[i].rtl) |
5901 | { |
5902 | if (sets[i].dest_addr_elt |
5903 | && sets[i].dest_addr_elt->first_same_value == 0) |
5904 | { |
5905 | /* The elt was removed, which means this destination is not |
5906 | valid after this instruction. */ |
5907 | sets[i].rtl = NULL_RTX; |
5908 | } |
5909 | else if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0) |
5910 | /* If elt was removed, find current head of same class, |
5911 | or 0 if nothing remains of that class. */ |
5912 | { |
5913 | struct table_elt *elt = sets[i].src_elt; |
5914 | |
5915 | while (elt && elt->prev_same_value) |
5916 | elt = elt->prev_same_value; |
5917 | |
5918 | while (elt && elt->first_same_value == 0) |
5919 | elt = elt->next_same_value; |
5920 | sets[i].src_elt = elt ? elt->first_same_value : 0; |
5921 | } |
5922 | } |
5923 | |
5924 | /* Now insert the destinations into their equivalence classes. */ |
5925 | |
5926 | for (i = 0; i < n_sets; i++) |
5927 | if (sets[i].rtl) |
5928 | { |
5929 | rtx dest = SET_DEST (sets[i].rtl); |
5930 | struct table_elt *elt; |
5931 | |
5932 | /* Don't record value if we are not supposed to risk allocating |
5933 | floating-point values in registers that might be wider than |
5934 | memory. */ |
5935 | if ((flag_float_store |
5936 | && MEM_P (dest) |
5937 | && FLOAT_MODE_P (GET_MODE (dest))) |
5938 | /* Don't record BLKmode values, because we don't know the |
5939 | size of it, and can't be sure that other BLKmode values |
5940 | have the same or smaller size. */ |
5941 | || GET_MODE (dest) == BLKmode |
5942 | /* If we didn't put a REG_EQUAL value or a source into the hash |
5943 | table, there is no point is recording DEST. */ |
5944 | || sets[i].src_elt == 0) |
5945 | continue; |
5946 | |
5947 | /* STRICT_LOW_PART isn't part of the value BEING set, |
5948 | and neither is the SUBREG inside it. |
5949 | Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */ |
5950 | if (GET_CODE (dest) == STRICT_LOW_PART) |
5951 | dest = SUBREG_REG (XEXP (dest, 0)); |
5952 | |
5953 | if (REG_P (dest) || GET_CODE (dest) == SUBREG) |
5954 | /* Registers must also be inserted into chains for quantities. */ |
5955 | if (insert_regs (x: dest, classp: sets[i].src_elt, modified: true)) |
5956 | { |
5957 | /* If `insert_regs' changes something, the hash code must be |
5958 | recalculated. */ |
5959 | rehash_using_reg (x: dest); |
5960 | sets[i].dest_hash = HASH (x: dest, GET_MODE (dest)); |
5961 | } |
5962 | |
5963 | /* If DEST is a paradoxical SUBREG, don't record DEST since the bits |
5964 | outside the mode of GET_MODE (SUBREG_REG (dest)) are undefined. */ |
5965 | if (paradoxical_subreg_p (x: dest)) |
5966 | continue; |
5967 | |
5968 | elt = insert (x: dest, classp: sets[i].src_elt, |
5969 | hash: sets[i].dest_hash, GET_MODE (dest)); |
5970 | |
5971 | /* If this is a constant, insert the constant anchors with the |
5972 | equivalent register-offset expressions using register DEST. */ |
5973 | if (targetm.const_anchor |
5974 | && REG_P (dest) |
5975 | && SCALAR_INT_MODE_P (GET_MODE (dest)) |
5976 | && GET_CODE (sets[i].src_elt->exp) == CONST_INT) |
5977 | insert_const_anchors (reg: dest, cst: sets[i].src_elt->exp, GET_MODE (dest)); |
5978 | |
5979 | elt->in_memory = (MEM_P (sets[i].inner_dest) |
5980 | && !MEM_READONLY_P (sets[i].inner_dest)); |
5981 | |
5982 | /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no |
5983 | narrower than M2, and both M1 and M2 are the same number of words, |
5984 | we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so |
5985 | make that equivalence as well. |
5986 | |
5987 | However, BAR may have equivalences for which gen_lowpart |
5988 | will produce a simpler value than gen_lowpart applied to |
5989 | BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all |
5990 | BAR's equivalences. If we don't get a simplified form, make |
5991 | the SUBREG. It will not be used in an equivalence, but will |
5992 | cause two similar assignments to be detected. |
5993 | |
5994 | Note the loop below will find SUBREG_REG (DEST) since we have |
5995 | already entered SRC and DEST of the SET in the table. */ |
5996 | |
5997 | if (GET_CODE (dest) == SUBREG |
5998 | && (known_equal_after_align_down |
5999 | (a: GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1, |
6000 | b: GET_MODE_SIZE (GET_MODE (dest)) - 1, |
6001 | UNITS_PER_WORD)) |
6002 | && !partial_subreg_p (x: dest) |
6003 | && sets[i].src_elt != 0) |
6004 | { |
6005 | machine_mode new_mode = GET_MODE (SUBREG_REG (dest)); |
6006 | struct table_elt *elt, *classp = 0; |
6007 | |
6008 | for (elt = sets[i].src_elt->first_same_value; elt; |
6009 | elt = elt->next_same_value) |
6010 | { |
6011 | rtx new_src = 0; |
6012 | unsigned src_hash; |
6013 | struct table_elt *src_elt; |
6014 | |
6015 | /* Ignore invalid entries. */ |
6016 | if (!REG_P (elt->exp) |
6017 | && ! exp_equiv_p (x: elt->exp, y: elt->exp, validate: 1, for_gcse: false)) |
6018 | continue; |
6019 | |
6020 | /* We may have already been playing subreg games. If the |
6021 | mode is already correct for the destination, use it. */ |
6022 | if (GET_MODE (elt->exp) == new_mode) |
6023 | new_src = elt->exp; |
6024 | else |
6025 | { |
6026 | poly_uint64 byte |
6027 | = subreg_lowpart_offset (outermode: new_mode, GET_MODE (dest)); |
6028 | new_src = simplify_gen_subreg (outermode: new_mode, op: elt->exp, |
6029 | GET_MODE (dest), byte); |
6030 | } |
6031 | |
6032 | /* The call to simplify_gen_subreg fails if the value |
6033 | is VOIDmode, yet we can't do any simplification, e.g. |
6034 | for EXPR_LISTs denoting function call results. |
6035 | It is invalid to construct a SUBREG with a VOIDmode |
6036 | SUBREG_REG, hence a zero new_src means we can't do |
6037 | this substitution. */ |
6038 | if (! new_src) |
6039 | continue; |
6040 | |
6041 | src_hash = HASH (x: new_src, mode: new_mode); |
6042 | src_elt = lookup (x: new_src, hash: src_hash, mode: new_mode); |
6043 | |
6044 | /* Put the new source in the hash table is if isn't |
6045 | already. */ |
6046 | if (src_elt == 0) |
6047 | { |
6048 | if (insert_regs (x: new_src, classp, modified: false)) |
6049 | { |
6050 | rehash_using_reg (x: new_src); |
6051 | src_hash = HASH (x: new_src, mode: new_mode); |
6052 | } |
6053 | src_elt = insert (x: new_src, classp, hash: src_hash, mode: new_mode); |
6054 | src_elt->in_memory = elt->in_memory; |
6055 | if (GET_CODE (new_src) == ASM_OPERANDS |
6056 | && elt->cost == MAX_COST) |
6057 | src_elt->cost = MAX_COST; |
6058 | } |
6059 | else if (classp && classp != src_elt->first_same_value) |
6060 | /* Show that two things that we've seen before are |
6061 | actually the same. */ |
6062 | merge_equiv_classes (class1: src_elt, class2: classp); |
6063 | |
6064 | classp = src_elt->first_same_value; |
6065 | /* Ignore invalid entries. */ |
6066 | while (classp |
6067 | && !REG_P (classp->exp) |
6068 | && ! exp_equiv_p (x: classp->exp, y: classp->exp, validate: 1, for_gcse: false)) |
6069 | classp = classp->next_same_value; |
6070 | } |
6071 | } |
6072 | } |
6073 | |
6074 | /* Special handling for (set REG0 REG1) where REG0 is the |
6075 | "cheapest", cheaper than REG1. After cse, REG1 will probably not |
6076 | be used in the sequel, so (if easily done) change this insn to |
6077 | (set REG1 REG0) and replace REG1 with REG0 in the previous insn |
6078 | that computed their value. Then REG1 will become a dead store |
6079 | and won't cloud the situation for later optimizations. |
6080 | |
6081 | Do not make this change if REG1 is a hard register, because it will |
6082 | then be used in the sequel and we may be changing a two-operand insn |
6083 | into a three-operand insn. |
6084 | |
6085 | Also do not do this if we are operating on a copy of INSN. */ |
6086 | |
6087 | if (n_sets == 1 && sets[0].rtl) |
6088 | try_back_substitute_reg (set: sets[0].rtl, insn); |
6089 | |
6090 | done:; |
6091 | } |
6092 | |
6093 | /* Remove from the hash table all expressions that reference memory. */ |
6094 | |
6095 | static void |
6096 | invalidate_memory (void) |
6097 | { |
6098 | int i; |
6099 | struct table_elt *p, *next; |
6100 | |
6101 | for (i = 0; i < HASH_SIZE; i++) |
6102 | for (p = table[i]; p; p = next) |
6103 | { |
6104 | next = p->next_same_hash; |
6105 | if (p->in_memory) |
6106 | remove_from_table (elt: p, hash: i); |
6107 | } |
6108 | } |
6109 | |
6110 | /* Perform invalidation on the basis of everything about INSN, |
6111 | except for invalidating the actual places that are SET in it. |
6112 | This includes the places CLOBBERed, and anything that might |
6113 | alias with something that is SET or CLOBBERed. */ |
6114 | |
6115 | static void |
6116 | invalidate_from_clobbers (rtx_insn *insn) |
6117 | { |
6118 | rtx x = PATTERN (insn); |
6119 | |
6120 | if (GET_CODE (x) == CLOBBER) |
6121 | { |
6122 | rtx ref = XEXP (x, 0); |
6123 | if (ref) |
6124 | { |
6125 | if (REG_P (ref) || GET_CODE (ref) == SUBREG |
6126 | || MEM_P (ref)) |
6127 | invalidate (x: ref, VOIDmode); |
6128 | else if (GET_CODE (ref) == STRICT_LOW_PART |
6129 | || GET_CODE (ref) == ZERO_EXTRACT) |
6130 | invalidate (XEXP (ref, 0), GET_MODE (ref)); |
6131 | } |
6132 | } |
6133 | else if (GET_CODE (x) == PARALLEL) |
6134 | { |
6135 | int i; |
6136 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) |
6137 | { |
6138 | rtx y = XVECEXP (x, 0, i); |
6139 | if (GET_CODE (y) == CLOBBER) |
6140 | { |
6141 | rtx ref = XEXP (y, 0); |
6142 | if (REG_P (ref) || GET_CODE (ref) == SUBREG |
6143 | || MEM_P (ref)) |
6144 | invalidate (x: ref, VOIDmode); |
6145 | else if (GET_CODE (ref) == STRICT_LOW_PART |
6146 | || GET_CODE (ref) == ZERO_EXTRACT) |
6147 | invalidate (XEXP (ref, 0), GET_MODE (ref)); |
6148 | } |
6149 | } |
6150 | } |
6151 | } |
6152 | |
6153 | /* Perform invalidation on the basis of everything about INSN. |
6154 | This includes the places CLOBBERed, and anything that might |
6155 | alias with something that is SET or CLOBBERed. */ |
6156 | |
6157 | static void |
6158 | invalidate_from_sets_and_clobbers (rtx_insn *insn) |
6159 | { |
6160 | rtx tem; |
6161 | rtx x = PATTERN (insn); |
6162 | |
6163 | if (CALL_P (insn)) |
6164 | { |
6165 | for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1)) |
6166 | { |
6167 | rtx temx = XEXP (tem, 0); |
6168 | if (GET_CODE (temx) == CLOBBER) |
6169 | invalidate (SET_DEST (temx), VOIDmode); |
6170 | } |
6171 | } |
6172 | |
6173 | /* Ensure we invalidate the destination register of a CALL insn. |
6174 | This is necessary for machines where this register is a fixed_reg, |
6175 | because no other code would invalidate it. */ |
6176 | if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL) |
6177 | invalidate (SET_DEST (x), VOIDmode); |
6178 | |
6179 | else if (GET_CODE (x) == PARALLEL) |
6180 | { |
6181 | int i; |
6182 | |
6183 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) |
6184 | { |
6185 | rtx y = XVECEXP (x, 0, i); |
6186 | if (GET_CODE (y) == CLOBBER) |
6187 | { |
6188 | rtx clobbered = XEXP (y, 0); |
6189 | |
6190 | if (REG_P (clobbered) |
6191 | || GET_CODE (clobbered) == SUBREG) |
6192 | invalidate (x: clobbered, VOIDmode); |
6193 | else if (GET_CODE (clobbered) == STRICT_LOW_PART |
6194 | || GET_CODE (clobbered) == ZERO_EXTRACT) |
6195 | invalidate (XEXP (clobbered, 0), GET_MODE (clobbered)); |
6196 | } |
6197 | else if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL) |
6198 | invalidate (SET_DEST (y), VOIDmode); |
6199 | } |
6200 | } |
6201 | } |
6202 | |
6203 | static rtx cse_process_note (rtx); |
6204 | |
6205 | /* A simplify_replace_fn_rtx callback for cse_process_note. Process X, |
6206 | part of the REG_NOTES of an insn. Replace any registers with either |
6207 | an equivalent constant or the canonical form of the register. |
6208 | Only replace addresses if the containing MEM remains valid. |
6209 | |
6210 | Return the replacement for X, or null if it should be simplified |
6211 | recursively. */ |
6212 | |
6213 | static rtx |
6214 | cse_process_note_1 (rtx x, const_rtx, void *) |
6215 | { |
6216 | if (MEM_P (x)) |
6217 | { |
6218 | validate_change (x, &XEXP (x, 0), cse_process_note (XEXP (x, 0)), false); |
6219 | return x; |
6220 | } |
6221 | |
6222 | if (REG_P (x)) |
6223 | { |
6224 | int i = REG_QTY (REGNO (x)); |
6225 | |
6226 | /* Return a constant or a constant register. */ |
6227 | if (REGNO_QTY_VALID_P (REGNO (x))) |
6228 | { |
6229 | struct qty_table_elem *ent = &qty_table[i]; |
6230 | |
6231 | if (ent->const_rtx != NULL_RTX |
6232 | && (CONSTANT_P (ent->const_rtx) |
6233 | || REG_P (ent->const_rtx))) |
6234 | { |
6235 | rtx new_rtx = gen_lowpart (GET_MODE (x), ent->const_rtx); |
6236 | if (new_rtx) |
6237 | return copy_rtx (new_rtx); |
6238 | } |
6239 | } |
6240 | |
6241 | /* Otherwise, canonicalize this register. */ |
6242 | return canon_reg (x, NULL); |
6243 | } |
6244 | |
6245 | return NULL_RTX; |
6246 | } |
6247 | |
6248 | /* Process X, part of the REG_NOTES of an insn. Replace any registers in it |
6249 | with either an equivalent constant or the canonical form of the register. |
6250 | Only replace addresses if the containing MEM remains valid. */ |
6251 | |
6252 | static rtx |
6253 | cse_process_note (rtx x) |
6254 | { |
6255 | return simplify_replace_fn_rtx (x, NULL_RTX, fn: cse_process_note_1, NULL); |
6256 | } |
6257 | |
6258 | |
6259 | /* Find a path in the CFG, starting with FIRST_BB to perform CSE on. |
6260 | |
6261 | DATA is a pointer to a struct cse_basic_block_data, that is used to |
6262 | describe the path. |
6263 | It is filled with a queue of basic blocks, starting with FIRST_BB |
6264 | and following a trace through the CFG. |
6265 | |
6266 | If all paths starting at FIRST_BB have been followed, or no new path |
6267 | starting at FIRST_BB can be constructed, this function returns FALSE. |
6268 | Otherwise, DATA->path is filled and the function returns TRUE indicating |
6269 | that a path to follow was found. |
6270 | |
6271 | If FOLLOW_JUMPS is false, the maximum path length is 1 and the only |
6272 | block in the path will be FIRST_BB. */ |
6273 | |
6274 | static bool |
6275 | cse_find_path (basic_block first_bb, struct cse_basic_block_data *data, |
6276 | int follow_jumps) |
6277 | { |
6278 | basic_block bb; |
6279 | edge e; |
6280 | int path_size; |
6281 | |
6282 | bitmap_set_bit (map: cse_visited_basic_blocks, bitno: first_bb->index); |
6283 | |
6284 | /* See if there is a previous path. */ |
6285 | path_size = data->path_size; |
6286 | |
6287 | /* There is a previous path. Make sure it started with FIRST_BB. */ |
6288 | if (path_size) |
6289 | gcc_assert (data->path[0].bb == first_bb); |
6290 | |
6291 | /* There was only one basic block in the last path. Clear the path and |
6292 | return, so that paths starting at another basic block can be tried. */ |
6293 | if (path_size == 1) |
6294 | { |
6295 | path_size = 0; |
6296 | goto done; |
6297 | } |
6298 | |
6299 | /* If the path was empty from the beginning, construct a new path. */ |
6300 | if (path_size == 0) |
6301 | data->path[path_size++].bb = first_bb; |
6302 | else |
6303 | { |
6304 | /* Otherwise, path_size must be equal to or greater than 2, because |
6305 | a previous path exists that is at least two basic blocks long. |
6306 | |
6307 | Update the previous branch path, if any. If the last branch was |
6308 | previously along the branch edge, take the fallthrough edge now. */ |
6309 | while (path_size >= 2) |
6310 | { |
6311 | basic_block last_bb_in_path, previous_bb_in_path; |
6312 | edge e; |
6313 | |
6314 | --path_size; |
6315 | last_bb_in_path = data->path[path_size].bb; |
6316 | previous_bb_in_path = data->path[path_size - 1].bb; |
6317 | |
6318 | /* If we previously followed a path along the branch edge, try |
6319 | the fallthru edge now. */ |
6320 | if (EDGE_COUNT (previous_bb_in_path->succs) == 2 |
6321 | && any_condjump_p (BB_END (previous_bb_in_path)) |
6322 | && (e = find_edge (previous_bb_in_path, last_bb_in_path)) |
6323 | && e == BRANCH_EDGE (previous_bb_in_path)) |
6324 | { |
6325 | bb = FALLTHRU_EDGE (previous_bb_in_path)->dest; |
6326 | if (bb != EXIT_BLOCK_PTR_FOR_FN (cfun) |
6327 | && single_pred_p (bb) |
6328 | /* We used to assert here that we would only see blocks |
6329 | that we have not visited yet. But we may end up |
6330 | visiting basic blocks twice if the CFG has changed |
6331 | in this run of cse_main, because when the CFG changes |
6332 | the topological sort of the CFG also changes. A basic |
6333 | blocks that previously had more than two predecessors |
6334 | may now have a single predecessor, and become part of |
6335 | a path that starts at another basic block. |
6336 | |
6337 | We still want to visit each basic block only once, so |
6338 | halt the path here if we have already visited BB. */ |
6339 | && !bitmap_bit_p (map: cse_visited_basic_blocks, bitno: bb->index)) |
6340 | { |
6341 | bitmap_set_bit (map: cse_visited_basic_blocks, bitno: bb->index); |
6342 | data->path[path_size++].bb = bb; |
6343 | break; |
6344 | } |
6345 | } |
6346 | |
6347 | data->path[path_size].bb = NULL; |
6348 | } |
6349 | |
6350 | /* If only one block remains in the path, bail. */ |
6351 | if (path_size == 1) |
6352 | { |
6353 | path_size = 0; |
6354 | goto done; |
6355 | } |
6356 | } |
6357 | |
6358 | /* Extend the path if possible. */ |
6359 | if (follow_jumps) |
6360 | { |
6361 | bb = data->path[path_size - 1].bb; |
6362 | while (bb && path_size < param_max_cse_path_length) |
6363 | { |
6364 | if (single_succ_p (bb)) |
6365 | e = single_succ_edge (bb); |
6366 | else if (EDGE_COUNT (bb->succs) == 2 |
6367 | && any_condjump_p (BB_END (bb))) |
6368 | { |
6369 | /* First try to follow the branch. If that doesn't lead |
6370 | to a useful path, follow the fallthru edge. */ |
6371 | e = BRANCH_EDGE (bb); |
6372 | if (!single_pred_p (bb: e->dest)) |
6373 | e = FALLTHRU_EDGE (bb); |
6374 | } |
6375 | else |
6376 | e = NULL; |
6377 | |
6378 | if (e |
6379 | && !((e->flags & EDGE_ABNORMAL_CALL) && cfun->has_nonlocal_label) |
6380 | && e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun) |
6381 | && single_pred_p (bb: e->dest) |
6382 | /* Avoid visiting basic blocks twice. The large comment |
6383 | above explains why this can happen. */ |
6384 | && !bitmap_bit_p (map: cse_visited_basic_blocks, bitno: e->dest->index)) |
6385 | { |
6386 | basic_block bb2 = e->dest; |
6387 | bitmap_set_bit (map: cse_visited_basic_blocks, bitno: bb2->index); |
6388 | data->path[path_size++].bb = bb2; |
6389 | bb = bb2; |
6390 | } |
6391 | else |
6392 | bb = NULL; |
6393 | } |
6394 | } |
6395 | |
6396 | done: |
6397 | data->path_size = path_size; |
6398 | return path_size != 0; |
6399 | } |
6400 | |
6401 | /* Dump the path in DATA to file F. NSETS is the number of sets |
6402 | in the path. */ |
6403 | |
6404 | static void |
6405 | cse_dump_path (struct cse_basic_block_data *data, int nsets, FILE *f) |
6406 | { |
6407 | int path_entry; |
6408 | |
6409 | fprintf (stream: f, format: ";; Following path with %d sets: " , nsets); |
6410 | for (path_entry = 0; path_entry < data->path_size; path_entry++) |
6411 | fprintf (stream: f, format: "%d " , (data->path[path_entry].bb)->index); |
6412 | fputc (c: '\n', stream: f); |
6413 | fflush (stream: f); |
6414 | } |
6415 | |
6416 | |
6417 | /* Return true if BB has exception handling successor edges. */ |
6418 | |
6419 | static bool |
6420 | have_eh_succ_edges (basic_block bb) |
6421 | { |
6422 | edge e; |
6423 | edge_iterator ei; |
6424 | |
6425 | FOR_EACH_EDGE (e, ei, bb->succs) |
6426 | if (e->flags & EDGE_EH) |
6427 | return true; |
6428 | |
6429 | return false; |
6430 | } |
6431 | |
6432 | |
6433 | /* Scan to the end of the path described by DATA. Return an estimate of |
6434 | the total number of SETs of all insns in the path. */ |
6435 | |
6436 | static void |
6437 | cse_prescan_path (struct cse_basic_block_data *data) |
6438 | { |
6439 | int nsets = 0; |
6440 | int path_size = data->path_size; |
6441 | int path_entry; |
6442 | |
6443 | /* Scan to end of each basic block in the path. */ |
6444 | for (path_entry = 0; path_entry < path_size; path_entry++) |
6445 | { |
6446 | basic_block bb; |
6447 | rtx_insn *insn; |
6448 | |
6449 | bb = data->path[path_entry].bb; |
6450 | |
6451 | FOR_BB_INSNS (bb, insn) |
6452 | { |
6453 | if (!INSN_P (insn)) |
6454 | continue; |
6455 | |
6456 | /* A PARALLEL can have lots of SETs in it, |
6457 | especially if it is really an ASM_OPERANDS. */ |
6458 | if (GET_CODE (PATTERN (insn)) == PARALLEL) |
6459 | nsets += XVECLEN (PATTERN (insn), 0); |
6460 | else |
6461 | nsets += 1; |
6462 | } |
6463 | } |
6464 | |
6465 | data->nsets = nsets; |
6466 | } |
6467 | |
6468 | /* Return true if the pattern of INSN uses a LABEL_REF for which |
6469 | there isn't a REG_LABEL_OPERAND note. */ |
6470 | |
6471 | static bool |
6472 | check_for_label_ref (rtx_insn *insn) |
6473 | { |
6474 | /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND |
6475 | note for it, we must rerun jump since it needs to place the note. If |
6476 | this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain, |
6477 | don't do this since no REG_LABEL_OPERAND will be added. */ |
6478 | subrtx_iterator::array_type array; |
6479 | FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL) |
6480 | { |
6481 | const_rtx x = *iter; |
6482 | if (GET_CODE (x) == LABEL_REF |
6483 | && !LABEL_REF_NONLOCAL_P (x) |
6484 | && (!JUMP_P (insn) |
6485 | || !label_is_jump_target_p (label_ref_label (ref: x), insn)) |
6486 | && LABEL_P (label_ref_label (x)) |
6487 | && INSN_UID (insn: label_ref_label (ref: x)) != 0 |
6488 | && !find_reg_note (insn, REG_LABEL_OPERAND, label_ref_label (ref: x))) |
6489 | return true; |
6490 | } |
6491 | return false; |
6492 | } |
6493 | |
6494 | /* Process a single extended basic block described by EBB_DATA. */ |
6495 | |
6496 | static void |
6497 | cse_extended_basic_block (struct cse_basic_block_data *ebb_data) |
6498 | { |
6499 | int path_size = ebb_data->path_size; |
6500 | int path_entry; |
6501 | int num_insns = 0; |
6502 | |
6503 | /* Allocate the space needed by qty_table. */ |
6504 | qty_table = XNEWVEC (struct qty_table_elem, max_qty); |
6505 | |
6506 | new_basic_block (); |
6507 | cse_ebb_live_in = df_get_live_in (bb: ebb_data->path[0].bb); |
6508 | cse_ebb_live_out = df_get_live_out (bb: ebb_data->path[path_size - 1].bb); |
6509 | for (path_entry = 0; path_entry < path_size; path_entry++) |
6510 | { |
6511 | basic_block bb; |
6512 | rtx_insn *insn; |
6513 | |
6514 | bb = ebb_data->path[path_entry].bb; |
6515 | |
6516 | /* Invalidate recorded information for eh regs if there is an EH |
6517 | edge pointing to that bb. */ |
6518 | if (bb_has_eh_pred (bb)) |
6519 | { |
6520 | df_ref def; |
6521 | |
6522 | FOR_EACH_ARTIFICIAL_DEF (def, bb->index) |
6523 | if (DF_REF_FLAGS (def) & DF_REF_AT_TOP) |
6524 | invalidate (DF_REF_REG (def), GET_MODE (DF_REF_REG (def))); |
6525 | } |
6526 | |
6527 | optimize_this_for_speed_p = optimize_bb_for_speed_p (bb); |
6528 | FOR_BB_INSNS (bb, insn) |
6529 | { |
6530 | /* If we have processed 1,000 insns, flush the hash table to |
6531 | avoid extreme quadratic behavior. We must not include NOTEs |
6532 | in the count since there may be more of them when generating |
6533 | debugging information. If we clear the table at different |
6534 | times, code generated with -g -O might be different than code |
6535 | generated with -O but not -g. |
6536 | |
6537 | FIXME: This is a real kludge and needs to be done some other |
6538 | way. */ |
6539 | if (NONDEBUG_INSN_P (insn) |
6540 | && num_insns++ > param_max_cse_insns) |
6541 | { |
6542 | flush_hash_table (); |
6543 | num_insns = 0; |
6544 | } |
6545 | |
6546 | if (INSN_P (insn)) |
6547 | { |
6548 | /* Process notes first so we have all notes in canonical forms |
6549 | when looking for duplicate operations. */ |
6550 | bool changed = false; |
6551 | for (rtx note = REG_NOTES (insn); note; note = XEXP (note, 1)) |
6552 | if (REG_NOTE_KIND (note) == REG_EQUAL) |
6553 | { |
6554 | rtx newval = cse_process_note (XEXP (note, 0)); |
6555 | if (newval != XEXP (note, 0)) |
6556 | { |
6557 | XEXP (note, 0) = newval; |
6558 | changed = true; |
6559 | } |
6560 | } |
6561 | if (changed) |
6562 | df_notes_rescan (insn); |
6563 | |
6564 | cse_insn (insn); |
6565 | |
6566 | /* If we haven't already found an insn where we added a LABEL_REF, |
6567 | check this one. */ |
6568 | if (INSN_P (insn) && !recorded_label_ref |
6569 | && check_for_label_ref (insn)) |
6570 | recorded_label_ref = true; |
6571 | } |
6572 | } |
6573 | |
6574 | /* With non-call exceptions, we are not always able to update |
6575 | the CFG properly inside cse_insn. So clean up possibly |
6576 | redundant EH edges here. */ |
6577 | if (cfun->can_throw_non_call_exceptions && have_eh_succ_edges (bb)) |
6578 | cse_cfg_altered |= purge_dead_edges (bb); |
6579 | |
6580 | /* If we changed a conditional jump, we may have terminated |
6581 | the path we are following. Check that by verifying that |
6582 | the edge we would take still exists. If the edge does |
6583 | not exist anymore, purge the remainder of the path. |
6584 | Note that this will cause us to return to the caller. */ |
6585 | if (path_entry < path_size - 1) |
6586 | { |
6587 | basic_block next_bb = ebb_data->path[path_entry + 1].bb; |
6588 | if (!find_edge (bb, next_bb)) |
6589 | { |
6590 | do |
6591 | { |
6592 | path_size--; |
6593 | |
6594 | /* If we truncate the path, we must also reset the |
6595 | visited bit on the remaining blocks in the path, |
6596 | or we will never visit them at all. */ |
6597 | bitmap_clear_bit (map: cse_visited_basic_blocks, |
6598 | bitno: ebb_data->path[path_size].bb->index); |
6599 | ebb_data->path[path_size].bb = NULL; |
6600 | } |
6601 | while (path_size - 1 != path_entry); |
6602 | ebb_data->path_size = path_size; |
6603 | } |
6604 | } |
6605 | |
6606 | /* If this is a conditional jump insn, record any known |
6607 | equivalences due to the condition being tested. */ |
6608 | insn = BB_END (bb); |
6609 | if (path_entry < path_size - 1 |
6610 | && EDGE_COUNT (bb->succs) == 2 |
6611 | && JUMP_P (insn) |
6612 | && single_set (insn) |
6613 | && any_condjump_p (insn)) |
6614 | { |
6615 | basic_block next_bb = ebb_data->path[path_entry + 1].bb; |
6616 | bool taken = (next_bb == BRANCH_EDGE (bb)->dest); |
6617 | record_jump_equiv (insn, taken); |
6618 | } |
6619 | } |
6620 | |
6621 | gcc_assert (next_qty <= max_qty); |
6622 | |
6623 | free (ptr: qty_table); |
6624 | } |
6625 | |
6626 | |
6627 | /* Perform cse on the instructions of a function. |
6628 | F is the first instruction. |
6629 | NREGS is one plus the highest pseudo-reg number used in the instruction. |
6630 | |
6631 | Return 2 if jump optimizations should be redone due to simplifications |
6632 | in conditional jump instructions. |
6633 | Return 1 if the CFG should be cleaned up because it has been modified. |
6634 | Return 0 otherwise. */ |
6635 | |
6636 | static int |
6637 | cse_main (rtx_insn *f ATTRIBUTE_UNUSED, int nregs) |
6638 | { |
6639 | struct cse_basic_block_data ebb_data; |
6640 | basic_block bb; |
6641 | int *rc_order = XNEWVEC (int, last_basic_block_for_fn (cfun)); |
6642 | int i, n_blocks; |
6643 | |
6644 | /* CSE doesn't use dominane info but can invalidate it in different ways. |
6645 | For simplicity free dominance info here. */ |
6646 | free_dominance_info (CDI_DOMINATORS); |
6647 | |
6648 | df_set_flags (DF_LR_RUN_DCE); |
6649 | df_note_add_problem (); |
6650 | df_analyze (); |
6651 | df_set_flags (DF_DEFER_INSN_RESCAN); |
6652 | |
6653 | reg_scan (get_insns (), max_reg_num ()); |
6654 | init_cse_reg_info (nregs); |
6655 | |
6656 | ebb_data.path = XNEWVEC (struct branch_path, |
6657 | param_max_cse_path_length); |
6658 | |
6659 | cse_cfg_altered = false; |
6660 | cse_jumps_altered = false; |
6661 | recorded_label_ref = false; |
6662 | ebb_data.path_size = 0; |
6663 | ebb_data.nsets = 0; |
6664 | rtl_hooks = cse_rtl_hooks; |
6665 | |
6666 | init_recog (); |
6667 | init_alias_analysis (); |
6668 | |
6669 | reg_eqv_table = XNEWVEC (struct reg_eqv_elem, nregs); |
6670 | |
6671 | /* Set up the table of already visited basic blocks. */ |
6672 | cse_visited_basic_blocks = sbitmap_alloc (last_basic_block_for_fn (cfun)); |
6673 | bitmap_clear (cse_visited_basic_blocks); |
6674 | |
6675 | /* Loop over basic blocks in reverse completion order (RPO), |
6676 | excluding the ENTRY and EXIT blocks. */ |
6677 | n_blocks = pre_and_rev_post_order_compute (NULL, rc_order, false); |
6678 | i = 0; |
6679 | while (i < n_blocks) |
6680 | { |
6681 | /* Find the first block in the RPO queue that we have not yet |
6682 | processed before. */ |
6683 | do |
6684 | { |
6685 | bb = BASIC_BLOCK_FOR_FN (cfun, rc_order[i++]); |
6686 | } |
6687 | while (bitmap_bit_p (map: cse_visited_basic_blocks, bitno: bb->index) |
6688 | && i < n_blocks); |
6689 | |
6690 | /* Find all paths starting with BB, and process them. */ |
6691 | while (cse_find_path (first_bb: bb, data: &ebb_data, flag_cse_follow_jumps)) |
6692 | { |
6693 | /* Pre-scan the path. */ |
6694 | cse_prescan_path (data: &ebb_data); |
6695 | |
6696 | /* If this basic block has no sets, skip it. */ |
6697 | if (ebb_data.nsets == 0) |
6698 | continue; |
6699 | |
6700 | /* Get a reasonable estimate for the maximum number of qty's |
6701 | needed for this path. For this, we take the number of sets |
6702 | and multiply that by MAX_RECOG_OPERANDS. */ |
6703 | max_qty = ebb_data.nsets * MAX_RECOG_OPERANDS; |
6704 | |
6705 | /* Dump the path we're about to process. */ |
6706 | if (dump_file) |
6707 | cse_dump_path (data: &ebb_data, nsets: ebb_data.nsets, f: dump_file); |
6708 | |
6709 | cse_extended_basic_block (ebb_data: &ebb_data); |
6710 | } |
6711 | } |
6712 | |
6713 | /* Clean up. */ |
6714 | end_alias_analysis (); |
6715 | free (ptr: reg_eqv_table); |
6716 | free (ptr: ebb_data.path); |
6717 | sbitmap_free (map: cse_visited_basic_blocks); |
6718 | free (ptr: rc_order); |
6719 | rtl_hooks = general_rtl_hooks; |
6720 | |
6721 | if (cse_jumps_altered || recorded_label_ref) |
6722 | return 2; |
6723 | else if (cse_cfg_altered) |
6724 | return 1; |
6725 | else |
6726 | return 0; |
6727 | } |
6728 | |
6729 | /* Count the number of times registers are used (not set) in X. |
6730 | COUNTS is an array in which we accumulate the count, INCR is how much |
6731 | we count each register usage. |
6732 | |
6733 | Don't count a usage of DEST, which is the SET_DEST of a SET which |
6734 | contains X in its SET_SRC. This is because such a SET does not |
6735 | modify the liveness of DEST. |
6736 | DEST is set to pc_rtx for a trapping insn, or for an insn with side effects. |
6737 | We must then count uses of a SET_DEST regardless, because the insn can't be |
6738 | deleted here. */ |
6739 | |
6740 | static void |
6741 | count_reg_usage (rtx x, int *counts, rtx dest, int incr) |
6742 | { |
6743 | enum rtx_code code; |
6744 | rtx note; |
6745 | const char *fmt; |
6746 | int i, j; |
6747 | |
6748 | if (x == 0) |
6749 | return; |
6750 | |
6751 | switch (code = GET_CODE (x)) |
6752 | { |
6753 | case REG: |
6754 | if (x != dest) |
6755 | counts[REGNO (x)] += incr; |
6756 | return; |
6757 | |
6758 | case PC: |
6759 | case CONST: |
6760 | CASE_CONST_ANY: |
6761 | case SYMBOL_REF: |
6762 | case LABEL_REF: |
6763 | return; |
6764 | |
6765 | case CLOBBER: |
6766 | /* If we are clobbering a MEM, mark any registers inside the address |
6767 | as being used. */ |
6768 | if (MEM_P (XEXP (x, 0))) |
6769 | count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr); |
6770 | return; |
6771 | |
6772 | case SET: |
6773 | /* Unless we are setting a REG, count everything in SET_DEST. */ |
6774 | if (!REG_P (SET_DEST (x))) |
6775 | count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr); |
6776 | count_reg_usage (SET_SRC (x), counts, |
6777 | dest: dest ? dest : SET_DEST (x), |
6778 | incr); |
6779 | return; |
6780 | |
6781 | case DEBUG_INSN: |
6782 | return; |
6783 | |
6784 | case CALL_INSN: |
6785 | case INSN: |
6786 | case JUMP_INSN: |
6787 | /* We expect dest to be NULL_RTX here. If the insn may throw, |
6788 | or if it cannot be deleted due to side-effects, mark this fact |
6789 | by setting DEST to pc_rtx. */ |
6790 | if ((!cfun->can_delete_dead_exceptions && !insn_nothrow_p (x)) |
6791 | || side_effects_p (PATTERN (insn: x))) |
6792 | dest = pc_rtx; |
6793 | if (code == CALL_INSN) |
6794 | count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, dest, incr); |
6795 | count_reg_usage (x: PATTERN (insn: x), counts, dest, incr); |
6796 | |
6797 | /* Things used in a REG_EQUAL note aren't dead since loop may try to |
6798 | use them. */ |
6799 | |
6800 | note = find_reg_equal_equiv_note (x); |
6801 | if (note) |
6802 | { |
6803 | rtx eqv = XEXP (note, 0); |
6804 | |
6805 | if (GET_CODE (eqv) == EXPR_LIST) |
6806 | /* This REG_EQUAL note describes the result of a function call. |
6807 | Process all the arguments. */ |
6808 | do |
6809 | { |
6810 | count_reg_usage (XEXP (eqv, 0), counts, dest, incr); |
6811 | eqv = XEXP (eqv, 1); |
6812 | } |
6813 | while (eqv && GET_CODE (eqv) == EXPR_LIST); |
6814 | else |
6815 | count_reg_usage (x: eqv, counts, dest, incr); |
6816 | } |
6817 | return; |
6818 | |
6819 | case EXPR_LIST: |
6820 | if (REG_NOTE_KIND (x) == REG_EQUAL |
6821 | || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE) |
6822 | /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)), |
6823 | involving registers in the address. */ |
6824 | || GET_CODE (XEXP (x, 0)) == CLOBBER) |
6825 | count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr); |
6826 | |
6827 | count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr); |
6828 | return; |
6829 | |
6830 | case ASM_OPERANDS: |
6831 | /* Iterate over just the inputs, not the constraints as well. */ |
6832 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) |
6833 | count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, dest, incr); |
6834 | return; |
6835 | |
6836 | case INSN_LIST: |
6837 | case INT_LIST: |
6838 | gcc_unreachable (); |
6839 | |
6840 | default: |
6841 | break; |
6842 | } |
6843 | |
6844 | fmt = GET_RTX_FORMAT (code); |
6845 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
6846 | { |
6847 | if (fmt[i] == 'e') |
6848 | count_reg_usage (XEXP (x, i), counts, dest, incr); |
6849 | else if (fmt[i] == 'E') |
6850 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) |
6851 | count_reg_usage (XVECEXP (x, i, j), counts, dest, incr); |
6852 | } |
6853 | } |
6854 | |
6855 | /* Return true if X is a dead register. */ |
6856 | |
6857 | static inline bool |
6858 | is_dead_reg (const_rtx x, int *counts) |
6859 | { |
6860 | return (REG_P (x) |
6861 | && REGNO (x) >= FIRST_PSEUDO_REGISTER |
6862 | && counts[REGNO (x)] == 0); |
6863 | } |
6864 | |
6865 | /* Return true if set is live. */ |
6866 | static bool |
6867 | set_live_p (rtx set, int *counts) |
6868 | { |
6869 | if (set_noop_p (set)) |
6870 | return false; |
6871 | |
6872 | if (!is_dead_reg (SET_DEST (set), counts) |
6873 | || side_effects_p (SET_SRC (set))) |
6874 | return true; |
6875 | |
6876 | return false; |
6877 | } |
6878 | |
6879 | /* Return true if insn is live. */ |
6880 | |
6881 | static bool |
6882 | insn_live_p (rtx_insn *insn, int *counts) |
6883 | { |
6884 | int i; |
6885 | if (!cfun->can_delete_dead_exceptions && !insn_nothrow_p (insn)) |
6886 | return true; |
6887 | else if (GET_CODE (PATTERN (insn)) == SET) |
6888 | return set_live_p (set: PATTERN (insn), counts); |
6889 | else if (GET_CODE (PATTERN (insn)) == PARALLEL) |
6890 | { |
6891 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) |
6892 | { |
6893 | rtx elt = XVECEXP (PATTERN (insn), 0, i); |
6894 | |
6895 | if (GET_CODE (elt) == SET) |
6896 | { |
6897 | if (set_live_p (set: elt, counts)) |
6898 | return true; |
6899 | } |
6900 | else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE) |
6901 | return true; |
6902 | } |
6903 | return false; |
6904 | } |
6905 | else if (DEBUG_INSN_P (insn)) |
6906 | { |
6907 | if (DEBUG_MARKER_INSN_P (insn)) |
6908 | return true; |
6909 | |
6910 | if (DEBUG_BIND_INSN_P (insn) |
6911 | && TREE_VISITED (INSN_VAR_LOCATION_DECL (insn))) |
6912 | return false; |
6913 | |
6914 | return true; |
6915 | } |
6916 | else |
6917 | return true; |
6918 | } |
6919 | |
6920 | /* Count the number of stores into pseudo. Callback for note_stores. */ |
6921 | |
6922 | static void |
6923 | count_stores (rtx x, const_rtx set ATTRIBUTE_UNUSED, void *data) |
6924 | { |
6925 | int *counts = (int *) data; |
6926 | if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER) |
6927 | counts[REGNO (x)]++; |
6928 | } |
6929 | |
6930 | /* Return if DEBUG_INSN pattern PAT needs to be reset because some dead |
6931 | pseudo doesn't have a replacement. COUNTS[X] is zero if register X |
6932 | is dead and REPLACEMENTS[X] is null if it has no replacemenet. |
6933 | Set *SEEN_REPL to true if we see a dead register that does have |
6934 | a replacement. */ |
6935 | |
6936 | static bool |
6937 | is_dead_debug_insn (const_rtx pat, int *counts, rtx *replacements, |
6938 | bool *seen_repl) |
6939 | { |
6940 | subrtx_iterator::array_type array; |
6941 | FOR_EACH_SUBRTX (iter, array, pat, NONCONST) |
6942 | { |
6943 | const_rtx x = *iter; |
6944 | if (is_dead_reg (x, counts)) |
6945 | { |
6946 | if (replacements && replacements[REGNO (x)] != NULL_RTX) |
6947 | *seen_repl = true; |
6948 | else |
6949 | return true; |
6950 | } |
6951 | } |
6952 | return false; |
6953 | } |
6954 | |
6955 | /* Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR. |
6956 | Callback for simplify_replace_fn_rtx. */ |
6957 | |
6958 | static rtx |
6959 | replace_dead_reg (rtx x, const_rtx old_rtx ATTRIBUTE_UNUSED, void *data) |
6960 | { |
6961 | rtx *replacements = (rtx *) data; |
6962 | |
6963 | if (REG_P (x) |
6964 | && REGNO (x) >= FIRST_PSEUDO_REGISTER |
6965 | && replacements[REGNO (x)] != NULL_RTX) |
6966 | { |
6967 | if (GET_MODE (x) == GET_MODE (replacements[REGNO (x)])) |
6968 | return replacements[REGNO (x)]; |
6969 | return lowpart_subreg (GET_MODE (x), op: replacements[REGNO (x)], |
6970 | GET_MODE (replacements[REGNO (x)])); |
6971 | } |
6972 | return NULL_RTX; |
6973 | } |
6974 | |
6975 | /* Scan all the insns and delete any that are dead; i.e., they store a register |
6976 | that is never used or they copy a register to itself. |
6977 | |
6978 | This is used to remove insns made obviously dead by cse, loop or other |
6979 | optimizations. It improves the heuristics in loop since it won't try to |
6980 | move dead invariants out of loops or make givs for dead quantities. The |
6981 | remaining passes of the compilation are also sped up. */ |
6982 | |
6983 | int |
6984 | delete_trivially_dead_insns (rtx_insn *insns, int nreg) |
6985 | { |
6986 | int *counts; |
6987 | rtx_insn *insn, *prev; |
6988 | rtx *replacements = NULL; |
6989 | int ndead = 0; |
6990 | |
6991 | timevar_push (tv: TV_DELETE_TRIVIALLY_DEAD); |
6992 | /* First count the number of times each register is used. */ |
6993 | if (MAY_HAVE_DEBUG_BIND_INSNS) |
6994 | { |
6995 | counts = XCNEWVEC (int, nreg * 3); |
6996 | for (insn = insns; insn; insn = NEXT_INSN (insn)) |
6997 | if (DEBUG_BIND_INSN_P (insn)) |
6998 | { |
6999 | count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts: counts + nreg, |
7000 | NULL_RTX, incr: 1); |
7001 | TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)) = 0; |
7002 | } |
7003 | else if (INSN_P (insn)) |
7004 | { |
7005 | count_reg_usage (x: insn, counts, NULL_RTX, incr: 1); |
7006 | note_stores (insn, count_stores, counts + nreg * 2); |
7007 | } |
7008 | /* If there can be debug insns, COUNTS are 3 consecutive arrays. |
7009 | First one counts how many times each pseudo is used outside |
7010 | of debug insns, second counts how many times each pseudo is |
7011 | used in debug insns and third counts how many times a pseudo |
7012 | is stored. */ |
7013 | } |
7014 | else |
7015 | { |
7016 | counts = XCNEWVEC (int, nreg); |
7017 | for (insn = insns; insn; insn = NEXT_INSN (insn)) |
7018 | if (INSN_P (insn)) |
7019 | count_reg_usage (x: insn, counts, NULL_RTX, incr: 1); |
7020 | /* If no debug insns can be present, COUNTS is just an array |
7021 | which counts how many times each pseudo is used. */ |
7022 | } |
7023 | /* Pseudo PIC register should be considered as used due to possible |
7024 | new usages generated. */ |
7025 | if (!reload_completed |
7026 | && pic_offset_table_rtx |
7027 | && REGNO (pic_offset_table_rtx) >= FIRST_PSEUDO_REGISTER) |
7028 | counts[REGNO (pic_offset_table_rtx)]++; |
7029 | /* Go from the last insn to the first and delete insns that only set unused |
7030 | registers or copy a register to itself. As we delete an insn, remove |
7031 | usage counts for registers it uses. |
7032 | |
7033 | The first jump optimization pass may leave a real insn as the last |
7034 | insn in the function. We must not skip that insn or we may end |
7035 | up deleting code that is not really dead. |
7036 | |
7037 | If some otherwise unused register is only used in DEBUG_INSNs, |
7038 | try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before |
7039 | the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR |
7040 | has been created for the unused register, replace it with |
7041 | the DEBUG_EXPR, otherwise reset the DEBUG_INSN. */ |
7042 | auto_vec<tree, 32> later_debug_set_vars; |
7043 | for (insn = get_last_insn (); insn; insn = prev) |
7044 | { |
7045 | int live_insn = 0; |
7046 | |
7047 | prev = PREV_INSN (insn); |
7048 | if (!INSN_P (insn)) |
7049 | continue; |
7050 | |
7051 | live_insn = insn_live_p (insn, counts); |
7052 | |
7053 | /* If this is a dead insn, delete it and show registers in it aren't |
7054 | being used. */ |
7055 | |
7056 | if (! live_insn && dbg_cnt (index: delete_trivial_dead)) |
7057 | { |
7058 | if (DEBUG_INSN_P (insn)) |
7059 | { |
7060 | if (DEBUG_BIND_INSN_P (insn)) |
7061 | count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts: counts + nreg, |
7062 | NULL_RTX, incr: -1); |
7063 | } |
7064 | else |
7065 | { |
7066 | rtx set; |
7067 | if (MAY_HAVE_DEBUG_BIND_INSNS |
7068 | && (set = single_set (insn)) != NULL_RTX |
7069 | && is_dead_reg (SET_DEST (set), counts) |
7070 | /* Used at least once in some DEBUG_INSN. */ |
7071 | && counts[REGNO (SET_DEST (set)) + nreg] > 0 |
7072 | /* And set exactly once. */ |
7073 | && counts[REGNO (SET_DEST (set)) + nreg * 2] == 1 |
7074 | && !side_effects_p (SET_SRC (set)) |
7075 | && asm_noperands (PATTERN (insn)) < 0) |
7076 | { |
7077 | rtx dval, bind_var_loc; |
7078 | rtx_insn *bind; |
7079 | |
7080 | /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL). */ |
7081 | dval = make_debug_expr_from_rtl (SET_DEST (set)); |
7082 | |
7083 | /* Emit a debug bind insn before the insn in which |
7084 | reg dies. */ |
7085 | bind_var_loc = |
7086 | gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set)), |
7087 | DEBUG_EXPR_TREE_DECL (dval), |
7088 | SET_SRC (set), |
7089 | VAR_INIT_STATUS_INITIALIZED); |
7090 | count_reg_usage (x: bind_var_loc, counts: counts + nreg, NULL_RTX, incr: 1); |
7091 | |
7092 | bind = emit_debug_insn_before (bind_var_loc, insn); |
7093 | df_insn_rescan (bind); |
7094 | |
7095 | if (replacements == NULL) |
7096 | replacements = XCNEWVEC (rtx, nreg); |
7097 | replacements[REGNO (SET_DEST (set))] = dval; |
7098 | } |
7099 | |
7100 | count_reg_usage (x: insn, counts, NULL_RTX, incr: -1); |
7101 | ndead++; |
7102 | } |
7103 | cse_cfg_altered |= delete_insn_and_edges (insn); |
7104 | } |
7105 | else |
7106 | { |
7107 | if (!DEBUG_INSN_P (insn) || DEBUG_MARKER_INSN_P (insn)) |
7108 | { |
7109 | for (tree var : later_debug_set_vars) |
7110 | TREE_VISITED (var) = 0; |
7111 | later_debug_set_vars.truncate (size: 0); |
7112 | } |
7113 | else if (DEBUG_BIND_INSN_P (insn) |
7114 | && !TREE_VISITED (INSN_VAR_LOCATION_DECL (insn))) |
7115 | { |
7116 | later_debug_set_vars.safe_push (INSN_VAR_LOCATION_DECL (insn)); |
7117 | TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)) = 1; |
7118 | } |
7119 | } |
7120 | } |
7121 | |
7122 | if (MAY_HAVE_DEBUG_BIND_INSNS) |
7123 | { |
7124 | for (insn = get_last_insn (); insn; insn = PREV_INSN (insn)) |
7125 | if (DEBUG_BIND_INSN_P (insn)) |
7126 | { |
7127 | /* If this debug insn references a dead register that wasn't replaced |
7128 | with an DEBUG_EXPR, reset the DEBUG_INSN. */ |
7129 | bool seen_repl = false; |
7130 | if (is_dead_debug_insn (INSN_VAR_LOCATION_LOC (insn), |
7131 | counts, replacements, seen_repl: &seen_repl)) |
7132 | { |
7133 | INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC (); |
7134 | df_insn_rescan (insn); |
7135 | } |
7136 | else if (seen_repl) |
7137 | { |
7138 | INSN_VAR_LOCATION_LOC (insn) |
7139 | = simplify_replace_fn_rtx (INSN_VAR_LOCATION_LOC (insn), |
7140 | NULL_RTX, fn: replace_dead_reg, |
7141 | replacements); |
7142 | df_insn_rescan (insn); |
7143 | } |
7144 | } |
7145 | free (ptr: replacements); |
7146 | } |
7147 | |
7148 | if (dump_file && ndead) |
7149 | fprintf (stream: dump_file, format: "Deleted %i trivially dead insns\n" , |
7150 | ndead); |
7151 | /* Clean up. */ |
7152 | free (ptr: counts); |
7153 | timevar_pop (tv: TV_DELETE_TRIVIALLY_DEAD); |
7154 | return ndead; |
7155 | } |
7156 | |
7157 | /* If LOC contains references to NEWREG in a different mode, change them |
7158 | to use NEWREG instead. */ |
7159 | |
7160 | static void |
7161 | cse_change_cc_mode (subrtx_ptr_iterator::array_type &array, |
7162 | rtx *loc, rtx_insn *insn, rtx newreg) |
7163 | { |
7164 | FOR_EACH_SUBRTX_PTR (iter, array, loc, NONCONST) |
7165 | { |
7166 | rtx *loc = *iter; |
7167 | rtx x = *loc; |
7168 | if (x |
7169 | && REG_P (x) |
7170 | && REGNO (x) == REGNO (newreg) |
7171 | && GET_MODE (x) != GET_MODE (newreg)) |
7172 | { |
7173 | validate_change (insn, loc, newreg, 1); |
7174 | iter.skip_subrtxes (); |
7175 | } |
7176 | } |
7177 | } |
7178 | |
7179 | /* Change the mode of any reference to the register REGNO (NEWREG) to |
7180 | GET_MODE (NEWREG) in INSN. */ |
7181 | |
7182 | static void |
7183 | cse_change_cc_mode_insn (rtx_insn *insn, rtx newreg) |
7184 | { |
7185 | int success; |
7186 | |
7187 | if (!INSN_P (insn)) |
7188 | return; |
7189 | |
7190 | subrtx_ptr_iterator::array_type array; |
7191 | cse_change_cc_mode (array, loc: &PATTERN (insn), insn, newreg); |
7192 | cse_change_cc_mode (array, loc: ®_NOTES (insn), insn, newreg); |
7193 | |
7194 | /* If the following assertion was triggered, there is most probably |
7195 | something wrong with the cc_modes_compatible back end function. |
7196 | CC modes only can be considered compatible if the insn - with the mode |
7197 | replaced by any of the compatible modes - can still be recognized. */ |
7198 | success = apply_change_group (); |
7199 | gcc_assert (success); |
7200 | } |
7201 | |
7202 | /* Change the mode of any reference to the register REGNO (NEWREG) to |
7203 | GET_MODE (NEWREG), starting at START. Stop before END. Stop at |
7204 | any instruction which modifies NEWREG. */ |
7205 | |
7206 | static void |
7207 | cse_change_cc_mode_insns (rtx_insn *start, rtx_insn *end, rtx newreg) |
7208 | { |
7209 | rtx_insn *insn; |
7210 | |
7211 | for (insn = start; insn != end; insn = NEXT_INSN (insn)) |
7212 | { |
7213 | if (! INSN_P (insn)) |
7214 | continue; |
7215 | |
7216 | if (reg_set_p (newreg, insn)) |
7217 | return; |
7218 | |
7219 | cse_change_cc_mode_insn (insn, newreg); |
7220 | } |
7221 | } |
7222 | |
7223 | /* BB is a basic block which finishes with CC_REG as a condition code |
7224 | register which is set to CC_SRC. Look through the successors of BB |
7225 | to find blocks which have a single predecessor (i.e., this one), |
7226 | and look through those blocks for an assignment to CC_REG which is |
7227 | equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are |
7228 | permitted to change the mode of CC_SRC to a compatible mode. This |
7229 | returns VOIDmode if no equivalent assignments were found. |
7230 | Otherwise it returns the mode which CC_SRC should wind up with. |
7231 | ORIG_BB should be the same as BB in the outermost cse_cc_succs call, |
7232 | but is passed unmodified down to recursive calls in order to prevent |
7233 | endless recursion. |
7234 | |
7235 | The main complexity in this function is handling the mode issues. |
7236 | We may have more than one duplicate which we can eliminate, and we |
7237 | try to find a mode which will work for multiple duplicates. */ |
7238 | |
7239 | static machine_mode |
7240 | cse_cc_succs (basic_block bb, basic_block orig_bb, rtx cc_reg, rtx cc_src, |
7241 | bool can_change_mode) |
7242 | { |
7243 | bool found_equiv; |
7244 | machine_mode mode; |
7245 | unsigned int insn_count; |
7246 | edge e; |
7247 | rtx_insn *insns[2]; |
7248 | machine_mode modes[2]; |
7249 | rtx_insn *last_insns[2]; |
7250 | unsigned int i; |
7251 | rtx newreg; |
7252 | edge_iterator ei; |
7253 | |
7254 | /* We expect to have two successors. Look at both before picking |
7255 | the final mode for the comparison. If we have more successors |
7256 | (i.e., some sort of table jump, although that seems unlikely), |
7257 | then we require all beyond the first two to use the same |
7258 | mode. */ |
7259 | |
7260 | found_equiv = false; |
7261 | mode = GET_MODE (cc_src); |
7262 | insn_count = 0; |
7263 | FOR_EACH_EDGE (e, ei, bb->succs) |
7264 | { |
7265 | rtx_insn *insn; |
7266 | rtx_insn *end; |
7267 | |
7268 | if (e->flags & EDGE_COMPLEX) |
7269 | continue; |
7270 | |
7271 | if (EDGE_COUNT (e->dest->preds) != 1 |
7272 | || e->dest == EXIT_BLOCK_PTR_FOR_FN (cfun) |
7273 | /* Avoid endless recursion on unreachable blocks. */ |
7274 | || e->dest == orig_bb) |
7275 | continue; |
7276 | |
7277 | end = NEXT_INSN (BB_END (e->dest)); |
7278 | for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn)) |
7279 | { |
7280 | rtx set; |
7281 | |
7282 | if (! INSN_P (insn)) |
7283 | continue; |
7284 | |
7285 | /* If CC_SRC is modified, we have to stop looking for |
7286 | something which uses it. */ |
7287 | if (modified_in_p (cc_src, insn)) |
7288 | break; |
7289 | |
7290 | /* Check whether INSN sets CC_REG to CC_SRC. */ |
7291 | set = single_set (insn); |
7292 | if (set |
7293 | && REG_P (SET_DEST (set)) |
7294 | && REGNO (SET_DEST (set)) == REGNO (cc_reg)) |
7295 | { |
7296 | bool found; |
7297 | machine_mode set_mode; |
7298 | machine_mode comp_mode; |
7299 | |
7300 | found = false; |
7301 | set_mode = GET_MODE (SET_SRC (set)); |
7302 | comp_mode = set_mode; |
7303 | if (rtx_equal_p (cc_src, SET_SRC (set))) |
7304 | found = true; |
7305 | else if (GET_CODE (cc_src) == COMPARE |
7306 | && GET_CODE (SET_SRC (set)) == COMPARE |
7307 | && mode != set_mode |
7308 | && rtx_equal_p (XEXP (cc_src, 0), |
7309 | XEXP (SET_SRC (set), 0)) |
7310 | && rtx_equal_p (XEXP (cc_src, 1), |
7311 | XEXP (SET_SRC (set), 1))) |
7312 | |
7313 | { |
7314 | comp_mode = targetm.cc_modes_compatible (mode, set_mode); |
7315 | if (comp_mode != VOIDmode |
7316 | && (can_change_mode || comp_mode == mode)) |
7317 | found = true; |
7318 | } |
7319 | |
7320 | if (found) |
7321 | { |
7322 | found_equiv = true; |
7323 | if (insn_count < ARRAY_SIZE (insns)) |
7324 | { |
7325 | insns[insn_count] = insn; |
7326 | modes[insn_count] = set_mode; |
7327 | last_insns[insn_count] = end; |
7328 | ++insn_count; |
7329 | |
7330 | if (mode != comp_mode) |
7331 | { |
7332 | gcc_assert (can_change_mode); |
7333 | mode = comp_mode; |
7334 | |
7335 | /* The modified insn will be re-recognized later. */ |
7336 | PUT_MODE (x: cc_src, mode); |
7337 | } |
7338 | } |
7339 | else |
7340 | { |
7341 | if (set_mode != mode) |
7342 | { |
7343 | /* We found a matching expression in the |
7344 | wrong mode, but we don't have room to |
7345 | store it in the array. Punt. This case |
7346 | should be rare. */ |
7347 | break; |
7348 | } |
7349 | /* INSN sets CC_REG to a value equal to CC_SRC |
7350 | with the right mode. We can simply delete |
7351 | it. */ |
7352 | delete_insn (insn); |
7353 | } |
7354 | |
7355 | /* We found an instruction to delete. Keep looking, |
7356 | in the hopes of finding a three-way jump. */ |
7357 | continue; |
7358 | } |
7359 | |
7360 | /* We found an instruction which sets the condition |
7361 | code, so don't look any farther. */ |
7362 | break; |
7363 | } |
7364 | |
7365 | /* If INSN sets CC_REG in some other way, don't look any |
7366 | farther. */ |
7367 | if (reg_set_p (cc_reg, insn)) |
7368 | break; |
7369 | } |
7370 | |
7371 | /* If we fell off the bottom of the block, we can keep looking |
7372 | through successors. We pass CAN_CHANGE_MODE as false because |
7373 | we aren't prepared to handle compatibility between the |
7374 | further blocks and this block. */ |
7375 | if (insn == end) |
7376 | { |
7377 | machine_mode submode; |
7378 | |
7379 | submode = cse_cc_succs (bb: e->dest, orig_bb, cc_reg, cc_src, can_change_mode: false); |
7380 | if (submode != VOIDmode) |
7381 | { |
7382 | gcc_assert (submode == mode); |
7383 | found_equiv = true; |
7384 | can_change_mode = false; |
7385 | } |
7386 | } |
7387 | } |
7388 | |
7389 | if (! found_equiv) |
7390 | return VOIDmode; |
7391 | |
7392 | /* Now INSN_COUNT is the number of instructions we found which set |
7393 | CC_REG to a value equivalent to CC_SRC. The instructions are in |
7394 | INSNS. The modes used by those instructions are in MODES. */ |
7395 | |
7396 | newreg = NULL_RTX; |
7397 | for (i = 0; i < insn_count; ++i) |
7398 | { |
7399 | if (modes[i] != mode) |
7400 | { |
7401 | /* We need to change the mode of CC_REG in INSNS[i] and |
7402 | subsequent instructions. */ |
7403 | if (! newreg) |
7404 | { |
7405 | if (GET_MODE (cc_reg) == mode) |
7406 | newreg = cc_reg; |
7407 | else |
7408 | newreg = gen_rtx_REG (mode, REGNO (cc_reg)); |
7409 | } |
7410 | cse_change_cc_mode_insns (start: NEXT_INSN (insn: insns[i]), end: last_insns[i], |
7411 | newreg); |
7412 | } |
7413 | |
7414 | cse_cfg_altered |= delete_insn_and_edges (insns[i]); |
7415 | } |
7416 | |
7417 | return mode; |
7418 | } |
7419 | |
7420 | /* If we have a fixed condition code register (or two), walk through |
7421 | the instructions and try to eliminate duplicate assignments. */ |
7422 | |
7423 | static void |
7424 | cse_condition_code_reg (void) |
7425 | { |
7426 | unsigned int cc_regno_1; |
7427 | unsigned int cc_regno_2; |
7428 | rtx cc_reg_1; |
7429 | rtx cc_reg_2; |
7430 | basic_block bb; |
7431 | |
7432 | if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2)) |
7433 | return; |
7434 | |
7435 | cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1); |
7436 | if (cc_regno_2 != INVALID_REGNUM) |
7437 | cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2); |
7438 | else |
7439 | cc_reg_2 = NULL_RTX; |
7440 | |
7441 | FOR_EACH_BB_FN (bb, cfun) |
7442 | { |
7443 | rtx_insn *last_insn; |
7444 | rtx cc_reg; |
7445 | rtx_insn *insn; |
7446 | rtx_insn *cc_src_insn; |
7447 | rtx cc_src; |
7448 | machine_mode mode; |
7449 | machine_mode orig_mode; |
7450 | |
7451 | /* Look for blocks which end with a conditional jump based on a |
7452 | condition code register. Then look for the instruction which |
7453 | sets the condition code register. Then look through the |
7454 | successor blocks for instructions which set the condition |
7455 | code register to the same value. There are other possible |
7456 | uses of the condition code register, but these are by far the |
7457 | most common and the ones which we are most likely to be able |
7458 | to optimize. */ |
7459 | |
7460 | last_insn = BB_END (bb); |
7461 | if (!JUMP_P (last_insn)) |
7462 | continue; |
7463 | |
7464 | if (reg_referenced_p (cc_reg_1, PATTERN (insn: last_insn))) |
7465 | cc_reg = cc_reg_1; |
7466 | else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (insn: last_insn))) |
7467 | cc_reg = cc_reg_2; |
7468 | else |
7469 | continue; |
7470 | |
7471 | cc_src_insn = NULL; |
7472 | cc_src = NULL_RTX; |
7473 | for (insn = PREV_INSN (insn: last_insn); |
7474 | insn && insn != PREV_INSN (BB_HEAD (bb)); |
7475 | insn = PREV_INSN (insn)) |
7476 | { |
7477 | rtx set; |
7478 | |
7479 | if (! INSN_P (insn)) |
7480 | continue; |
7481 | set = single_set (insn); |
7482 | if (set |
7483 | && REG_P (SET_DEST (set)) |
7484 | && REGNO (SET_DEST (set)) == REGNO (cc_reg)) |
7485 | { |
7486 | cc_src_insn = insn; |
7487 | cc_src = SET_SRC (set); |
7488 | break; |
7489 | } |
7490 | else if (reg_set_p (cc_reg, insn)) |
7491 | break; |
7492 | } |
7493 | |
7494 | if (! cc_src_insn) |
7495 | continue; |
7496 | |
7497 | if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (insn: last_insn))) |
7498 | continue; |
7499 | |
7500 | /* Now CC_REG is a condition code register used for a |
7501 | conditional jump at the end of the block, and CC_SRC, in |
7502 | CC_SRC_INSN, is the value to which that condition code |
7503 | register is set, and CC_SRC is still meaningful at the end of |
7504 | the basic block. */ |
7505 | |
7506 | orig_mode = GET_MODE (cc_src); |
7507 | mode = cse_cc_succs (bb, orig_bb: bb, cc_reg, cc_src, can_change_mode: true); |
7508 | if (mode != VOIDmode) |
7509 | { |
7510 | gcc_assert (mode == GET_MODE (cc_src)); |
7511 | if (mode != orig_mode) |
7512 | { |
7513 | rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg)); |
7514 | |
7515 | cse_change_cc_mode_insn (insn: cc_src_insn, newreg); |
7516 | |
7517 | /* Do the same in the following insns that use the |
7518 | current value of CC_REG within BB. */ |
7519 | cse_change_cc_mode_insns (start: NEXT_INSN (insn: cc_src_insn), |
7520 | end: NEXT_INSN (insn: last_insn), |
7521 | newreg); |
7522 | } |
7523 | } |
7524 | } |
7525 | } |
7526 | |
7527 | |
7528 | /* Perform common subexpression elimination. Nonzero value from |
7529 | `cse_main' means that jumps were simplified and some code may now |
7530 | be unreachable, so do jump optimization again. */ |
7531 | static unsigned int |
7532 | rest_of_handle_cse (void) |
7533 | { |
7534 | int tem; |
7535 | |
7536 | if (dump_file) |
7537 | dump_flow_info (dump_file, dump_flags); |
7538 | |
7539 | tem = cse_main (f: get_insns (), nregs: max_reg_num ()); |
7540 | |
7541 | /* If we are not running more CSE passes, then we are no longer |
7542 | expecting CSE to be run. But always rerun it in a cheap mode. */ |
7543 | cse_not_expected = !flag_rerun_cse_after_loop && !flag_gcse; |
7544 | |
7545 | if (tem == 2) |
7546 | { |
7547 | timevar_push (tv: TV_JUMP); |
7548 | rebuild_jump_labels (get_insns ()); |
7549 | cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED); |
7550 | timevar_pop (tv: TV_JUMP); |
7551 | } |
7552 | else if (tem == 1 || optimize > 1) |
7553 | cse_cfg_altered |= cleanup_cfg (0); |
7554 | |
7555 | return 0; |
7556 | } |
7557 | |
7558 | namespace { |
7559 | |
7560 | const pass_data pass_data_cse = |
7561 | { |
7562 | .type: RTL_PASS, /* type */ |
7563 | .name: "cse1" , /* name */ |
7564 | .optinfo_flags: OPTGROUP_NONE, /* optinfo_flags */ |
7565 | .tv_id: TV_CSE, /* tv_id */ |
7566 | .properties_required: 0, /* properties_required */ |
7567 | .properties_provided: 0, /* properties_provided */ |
7568 | .properties_destroyed: 0, /* properties_destroyed */ |
7569 | .todo_flags_start: 0, /* todo_flags_start */ |
7570 | TODO_df_finish, /* todo_flags_finish */ |
7571 | }; |
7572 | |
7573 | class pass_cse : public rtl_opt_pass |
7574 | { |
7575 | public: |
7576 | pass_cse (gcc::context *ctxt) |
7577 | : rtl_opt_pass (pass_data_cse, ctxt) |
7578 | {} |
7579 | |
7580 | /* opt_pass methods: */ |
7581 | bool gate (function *) final override { return optimize > 0; } |
7582 | unsigned int execute (function *) final override |
7583 | { |
7584 | return rest_of_handle_cse (); |
7585 | } |
7586 | |
7587 | }; // class pass_cse |
7588 | |
7589 | } // anon namespace |
7590 | |
7591 | rtl_opt_pass * |
7592 | make_pass_cse (gcc::context *ctxt) |
7593 | { |
7594 | return new pass_cse (ctxt); |
7595 | } |
7596 | |
7597 | |
7598 | /* Run second CSE pass after loop optimizations. */ |
7599 | static unsigned int |
7600 | rest_of_handle_cse2 (void) |
7601 | { |
7602 | int tem; |
7603 | |
7604 | if (dump_file) |
7605 | dump_flow_info (dump_file, dump_flags); |
7606 | |
7607 | tem = cse_main (f: get_insns (), nregs: max_reg_num ()); |
7608 | |
7609 | /* Run a pass to eliminate duplicated assignments to condition code |
7610 | registers. We have to run this after bypass_jumps, because it |
7611 | makes it harder for that pass to determine whether a jump can be |
7612 | bypassed safely. */ |
7613 | cse_condition_code_reg (); |
7614 | |
7615 | delete_trivially_dead_insns (insns: get_insns (), nreg: max_reg_num ()); |
7616 | |
7617 | if (tem == 2) |
7618 | { |
7619 | timevar_push (tv: TV_JUMP); |
7620 | rebuild_jump_labels (get_insns ()); |
7621 | cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED); |
7622 | timevar_pop (tv: TV_JUMP); |
7623 | } |
7624 | else if (tem == 1 || cse_cfg_altered) |
7625 | cse_cfg_altered |= cleanup_cfg (0); |
7626 | |
7627 | cse_not_expected = 1; |
7628 | return 0; |
7629 | } |
7630 | |
7631 | |
7632 | namespace { |
7633 | |
7634 | const pass_data pass_data_cse2 = |
7635 | { |
7636 | .type: RTL_PASS, /* type */ |
7637 | .name: "cse2" , /* name */ |
7638 | .optinfo_flags: OPTGROUP_NONE, /* optinfo_flags */ |
7639 | .tv_id: TV_CSE2, /* tv_id */ |
7640 | .properties_required: 0, /* properties_required */ |
7641 | .properties_provided: 0, /* properties_provided */ |
7642 | .properties_destroyed: 0, /* properties_destroyed */ |
7643 | .todo_flags_start: 0, /* todo_flags_start */ |
7644 | TODO_df_finish, /* todo_flags_finish */ |
7645 | }; |
7646 | |
7647 | class pass_cse2 : public rtl_opt_pass |
7648 | { |
7649 | public: |
7650 | pass_cse2 (gcc::context *ctxt) |
7651 | : rtl_opt_pass (pass_data_cse2, ctxt) |
7652 | {} |
7653 | |
7654 | /* opt_pass methods: */ |
7655 | bool gate (function *) final override |
7656 | { |
7657 | return optimize > 0 && flag_rerun_cse_after_loop; |
7658 | } |
7659 | |
7660 | unsigned int execute (function *) final override |
7661 | { |
7662 | return rest_of_handle_cse2 (); |
7663 | } |
7664 | |
7665 | }; // class pass_cse2 |
7666 | |
7667 | } // anon namespace |
7668 | |
7669 | rtl_opt_pass * |
7670 | make_pass_cse2 (gcc::context *ctxt) |
7671 | { |
7672 | return new pass_cse2 (ctxt); |
7673 | } |
7674 | |
7675 | /* Run second CSE pass after loop optimizations. */ |
7676 | static unsigned int |
7677 | rest_of_handle_cse_after_global_opts (void) |
7678 | { |
7679 | int save_cfj; |
7680 | int tem; |
7681 | |
7682 | /* We only want to do local CSE, so don't follow jumps. */ |
7683 | save_cfj = flag_cse_follow_jumps; |
7684 | flag_cse_follow_jumps = 0; |
7685 | |
7686 | rebuild_jump_labels (get_insns ()); |
7687 | tem = cse_main (f: get_insns (), nregs: max_reg_num ()); |
7688 | cse_cfg_altered |= purge_all_dead_edges (); |
7689 | delete_trivially_dead_insns (insns: get_insns (), nreg: max_reg_num ()); |
7690 | |
7691 | cse_not_expected = !flag_rerun_cse_after_loop; |
7692 | |
7693 | /* If cse altered any jumps, rerun jump opts to clean things up. */ |
7694 | if (tem == 2) |
7695 | { |
7696 | timevar_push (tv: TV_JUMP); |
7697 | rebuild_jump_labels (get_insns ()); |
7698 | cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED); |
7699 | timevar_pop (tv: TV_JUMP); |
7700 | } |
7701 | else if (tem == 1 || cse_cfg_altered) |
7702 | cse_cfg_altered |= cleanup_cfg (0); |
7703 | |
7704 | flag_cse_follow_jumps = save_cfj; |
7705 | return 0; |
7706 | } |
7707 | |
7708 | namespace { |
7709 | |
7710 | const pass_data pass_data_cse_after_global_opts = |
7711 | { |
7712 | .type: RTL_PASS, /* type */ |
7713 | .name: "cse_local" , /* name */ |
7714 | .optinfo_flags: OPTGROUP_NONE, /* optinfo_flags */ |
7715 | .tv_id: TV_CSE, /* tv_id */ |
7716 | .properties_required: 0, /* properties_required */ |
7717 | .properties_provided: 0, /* properties_provided */ |
7718 | .properties_destroyed: 0, /* properties_destroyed */ |
7719 | .todo_flags_start: 0, /* todo_flags_start */ |
7720 | TODO_df_finish, /* todo_flags_finish */ |
7721 | }; |
7722 | |
7723 | class pass_cse_after_global_opts : public rtl_opt_pass |
7724 | { |
7725 | public: |
7726 | pass_cse_after_global_opts (gcc::context *ctxt) |
7727 | : rtl_opt_pass (pass_data_cse_after_global_opts, ctxt) |
7728 | {} |
7729 | |
7730 | /* opt_pass methods: */ |
7731 | bool gate (function *) final override |
7732 | { |
7733 | return optimize > 0 && flag_rerun_cse_after_global_opts; |
7734 | } |
7735 | |
7736 | unsigned int execute (function *) final override |
7737 | { |
7738 | return rest_of_handle_cse_after_global_opts (); |
7739 | } |
7740 | |
7741 | }; // class pass_cse_after_global_opts |
7742 | |
7743 | } // anon namespace |
7744 | |
7745 | rtl_opt_pass * |
7746 | make_pass_cse_after_global_opts (gcc::context *ctxt) |
7747 | { |
7748 | return new pass_cse_after_global_opts (ctxt); |
7749 | } |
7750 | |