1 | /* Code for RTL register eliminations. |
2 | Copyright (C) 2010-2023 Free Software Foundation, Inc. |
3 | Contributed by Vladimir Makarov <vmakarov@redhat.com>. |
4 | |
5 | This file is part of GCC. |
6 | |
7 | GCC is free software; you can redistribute it and/or modify it under |
8 | the terms of the GNU General Public License as published by the Free |
9 | Software Foundation; either version 3, or (at your option) any later |
10 | version. |
11 | |
12 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
13 | WARRANTY; without even the implied warranty of MERCHANTABILITY or |
14 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
15 | for more details. |
16 | |
17 | You should have received a copy of the GNU General Public License |
18 | along with GCC; see the file COPYING3. If not see |
19 | <http://www.gnu.org/licenses/>. */ |
20 | |
21 | /* Eliminable registers (like a soft argument or frame pointer) are |
22 | widely used in RTL. These eliminable registers should be replaced |
23 | by real hard registers (like the stack pointer or hard frame |
24 | pointer) plus some offset. The offsets usually change whenever the |
25 | stack is expanded. We know the final offsets only at the very end |
26 | of LRA. |
27 | |
28 | Within LRA, we usually keep the RTL in such a state that the |
29 | eliminable registers can be replaced by just the corresponding hard |
30 | register (without any offset). To achieve this we should add the |
31 | initial elimination offset at the beginning of LRA and update the |
32 | offsets whenever the stack is expanded. We need to do this before |
33 | every constraint pass because the choice of offset often affects |
34 | whether a particular address or memory constraint is satisfied. |
35 | |
36 | We keep RTL code at most time in such state that the virtual |
37 | registers can be changed by just the corresponding hard registers |
38 | (with zero offsets) and we have the right RTL code. To achieve this |
39 | we should add initial offset at the beginning of LRA work and update |
40 | offsets after each stack expanding. But actually we update virtual |
41 | registers to the same virtual registers + corresponding offsets |
42 | before every constraint pass because it affects constraint |
43 | satisfaction (e.g. an address displacement became too big for some |
44 | target). |
45 | |
46 | The final change of eliminable registers to the corresponding hard |
47 | registers are done at the very end of LRA when there were no change |
48 | in offsets anymore: |
49 | |
50 | fp + 42 => sp + 42 |
51 | |
52 | */ |
53 | |
54 | #include "config.h" |
55 | #include "system.h" |
56 | #include "coretypes.h" |
57 | #include "backend.h" |
58 | #include "target.h" |
59 | #include "rtl.h" |
60 | #include "tree.h" |
61 | #include "df.h" |
62 | #include "memmodel.h" |
63 | #include "tm_p.h" |
64 | #include "optabs.h" |
65 | #include "regs.h" |
66 | #include "ira.h" |
67 | #include "recog.h" |
68 | #include "output.h" |
69 | #include "rtl-error.h" |
70 | #include "lra-int.h" |
71 | |
72 | /* This structure is used to record information about hard register |
73 | eliminations. */ |
74 | class lra_elim_table |
75 | { |
76 | public: |
77 | /* Hard register number to be eliminated. */ |
78 | int from; |
79 | /* Hard register number used as replacement. */ |
80 | int to; |
81 | /* Difference between values of the two hard registers above on |
82 | previous iteration. */ |
83 | poly_int64 previous_offset; |
84 | /* Difference between the values on the current iteration. */ |
85 | poly_int64 offset; |
86 | /* Nonzero if this elimination can be done. */ |
87 | bool can_eliminate; |
88 | /* CAN_ELIMINATE since the last check. */ |
89 | bool prev_can_eliminate; |
90 | /* REG rtx for the register to be eliminated. We cannot simply |
91 | compare the number since we might then spuriously replace a hard |
92 | register corresponding to a pseudo assigned to the reg to be |
93 | eliminated. */ |
94 | rtx from_rtx; |
95 | /* REG rtx for the replacement. */ |
96 | rtx to_rtx; |
97 | }; |
98 | |
99 | /* The elimination table. Each array entry describes one possible way |
100 | of eliminating a register in favor of another. If there is more |
101 | than one way of eliminating a particular register, the most |
102 | preferred should be specified first. */ |
103 | static class lra_elim_table *reg_eliminate = 0; |
104 | |
105 | /* This is an intermediate structure to initialize the table. It has |
106 | exactly the members provided by ELIMINABLE_REGS. */ |
107 | static const struct elim_table_1 |
108 | { |
109 | const int from; |
110 | const int to; |
111 | } reg_eliminate_1[] = |
112 | |
113 | ELIMINABLE_REGS; |
114 | |
115 | #define NUM_ELIMINABLE_REGS ARRAY_SIZE (reg_eliminate_1) |
116 | |
117 | /* Print info about elimination table to file F. */ |
118 | static void |
119 | print_elim_table (FILE *f) |
120 | { |
121 | class lra_elim_table *ep; |
122 | |
123 | for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) |
124 | { |
125 | fprintf (stream: f, format: "%s eliminate %d to %d (offset=" , |
126 | ep->can_eliminate ? "Can" : "Can't" , ep->from, ep->to); |
127 | print_dec (value: ep->offset, file: f); |
128 | fprintf (stream: f, format: ", prev_offset=" ); |
129 | print_dec (value: ep->previous_offset, file: f); |
130 | fprintf (stream: f, format: ")\n" ); |
131 | } |
132 | } |
133 | |
134 | /* Print info about elimination table to stderr. */ |
135 | void |
136 | lra_debug_elim_table (void) |
137 | { |
138 | print_elim_table (stderr); |
139 | } |
140 | |
141 | /* Setup possibility of elimination in elimination table element EP to |
142 | VALUE. Setup FRAME_POINTER_NEEDED if elimination from frame |
143 | pointer to stack pointer is not possible anymore. */ |
144 | static void |
145 | setup_can_eliminate (class lra_elim_table *ep, bool value) |
146 | { |
147 | ep->can_eliminate = ep->prev_can_eliminate = value; |
148 | if (! value |
149 | && ep->from == FRAME_POINTER_REGNUM && ep->to == STACK_POINTER_REGNUM) |
150 | frame_pointer_needed = 1; |
151 | if (!frame_pointer_needed) |
152 | REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = 0; |
153 | } |
154 | |
155 | /* Map: eliminable "from" register -> its current elimination, |
156 | or NULL if none. The elimination table may contain more than |
157 | one elimination for the same hard register, but this map specifies |
158 | the one that we are currently using. */ |
159 | static class lra_elim_table *elimination_map[FIRST_PSEUDO_REGISTER]; |
160 | |
161 | /* When an eliminable hard register becomes not eliminable, we use the |
162 | following special structure to restore original offsets for the |
163 | register. */ |
164 | static class lra_elim_table self_elim_table; |
165 | |
166 | /* Offsets should be used to restore original offsets for eliminable |
167 | hard register which just became not eliminable. Zero, |
168 | otherwise. */ |
169 | static poly_int64 self_elim_offsets[FIRST_PSEUDO_REGISTER]; |
170 | |
171 | /* Map: hard regno -> RTL presentation. RTL presentations of all |
172 | potentially eliminable hard registers are stored in the map. */ |
173 | static rtx eliminable_reg_rtx[FIRST_PSEUDO_REGISTER]; |
174 | |
175 | /* Set up ELIMINATION_MAP of the currently used eliminations. */ |
176 | static void |
177 | setup_elimination_map (void) |
178 | { |
179 | int i; |
180 | class lra_elim_table *ep; |
181 | |
182 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
183 | elimination_map[i] = NULL; |
184 | for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) |
185 | if (ep->can_eliminate && elimination_map[ep->from] == NULL) |
186 | elimination_map[ep->from] = ep; |
187 | } |
188 | |
189 | |
190 | |
191 | /* Compute the sum of X and Y, making canonicalizations assumed in an |
192 | address, namely: sum constant integers, surround the sum of two |
193 | constants with a CONST, put the constant as the second operand, and |
194 | group the constant on the outermost sum. |
195 | |
196 | This routine assumes both inputs are already in canonical form. */ |
197 | static rtx |
198 | form_sum (rtx x, rtx y) |
199 | { |
200 | machine_mode mode = GET_MODE (x); |
201 | poly_int64 offset; |
202 | |
203 | if (mode == VOIDmode) |
204 | mode = GET_MODE (y); |
205 | |
206 | if (mode == VOIDmode) |
207 | mode = Pmode; |
208 | |
209 | if (poly_int_rtx_p (x, res: &offset)) |
210 | return plus_constant (mode, y, offset); |
211 | else if (poly_int_rtx_p (x: y, res: &offset)) |
212 | return plus_constant (mode, x, offset); |
213 | else if (CONSTANT_P (x)) |
214 | std::swap (a&: x, b&: y); |
215 | |
216 | if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1))) |
217 | return form_sum (XEXP (x, 0), y: form_sum (XEXP (x, 1), y)); |
218 | |
219 | /* Note that if the operands of Y are specified in the opposite |
220 | order in the recursive calls below, infinite recursion will |
221 | occur. */ |
222 | if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1))) |
223 | return form_sum (x: form_sum (x, XEXP (y, 0)), XEXP (y, 1)); |
224 | |
225 | /* If both constant, encapsulate sum. Otherwise, just form sum. A |
226 | constant will have been placed second. */ |
227 | if (CONSTANT_P (x) && CONSTANT_P (y)) |
228 | { |
229 | if (GET_CODE (x) == CONST) |
230 | x = XEXP (x, 0); |
231 | if (GET_CODE (y) == CONST) |
232 | y = XEXP (y, 0); |
233 | |
234 | return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y)); |
235 | } |
236 | |
237 | return gen_rtx_PLUS (mode, x, y); |
238 | } |
239 | |
240 | /* Return the current substitution hard register of the elimination of |
241 | HARD_REGNO. If HARD_REGNO is not eliminable, return itself. */ |
242 | int |
243 | lra_get_elimination_hard_regno (int hard_regno) |
244 | { |
245 | class lra_elim_table *ep; |
246 | |
247 | if (hard_regno < 0 || hard_regno >= FIRST_PSEUDO_REGISTER) |
248 | return hard_regno; |
249 | if ((ep = elimination_map[hard_regno]) == NULL) |
250 | return hard_regno; |
251 | return ep->to; |
252 | } |
253 | |
254 | /* Return elimination which will be used for hard reg REG, NULL |
255 | otherwise. */ |
256 | static class lra_elim_table * |
257 | get_elimination (rtx reg) |
258 | { |
259 | int hard_regno; |
260 | class lra_elim_table *ep; |
261 | |
262 | lra_assert (REG_P (reg)); |
263 | if ((hard_regno = REGNO (reg)) < 0 || hard_regno >= FIRST_PSEUDO_REGISTER) |
264 | return NULL; |
265 | if ((ep = elimination_map[hard_regno]) != NULL) |
266 | return ep->from_rtx != reg ? NULL : ep; |
267 | poly_int64 offset = self_elim_offsets[hard_regno]; |
268 | if (known_eq (offset, 0)) |
269 | return NULL; |
270 | /* This is an iteration to restore offsets just after HARD_REGNO |
271 | stopped to be eliminable. */ |
272 | self_elim_table.from = self_elim_table.to = hard_regno; |
273 | self_elim_table.from_rtx |
274 | = self_elim_table.to_rtx |
275 | = eliminable_reg_rtx[hard_regno]; |
276 | lra_assert (self_elim_table.from_rtx != NULL); |
277 | self_elim_table.offset = offset; |
278 | return &self_elim_table; |
279 | } |
280 | |
281 | /* Transform (subreg (plus reg const)) to (plus (subreg reg) const) |
282 | when it is possible. Return X or the transformation result if the |
283 | transformation is done. */ |
284 | static rtx |
285 | move_plus_up (rtx x) |
286 | { |
287 | rtx subreg_reg; |
288 | machine_mode x_mode, subreg_reg_mode; |
289 | |
290 | if (GET_CODE (x) != SUBREG || !subreg_lowpart_p (x)) |
291 | return x; |
292 | subreg_reg = SUBREG_REG (x); |
293 | x_mode = GET_MODE (x); |
294 | subreg_reg_mode = GET_MODE (subreg_reg); |
295 | if (!paradoxical_subreg_p (x) |
296 | && GET_CODE (subreg_reg) == PLUS |
297 | && CONSTANT_P (XEXP (subreg_reg, 1)) |
298 | && GET_MODE_CLASS (x_mode) == MODE_INT |
299 | && GET_MODE_CLASS (subreg_reg_mode) == MODE_INT) |
300 | { |
301 | rtx cst = simplify_subreg (outermode: x_mode, XEXP (subreg_reg, 1), innermode: subreg_reg_mode, |
302 | byte: subreg_lowpart_offset (outermode: x_mode, |
303 | innermode: subreg_reg_mode)); |
304 | if (cst && CONSTANT_P (cst)) |
305 | return gen_rtx_PLUS (x_mode, lowpart_subreg (x_mode, |
306 | XEXP (subreg_reg, 0), |
307 | subreg_reg_mode), cst); |
308 | } |
309 | return x; |
310 | } |
311 | |
312 | /* Flag that we already did frame pointer to stack pointer elimination. */ |
313 | static bool elimination_fp2sp_occured_p = false; |
314 | |
315 | /* Scan X and replace any eliminable registers (such as fp) with a |
316 | replacement (such as sp) if SUBST_P, plus an offset. The offset is |
317 | a change in the offset between the eliminable register and its |
318 | substitution if UPDATE_P, or the full offset if FULL_P, or |
319 | otherwise zero. If FULL_P, we also use the SP offsets for |
320 | elimination to SP. If UPDATE_P, use UPDATE_SP_OFFSET for updating |
321 | offsets of register elimnable to SP. If UPDATE_SP_OFFSET is |
322 | non-zero, don't use difference of the offset and the previous |
323 | offset. |
324 | |
325 | MEM_MODE is the mode of an enclosing MEM. We need this to know how |
326 | much to adjust a register for, e.g., PRE_DEC. Also, if we are |
327 | inside a MEM, we are allowed to replace a sum of a hard register |
328 | and the constant zero with the hard register, which we cannot do |
329 | outside a MEM. In addition, we need to record the fact that a |
330 | hard register is referenced outside a MEM. |
331 | |
332 | If we make full substitution to SP for non-null INSN, add the insn |
333 | sp offset. */ |
334 | rtx |
335 | lra_eliminate_regs_1 (rtx_insn *insn, rtx x, machine_mode mem_mode, |
336 | bool subst_p, bool update_p, |
337 | poly_int64 update_sp_offset, bool full_p) |
338 | { |
339 | enum rtx_code code = GET_CODE (x); |
340 | class lra_elim_table *ep; |
341 | rtx new_rtx; |
342 | int i, j; |
343 | const char *fmt; |
344 | int copied = 0; |
345 | |
346 | lra_assert (!update_p || !full_p); |
347 | lra_assert (known_eq (update_sp_offset, 0) |
348 | || (!subst_p && update_p && !full_p)); |
349 | if (! current_function_decl) |
350 | return x; |
351 | |
352 | switch (code) |
353 | { |
354 | CASE_CONST_ANY: |
355 | case CONST: |
356 | case SYMBOL_REF: |
357 | case CODE_LABEL: |
358 | case PC: |
359 | case ASM_INPUT: |
360 | case ADDR_VEC: |
361 | case ADDR_DIFF_VEC: |
362 | case RETURN: |
363 | return x; |
364 | |
365 | case REG: |
366 | /* First handle the case where we encounter a bare hard register |
367 | that is eliminable. Replace it with a PLUS. */ |
368 | if ((ep = get_elimination (reg: x)) != NULL) |
369 | { |
370 | rtx to = subst_p ? ep->to_rtx : ep->from_rtx; |
371 | |
372 | if (ep->to_rtx == stack_pointer_rtx && ep->from == FRAME_POINTER_REGNUM) |
373 | elimination_fp2sp_occured_p = true; |
374 | |
375 | if (maybe_ne (a: update_sp_offset, b: 0)) |
376 | { |
377 | if (ep->to_rtx == stack_pointer_rtx) |
378 | return plus_constant (Pmode, to, update_sp_offset); |
379 | return to; |
380 | } |
381 | else if (update_p) |
382 | return plus_constant (Pmode, to, ep->offset - ep->previous_offset); |
383 | else if (full_p) |
384 | return plus_constant (Pmode, to, |
385 | ep->offset |
386 | - (insn != NULL_RTX |
387 | && ep->to_rtx == stack_pointer_rtx |
388 | ? lra_get_insn_recog_data (insn)->sp_offset |
389 | : 0)); |
390 | else |
391 | return to; |
392 | } |
393 | return x; |
394 | |
395 | case PLUS: |
396 | /* If this is the sum of an eliminable register and a constant, rework |
397 | the sum. */ |
398 | if (REG_P (XEXP (x, 0)) && CONSTANT_P (XEXP (x, 1))) |
399 | { |
400 | if ((ep = get_elimination (XEXP (x, 0))) != NULL) |
401 | { |
402 | poly_int64 offset, curr_offset; |
403 | rtx to = subst_p ? ep->to_rtx : ep->from_rtx; |
404 | |
405 | if (ep->to_rtx == stack_pointer_rtx && ep->from == FRAME_POINTER_REGNUM) |
406 | elimination_fp2sp_occured_p = true; |
407 | |
408 | if (! update_p && ! full_p) |
409 | return simplify_gen_binary (code: PLUS, Pmode, op0: to, XEXP (x, 1)); |
410 | |
411 | if (maybe_ne (a: update_sp_offset, b: 0)) |
412 | offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0; |
413 | else |
414 | offset = (update_p |
415 | ? ep->offset - ep->previous_offset : ep->offset); |
416 | if (full_p && insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx) |
417 | offset -= lra_get_insn_recog_data (insn)->sp_offset; |
418 | if (poly_int_rtx_p (XEXP (x, 1), res: &curr_offset) |
419 | && known_eq (curr_offset, -offset)) |
420 | return to; |
421 | else |
422 | return gen_rtx_PLUS (Pmode, to, |
423 | plus_constant (Pmode, |
424 | XEXP (x, 1), offset)); |
425 | } |
426 | |
427 | /* If the hard register is not eliminable, we are done since |
428 | the other operand is a constant. */ |
429 | return x; |
430 | } |
431 | |
432 | /* If this is part of an address, we want to bring any constant |
433 | to the outermost PLUS. We will do this by doing hard |
434 | register replacement in our operands and seeing if a constant |
435 | shows up in one of them. |
436 | |
437 | Note that there is no risk of modifying the structure of the |
438 | insn, since we only get called for its operands, thus we are |
439 | either modifying the address inside a MEM, or something like |
440 | an address operand of a load-address insn. */ |
441 | |
442 | { |
443 | rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode, |
444 | subst_p, update_p, |
445 | update_sp_offset, full_p); |
446 | rtx new1 = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode, |
447 | subst_p, update_p, |
448 | update_sp_offset, full_p); |
449 | |
450 | new0 = move_plus_up (x: new0); |
451 | new1 = move_plus_up (x: new1); |
452 | if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1)) |
453 | return form_sum (x: new0, y: new1); |
454 | } |
455 | return x; |
456 | |
457 | case MULT: |
458 | /* If this is the product of an eliminable hard register and a |
459 | constant, apply the distribute law and move the constant out |
460 | so that we have (plus (mult ..) ..). This is needed in order |
461 | to keep load-address insns valid. This case is pathological. |
462 | We ignore the possibility of overflow here. */ |
463 | if (REG_P (XEXP (x, 0)) && CONST_INT_P (XEXP (x, 1)) |
464 | && (ep = get_elimination (XEXP (x, 0))) != NULL) |
465 | { |
466 | rtx to = subst_p ? ep->to_rtx : ep->from_rtx; |
467 | |
468 | if (ep->to_rtx == stack_pointer_rtx && ep->from == FRAME_POINTER_REGNUM) |
469 | elimination_fp2sp_occured_p = true; |
470 | |
471 | if (maybe_ne (a: update_sp_offset, b: 0)) |
472 | { |
473 | if (ep->to_rtx == stack_pointer_rtx) |
474 | return plus_constant (Pmode, |
475 | gen_rtx_MULT (Pmode, to, XEXP (x, 1)), |
476 | update_sp_offset * INTVAL (XEXP (x, 1))); |
477 | return gen_rtx_MULT (Pmode, to, XEXP (x, 1)); |
478 | } |
479 | else if (update_p) |
480 | return plus_constant (Pmode, |
481 | gen_rtx_MULT (Pmode, to, XEXP (x, 1)), |
482 | (ep->offset - ep->previous_offset) |
483 | * INTVAL (XEXP (x, 1))); |
484 | else if (full_p) |
485 | { |
486 | poly_int64 offset = ep->offset; |
487 | |
488 | if (insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx) |
489 | offset -= lra_get_insn_recog_data (insn)->sp_offset; |
490 | return |
491 | plus_constant (Pmode, |
492 | gen_rtx_MULT (Pmode, to, XEXP (x, 1)), |
493 | offset * INTVAL (XEXP (x, 1))); |
494 | } |
495 | else |
496 | return gen_rtx_MULT (Pmode, to, XEXP (x, 1)); |
497 | } |
498 | |
499 | /* fall through */ |
500 | |
501 | case CALL: |
502 | case COMPARE: |
503 | /* See comments before PLUS about handling MINUS. */ |
504 | case MINUS: |
505 | case DIV: case UDIV: |
506 | case MOD: case UMOD: |
507 | case AND: case IOR: case XOR: |
508 | case ROTATERT: case ROTATE: |
509 | case ASHIFTRT: case LSHIFTRT: case ASHIFT: |
510 | case NE: case EQ: |
511 | case GE: case GT: case GEU: case GTU: |
512 | case LE: case LT: case LEU: case LTU: |
513 | { |
514 | rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode, |
515 | subst_p, update_p, |
516 | update_sp_offset, full_p); |
517 | rtx new1 = XEXP (x, 1) |
518 | ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode, |
519 | subst_p, update_p, |
520 | update_sp_offset, full_p) : 0; |
521 | |
522 | if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1)) |
523 | return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1); |
524 | } |
525 | return x; |
526 | |
527 | case EXPR_LIST: |
528 | /* If we have something in XEXP (x, 0), the usual case, |
529 | eliminate it. */ |
530 | if (XEXP (x, 0)) |
531 | { |
532 | new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode, |
533 | subst_p, update_p, |
534 | update_sp_offset, full_p); |
535 | if (new_rtx != XEXP (x, 0)) |
536 | { |
537 | /* If this is a REG_DEAD note, it is not valid anymore. |
538 | Using the eliminated version could result in creating a |
539 | REG_DEAD note for the stack or frame pointer. */ |
540 | if (REG_NOTE_KIND (x) == REG_DEAD) |
541 | return (XEXP (x, 1) |
542 | ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode, |
543 | subst_p, update_p, |
544 | update_sp_offset, full_p) |
545 | : NULL_RTX); |
546 | |
547 | x = alloc_reg_note (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1)); |
548 | } |
549 | } |
550 | |
551 | /* fall through */ |
552 | |
553 | case INSN_LIST: |
554 | case INT_LIST: |
555 | /* Now do eliminations in the rest of the chain. If this was |
556 | an EXPR_LIST, this might result in allocating more memory than is |
557 | strictly needed, but it simplifies the code. */ |
558 | if (XEXP (x, 1)) |
559 | { |
560 | new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode, |
561 | subst_p, update_p, |
562 | update_sp_offset, full_p); |
563 | if (new_rtx != XEXP (x, 1)) |
564 | return |
565 | gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x), |
566 | XEXP (x, 0), new_rtx); |
567 | } |
568 | return x; |
569 | |
570 | case PRE_INC: |
571 | case POST_INC: |
572 | case PRE_DEC: |
573 | case POST_DEC: |
574 | /* We do not support elimination of a register that is modified. |
575 | elimination_effects has already make sure that this does not |
576 | happen. */ |
577 | return x; |
578 | |
579 | case PRE_MODIFY: |
580 | case POST_MODIFY: |
581 | /* We do not support elimination of a hard register that is |
582 | modified. LRA has already make sure that this does not |
583 | happen. The only remaining case we need to consider here is |
584 | that the increment value may be an eliminable register. */ |
585 | if (GET_CODE (XEXP (x, 1)) == PLUS |
586 | && XEXP (XEXP (x, 1), 0) == XEXP (x, 0)) |
587 | { |
588 | rtx new_rtx = lra_eliminate_regs_1 (insn, XEXP (XEXP (x, 1), 1), |
589 | mem_mode, subst_p, update_p, |
590 | update_sp_offset, full_p); |
591 | |
592 | if (new_rtx != XEXP (XEXP (x, 1), 1)) |
593 | return gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (x, 0), |
594 | gen_rtx_PLUS (GET_MODE (x), |
595 | XEXP (x, 0), new_rtx)); |
596 | } |
597 | return x; |
598 | |
599 | case STRICT_LOW_PART: |
600 | case NEG: case NOT: |
601 | case SIGN_EXTEND: case ZERO_EXTEND: |
602 | case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE: |
603 | case FLOAT: case FIX: |
604 | case UNSIGNED_FIX: case UNSIGNED_FLOAT: |
605 | case ABS: |
606 | case SQRT: |
607 | case FFS: |
608 | case CLZ: |
609 | case CTZ: |
610 | case POPCOUNT: |
611 | case PARITY: |
612 | case BSWAP: |
613 | new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode, |
614 | subst_p, update_p, |
615 | update_sp_offset, full_p); |
616 | if (new_rtx != XEXP (x, 0)) |
617 | return gen_rtx_fmt_e (code, GET_MODE (x), new_rtx); |
618 | return x; |
619 | |
620 | case SUBREG: |
621 | new_rtx = lra_eliminate_regs_1 (insn, SUBREG_REG (x), mem_mode, |
622 | subst_p, update_p, |
623 | update_sp_offset, full_p); |
624 | |
625 | if (new_rtx != SUBREG_REG (x)) |
626 | { |
627 | if (MEM_P (new_rtx) && !paradoxical_subreg_p (x)) |
628 | { |
629 | SUBREG_REG (x) = new_rtx; |
630 | alter_subreg (&x, false); |
631 | return x; |
632 | } |
633 | else if (! subst_p) |
634 | { |
635 | /* LRA can transform subregs itself. So don't call |
636 | simplify_gen_subreg until LRA transformations are |
637 | finished. Function simplify_gen_subreg can do |
638 | non-trivial transformations (like truncation) which |
639 | might make LRA work to fail. */ |
640 | SUBREG_REG (x) = new_rtx; |
641 | return x; |
642 | } |
643 | else |
644 | return simplify_gen_subreg (GET_MODE (x), op: new_rtx, |
645 | GET_MODE (new_rtx), SUBREG_BYTE (x)); |
646 | } |
647 | |
648 | return x; |
649 | |
650 | case MEM: |
651 | /* Our only special processing is to pass the mode of the MEM to our |
652 | recursive call and copy the flags. While we are here, handle this |
653 | case more efficiently. */ |
654 | return |
655 | replace_equiv_address_nv |
656 | (x, |
657 | lra_eliminate_regs_1 (insn, XEXP (x, 0), GET_MODE (x), |
658 | subst_p, update_p, update_sp_offset, full_p)); |
659 | |
660 | case USE: |
661 | /* Handle insn_list USE that a call to a pure function may generate. */ |
662 | new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), VOIDmode, |
663 | subst_p, update_p, update_sp_offset, full_p); |
664 | if (new_rtx != XEXP (x, 0)) |
665 | return gen_rtx_USE (GET_MODE (x), new_rtx); |
666 | return x; |
667 | |
668 | case CLOBBER: |
669 | case SET: |
670 | gcc_unreachable (); |
671 | |
672 | default: |
673 | break; |
674 | } |
675 | |
676 | /* Process each of our operands recursively. If any have changed, make a |
677 | copy of the rtx. */ |
678 | fmt = GET_RTX_FORMAT (code); |
679 | for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++) |
680 | { |
681 | if (*fmt == 'e') |
682 | { |
683 | new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, i), mem_mode, |
684 | subst_p, update_p, |
685 | update_sp_offset, full_p); |
686 | if (new_rtx != XEXP (x, i) && ! copied) |
687 | { |
688 | x = shallow_copy_rtx (x); |
689 | copied = 1; |
690 | } |
691 | XEXP (x, i) = new_rtx; |
692 | } |
693 | else if (*fmt == 'E') |
694 | { |
695 | int copied_vec = 0; |
696 | for (j = 0; j < XVECLEN (x, i); j++) |
697 | { |
698 | new_rtx = lra_eliminate_regs_1 (insn, XVECEXP (x, i, j), mem_mode, |
699 | subst_p, update_p, |
700 | update_sp_offset, full_p); |
701 | if (new_rtx != XVECEXP (x, i, j) && ! copied_vec) |
702 | { |
703 | rtvec new_v = gen_rtvec_v (XVECLEN (x, i), |
704 | XVEC (x, i)->elem); |
705 | if (! copied) |
706 | { |
707 | x = shallow_copy_rtx (x); |
708 | copied = 1; |
709 | } |
710 | XVEC (x, i) = new_v; |
711 | copied_vec = 1; |
712 | } |
713 | XVECEXP (x, i, j) = new_rtx; |
714 | } |
715 | } |
716 | } |
717 | |
718 | return x; |
719 | } |
720 | |
721 | /* This function is used externally in subsequent passes of GCC. It |
722 | always does a full elimination of X. */ |
723 | rtx |
724 | lra_eliminate_regs (rtx x, machine_mode mem_mode, |
725 | rtx insn ATTRIBUTE_UNUSED) |
726 | { |
727 | return lra_eliminate_regs_1 (NULL, x, mem_mode, subst_p: true, update_p: false, update_sp_offset: 0, full_p: true); |
728 | } |
729 | |
730 | /* Stack pointer offset before the current insn relative to one at the |
731 | func start. RTL insns can change SP explicitly. We keep the |
732 | changes from one insn to another through this variable. */ |
733 | static poly_int64 curr_sp_change; |
734 | |
735 | /* Scan rtx X for references to elimination source or target registers |
736 | in contexts that would prevent the elimination from happening. |
737 | Update the table of eliminables to reflect the changed state. |
738 | MEM_MODE is the mode of an enclosing MEM rtx, or VOIDmode if not |
739 | within a MEM. */ |
740 | static void |
741 | mark_not_eliminable (rtx x, machine_mode mem_mode) |
742 | { |
743 | enum rtx_code code = GET_CODE (x); |
744 | class lra_elim_table *ep; |
745 | int i, j; |
746 | const char *fmt; |
747 | poly_int64 offset = 0; |
748 | |
749 | switch (code) |
750 | { |
751 | case PRE_INC: |
752 | case POST_INC: |
753 | case PRE_DEC: |
754 | case POST_DEC: |
755 | case POST_MODIFY: |
756 | case PRE_MODIFY: |
757 | if (XEXP (x, 0) == stack_pointer_rtx |
758 | && ((code != PRE_MODIFY && code != POST_MODIFY) |
759 | || (GET_CODE (XEXP (x, 1)) == PLUS |
760 | && XEXP (x, 0) == XEXP (XEXP (x, 1), 0) |
761 | && poly_int_rtx_p (XEXP (XEXP (x, 1), 1), res: &offset)))) |
762 | { |
763 | poly_int64 size = GET_MODE_SIZE (mode: mem_mode); |
764 | |
765 | #ifdef PUSH_ROUNDING |
766 | /* If more bytes than MEM_MODE are pushed, account for |
767 | them. */ |
768 | size = PUSH_ROUNDING (size); |
769 | #endif |
770 | if (code == PRE_DEC || code == POST_DEC) |
771 | curr_sp_change -= size; |
772 | else if (code == PRE_INC || code == POST_INC) |
773 | curr_sp_change += size; |
774 | else if (code == PRE_MODIFY || code == POST_MODIFY) |
775 | curr_sp_change += offset; |
776 | } |
777 | else if (REG_P (XEXP (x, 0)) |
778 | && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER) |
779 | { |
780 | /* If we modify the source of an elimination rule, disable |
781 | it. Do the same if it is the destination and not the |
782 | hard frame register. */ |
783 | for (ep = reg_eliminate; |
784 | ep < ®_eliminate[NUM_ELIMINABLE_REGS]; |
785 | ep++) |
786 | if (ep->from_rtx == XEXP (x, 0) |
787 | || (ep->to_rtx == XEXP (x, 0) |
788 | && ep->to_rtx != hard_frame_pointer_rtx)) |
789 | setup_can_eliminate (ep, value: false); |
790 | } |
791 | return; |
792 | |
793 | case USE: |
794 | if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER) |
795 | /* If using a hard register that is the source of an eliminate |
796 | we still think can be performed, note it cannot be |
797 | performed since we don't know how this hard register is |
798 | used. */ |
799 | for (ep = reg_eliminate; |
800 | ep < ®_eliminate[NUM_ELIMINABLE_REGS]; |
801 | ep++) |
802 | if (ep->from_rtx == XEXP (x, 0) |
803 | && ep->to_rtx != hard_frame_pointer_rtx) |
804 | setup_can_eliminate (ep, value: false); |
805 | return; |
806 | |
807 | case CLOBBER: |
808 | if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER) |
809 | /* If clobbering a hard register that is the replacement |
810 | register for an elimination we still think can be |
811 | performed, note that it cannot be performed. Otherwise, we |
812 | need not be concerned about it. */ |
813 | for (ep = reg_eliminate; |
814 | ep < ®_eliminate[NUM_ELIMINABLE_REGS]; |
815 | ep++) |
816 | if (ep->to_rtx == XEXP (x, 0) |
817 | && ep->to_rtx != hard_frame_pointer_rtx) |
818 | setup_can_eliminate (ep, value: false); |
819 | return; |
820 | |
821 | case SET: |
822 | if (SET_DEST (x) == stack_pointer_rtx |
823 | && GET_CODE (SET_SRC (x)) == PLUS |
824 | && XEXP (SET_SRC (x), 0) == SET_DEST (x) |
825 | && poly_int_rtx_p (XEXP (SET_SRC (x), 1), res: &offset)) |
826 | { |
827 | curr_sp_change += offset; |
828 | return; |
829 | } |
830 | if (! REG_P (SET_DEST (x)) |
831 | || REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER) |
832 | mark_not_eliminable (SET_DEST (x), mem_mode); |
833 | else |
834 | { |
835 | /* See if this is setting the replacement hard register for |
836 | an elimination. |
837 | |
838 | If DEST is the hard frame pointer, we do nothing because |
839 | we assume that all assignments to the frame pointer are |
840 | for non-local gotos and are being done at a time when |
841 | they are valid and do not disturb anything else. Some |
842 | machines want to eliminate a fake argument pointer (or |
843 | even a fake frame pointer) with either the real frame |
844 | pointer or the stack pointer. Assignments to the hard |
845 | frame pointer must not prevent this elimination. */ |
846 | for (ep = reg_eliminate; |
847 | ep < ®_eliminate[NUM_ELIMINABLE_REGS]; |
848 | ep++) |
849 | if (ep->to_rtx == SET_DEST (x) |
850 | && SET_DEST (x) != hard_frame_pointer_rtx) |
851 | setup_can_eliminate (ep, value: false); |
852 | } |
853 | |
854 | mark_not_eliminable (SET_SRC (x), mem_mode); |
855 | return; |
856 | |
857 | case MEM: |
858 | /* Our only special processing is to pass the mode of the MEM to |
859 | our recursive call. */ |
860 | mark_not_eliminable (XEXP (x, 0), GET_MODE (x)); |
861 | return; |
862 | |
863 | default: |
864 | break; |
865 | } |
866 | |
867 | fmt = GET_RTX_FORMAT (code); |
868 | for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++) |
869 | { |
870 | if (*fmt == 'e') |
871 | mark_not_eliminable (XEXP (x, i), mem_mode); |
872 | else if (*fmt == 'E') |
873 | for (j = 0; j < XVECLEN (x, i); j++) |
874 | mark_not_eliminable (XVECEXP (x, i, j), mem_mode); |
875 | } |
876 | } |
877 | |
878 | |
879 | |
880 | /* Scan INSN and eliminate all eliminable hard registers in it. |
881 | |
882 | If REPLACE_P is true, do the replacement destructively. Also |
883 | delete the insn as dead it if it is setting an eliminable register. |
884 | |
885 | If REPLACE_P is false, just update the offsets while keeping the |
886 | base register the same. If FIRST_P, use the sp offset for |
887 | elimination to sp. Otherwise, use UPDATE_SP_OFFSET for this. If |
888 | UPDATE_SP_OFFSET is non-zero, don't use difference of the offset |
889 | and the previous offset. Attach the note about used elimination |
890 | for insns setting frame pointer to update elimination easy (without |
891 | parsing already generated elimination insns to find offset |
892 | previously used) in future. */ |
893 | |
894 | void |
895 | eliminate_regs_in_insn (rtx_insn *insn, bool replace_p, bool first_p, |
896 | poly_int64 update_sp_offset) |
897 | { |
898 | int icode = recog_memoized (insn); |
899 | rtx set, old_set = single_set (insn); |
900 | bool validate_p; |
901 | int i; |
902 | rtx substed_operand[MAX_RECOG_OPERANDS]; |
903 | rtx orig_operand[MAX_RECOG_OPERANDS]; |
904 | class lra_elim_table *ep; |
905 | rtx plus_src, plus_cst_src; |
906 | lra_insn_recog_data_t id; |
907 | struct lra_static_insn_data *static_id; |
908 | |
909 | if (icode < 0 && asm_noperands (PATTERN (insn)) < 0 && ! DEBUG_INSN_P (insn)) |
910 | { |
911 | lra_assert (GET_CODE (PATTERN (insn)) == USE |
912 | || GET_CODE (PATTERN (insn)) == CLOBBER |
913 | || GET_CODE (PATTERN (insn)) == ASM_INPUT); |
914 | return; |
915 | } |
916 | |
917 | /* We allow one special case which happens to work on all machines we |
918 | currently support: a single set with the source or a REG_EQUAL |
919 | note being a PLUS of an eliminable register and a constant. */ |
920 | plus_src = plus_cst_src = 0; |
921 | poly_int64 offset = 0; |
922 | if (old_set && REG_P (SET_DEST (old_set))) |
923 | { |
924 | if (GET_CODE (SET_SRC (old_set)) == PLUS) |
925 | plus_src = SET_SRC (old_set); |
926 | /* First see if the source is of the form (plus (...) CST). */ |
927 | if (plus_src && poly_int_rtx_p (XEXP (plus_src, 1), res: &offset)) |
928 | plus_cst_src = plus_src; |
929 | /* If we are doing initial offset computation, then utilize |
930 | eqivalences to discover a constant for the second term |
931 | of PLUS_SRC. */ |
932 | else if (plus_src && REG_P (XEXP (plus_src, 1))) |
933 | { |
934 | int regno = REGNO (XEXP (plus_src, 1)); |
935 | if (regno < ira_reg_equiv_len |
936 | && ira_reg_equiv[regno].constant != NULL_RTX |
937 | && !replace_p |
938 | && poly_int_rtx_p (x: ira_reg_equiv[regno].constant, res: &offset)) |
939 | plus_cst_src = plus_src; |
940 | } |
941 | /* Check that the first operand of the PLUS is a hard reg or |
942 | the lowpart subreg of one. */ |
943 | if (plus_cst_src) |
944 | { |
945 | rtx reg = XEXP (plus_cst_src, 0); |
946 | |
947 | if (GET_CODE (reg) == SUBREG && subreg_lowpart_p (reg)) |
948 | reg = SUBREG_REG (reg); |
949 | |
950 | if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER) |
951 | plus_cst_src = 0; |
952 | } |
953 | } |
954 | if (plus_cst_src) |
955 | { |
956 | rtx reg = XEXP (plus_cst_src, 0); |
957 | |
958 | if (GET_CODE (reg) == SUBREG) |
959 | reg = SUBREG_REG (reg); |
960 | |
961 | if (REG_P (reg) && (ep = get_elimination (reg)) != NULL) |
962 | { |
963 | rtx to_rtx = replace_p ? ep->to_rtx : ep->from_rtx; |
964 | |
965 | if (! replace_p) |
966 | { |
967 | if (known_eq (update_sp_offset, 0)) |
968 | offset += (ep->offset - ep->previous_offset); |
969 | if (ep->to_rtx == stack_pointer_rtx) |
970 | { |
971 | if (first_p) |
972 | offset -= lra_get_insn_recog_data (insn)->sp_offset; |
973 | else |
974 | offset += update_sp_offset; |
975 | } |
976 | offset = trunc_int_for_mode (offset, GET_MODE (plus_cst_src)); |
977 | } |
978 | |
979 | if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG) |
980 | to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)), to_rtx); |
981 | /* If we have a nonzero offset, and the source is already a |
982 | simple REG, the following transformation would increase |
983 | the cost of the insn by replacing a simple REG with (plus |
984 | (reg sp) CST). So try only when we already had a PLUS |
985 | before. */ |
986 | if (known_eq (offset, 0) || plus_src) |
987 | { |
988 | rtx new_src = plus_constant (GET_MODE (to_rtx), to_rtx, offset); |
989 | |
990 | old_set = single_set (insn); |
991 | |
992 | /* First see if this insn remains valid when we make the |
993 | change. If not, try to replace the whole pattern |
994 | with a simple set (this may help if the original insn |
995 | was a PARALLEL that was only recognized as single_set |
996 | due to REG_UNUSED notes). If this isn't valid |
997 | either, keep the INSN_CODE the same and let the |
998 | constraint pass fix it up. */ |
999 | if (! validate_change (insn, &SET_SRC (old_set), new_src, 0)) |
1000 | { |
1001 | rtx new_pat = gen_rtx_SET (SET_DEST (old_set), new_src); |
1002 | |
1003 | if (! validate_change (insn, &PATTERN (insn), new_pat, 0)) |
1004 | SET_SRC (old_set) = new_src; |
1005 | } |
1006 | lra_update_insn_recog_data (insn); |
1007 | /* This can't have an effect on elimination offsets, so skip |
1008 | right to the end. */ |
1009 | return; |
1010 | } |
1011 | } |
1012 | } |
1013 | |
1014 | /* Eliminate all eliminable registers occurring in operands that |
1015 | can be handled by the constraint pass. */ |
1016 | id = lra_get_insn_recog_data (insn); |
1017 | static_id = id->insn_static_data; |
1018 | validate_p = false; |
1019 | for (i = 0; i < static_id->n_operands; i++) |
1020 | { |
1021 | orig_operand[i] = *id->operand_loc[i]; |
1022 | substed_operand[i] = *id->operand_loc[i]; |
1023 | |
1024 | /* For an asm statement, every operand is eliminable. */ |
1025 | if (icode < 0 || insn_data[icode].operand[i].eliminable) |
1026 | { |
1027 | /* Check for setting a hard register that we know about. */ |
1028 | if (static_id->operand[i].type != OP_IN |
1029 | && REG_P (orig_operand[i])) |
1030 | { |
1031 | /* If we are assigning to a hard register that can be |
1032 | eliminated, it must be as part of a PARALLEL, since |
1033 | the code above handles single SETs. This reg cannot |
1034 | be longer eliminated -- it is forced by |
1035 | mark_not_eliminable. */ |
1036 | for (ep = reg_eliminate; |
1037 | ep < ®_eliminate[NUM_ELIMINABLE_REGS]; |
1038 | ep++) |
1039 | lra_assert (ep->from_rtx != orig_operand[i] |
1040 | || ! ep->can_eliminate); |
1041 | } |
1042 | |
1043 | /* Companion to the above plus substitution, we can allow |
1044 | invariants as the source of a plain move. */ |
1045 | substed_operand[i] |
1046 | = lra_eliminate_regs_1 (insn, x: *id->operand_loc[i], VOIDmode, |
1047 | subst_p: replace_p, update_p: ! replace_p && ! first_p, |
1048 | update_sp_offset, full_p: first_p); |
1049 | if (substed_operand[i] != orig_operand[i]) |
1050 | validate_p = true; |
1051 | } |
1052 | } |
1053 | |
1054 | if (! validate_p) |
1055 | return; |
1056 | |
1057 | /* Substitute the operands; the new values are in the substed_operand |
1058 | array. */ |
1059 | for (i = 0; i < static_id->n_operands; i++) |
1060 | *id->operand_loc[i] = substed_operand[i]; |
1061 | for (i = 0; i < static_id->n_dups; i++) |
1062 | *id->dup_loc[i] = substed_operand[(int) static_id->dup_num[i]]; |
1063 | |
1064 | /* Transform plus (plus (hard reg, const), pseudo) to plus (plus (pseudo, |
1065 | const), hard reg) in order to keep insn containing eliminated register |
1066 | after all reloads calculating its offset. This permits to keep register |
1067 | pressure under control and helps to avoid LRA cycling in patalogical |
1068 | cases. */ |
1069 | if (! replace_p && (set = single_set (insn)) != NULL |
1070 | && GET_CODE (SET_SRC (set)) == PLUS |
1071 | && GET_CODE (XEXP (SET_SRC (set), 0)) == PLUS) |
1072 | { |
1073 | rtx reg1, reg2, op1, op2; |
1074 | |
1075 | reg1 = op1 = XEXP (XEXP (SET_SRC (set), 0), 0); |
1076 | reg2 = op2 = XEXP (SET_SRC (set), 1); |
1077 | if (GET_CODE (reg1) == SUBREG) |
1078 | reg1 = SUBREG_REG (reg1); |
1079 | if (GET_CODE (reg2) == SUBREG) |
1080 | reg2 = SUBREG_REG (reg2); |
1081 | if (REG_P (reg1) && REG_P (reg2) |
1082 | && REGNO (reg1) < FIRST_PSEUDO_REGISTER |
1083 | && REGNO (reg2) >= FIRST_PSEUDO_REGISTER |
1084 | && GET_MODE (reg1) == Pmode |
1085 | && !have_addptr3_insn (lra_pmode_pseudo, reg1, |
1086 | XEXP (XEXP (SET_SRC (set), 0), 1))) |
1087 | { |
1088 | XEXP (XEXP (SET_SRC (set), 0), 0) = op2; |
1089 | XEXP (SET_SRC (set), 1) = op1; |
1090 | } |
1091 | } |
1092 | |
1093 | /* If we had a move insn but now we don't, re-recognize it. |
1094 | This will cause spurious re-recognition if the old move had a |
1095 | PARALLEL since the new one still will, but we can't call |
1096 | single_set without having put new body into the insn and the |
1097 | re-recognition won't hurt in this rare case. */ |
1098 | lra_update_insn_recog_data (insn); |
1099 | } |
1100 | |
1101 | /* Spill pseudos which are assigned to hard registers in SET, record them in |
1102 | SPILLED_PSEUDOS unless it is null, and return the recorded pseudos number. |
1103 | Add affected insns for processing in the subsequent constraint pass. */ |
1104 | static int |
1105 | spill_pseudos (HARD_REG_SET set, int *spilled_pseudos) |
1106 | { |
1107 | int i, n; |
1108 | bitmap_head to_process; |
1109 | rtx_insn *insn; |
1110 | |
1111 | if (hard_reg_set_empty_p (x: set)) |
1112 | return 0; |
1113 | if (lra_dump_file != NULL) |
1114 | { |
1115 | fprintf (stream: lra_dump_file, format: " Spilling non-eliminable hard regs:" ); |
1116 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
1117 | if (TEST_HARD_REG_BIT (set, bit: i)) |
1118 | fprintf (stream: lra_dump_file, format: " %d" , i); |
1119 | fprintf (stream: lra_dump_file, format: "\n" ); |
1120 | } |
1121 | bitmap_initialize (head: &to_process, obstack: ®_obstack); |
1122 | n = 0; |
1123 | for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++) |
1124 | if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0 |
1125 | && overlaps_hard_reg_set_p (regs: set, |
1126 | PSEUDO_REGNO_MODE (i), regno: reg_renumber[i])) |
1127 | { |
1128 | if (lra_dump_file != NULL) |
1129 | fprintf (stream: lra_dump_file, format: " Spilling r%d(%d)\n" , |
1130 | i, reg_renumber[i]); |
1131 | reg_renumber[i] = -1; |
1132 | if (spilled_pseudos != NULL) |
1133 | spilled_pseudos[n++] = i; |
1134 | bitmap_ior_into (&to_process, &lra_reg_info[i].insn_bitmap); |
1135 | } |
1136 | lra_no_alloc_regs |= set; |
1137 | for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn)) |
1138 | if (bitmap_bit_p (&to_process, INSN_UID (insn))) |
1139 | { |
1140 | lra_push_insn (insn); |
1141 | lra_set_used_insn_alternative (insn, LRA_UNKNOWN_ALT); |
1142 | } |
1143 | bitmap_clear (&to_process); |
1144 | return n; |
1145 | } |
1146 | |
1147 | /* Update all offsets and possibility for elimination on eliminable |
1148 | registers. Spill pseudos assigned to registers which are |
1149 | uneliminable, update LRA_NO_ALLOC_REGS and ELIMINABLE_REG_SET. Add |
1150 | insns to INSNS_WITH_CHANGED_OFFSETS containing eliminable hard |
1151 | registers whose offsets should be changed. Return true if any |
1152 | elimination offset changed. */ |
1153 | static bool |
1154 | update_reg_eliminate (bitmap insns_with_changed_offsets) |
1155 | { |
1156 | bool prev, result; |
1157 | class lra_elim_table *ep, *ep1; |
1158 | HARD_REG_SET temp_hard_reg_set; |
1159 | |
1160 | targetm.compute_frame_layout (); |
1161 | |
1162 | /* Clear self elimination offsets. */ |
1163 | for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) |
1164 | self_elim_offsets[ep->from] = 0; |
1165 | for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) |
1166 | { |
1167 | /* If it is a currently used elimination: update the previous |
1168 | offset. */ |
1169 | if (elimination_map[ep->from] == ep) |
1170 | ep->previous_offset = ep->offset; |
1171 | |
1172 | prev = ep->prev_can_eliminate; |
1173 | setup_can_eliminate (ep, value: targetm.can_eliminate (ep->from, ep->to)); |
1174 | if (ep->can_eliminate && ! prev) |
1175 | { |
1176 | /* It is possible that not eliminable register becomes |
1177 | eliminable because we took other reasons into account to |
1178 | set up eliminable regs in the initial set up. Just |
1179 | ignore new eliminable registers. */ |
1180 | setup_can_eliminate (ep, value: false); |
1181 | continue; |
1182 | } |
1183 | if (ep->can_eliminate != prev && elimination_map[ep->from] == ep) |
1184 | { |
1185 | /* We cannot use this elimination anymore -- find another |
1186 | one. */ |
1187 | if (lra_dump_file != NULL) |
1188 | fprintf (stream: lra_dump_file, |
1189 | format: " Elimination %d to %d is not possible anymore\n" , |
1190 | ep->from, ep->to); |
1191 | /* If after processing RTL we decides that SP can be used as a result |
1192 | of elimination, it cannot be changed. For frame pointer to stack |
1193 | pointer elimination the condition is a bit relaxed and we just require |
1194 | that actual elimination has not been done yet. */ |
1195 | gcc_assert (ep->to_rtx != stack_pointer_rtx |
1196 | || (ep->from == FRAME_POINTER_REGNUM |
1197 | && !elimination_fp2sp_occured_p) |
1198 | || (ep->from < FIRST_PSEUDO_REGISTER |
1199 | && fixed_regs [ep->from])); |
1200 | |
1201 | /* Mark that is not eliminable anymore. */ |
1202 | elimination_map[ep->from] = NULL; |
1203 | for (ep1 = ep + 1; ep1 < ®_eliminate[NUM_ELIMINABLE_REGS]; ep1++) |
1204 | if (ep1->can_eliminate && ep1->from == ep->from) |
1205 | break; |
1206 | if (ep1 < ®_eliminate[NUM_ELIMINABLE_REGS]) |
1207 | { |
1208 | if (lra_dump_file != NULL) |
1209 | fprintf (stream: lra_dump_file, format: " Using elimination %d to %d now\n" , |
1210 | ep1->from, ep1->to); |
1211 | lra_assert (known_eq (ep1->previous_offset, 0)); |
1212 | ep1->previous_offset = ep->offset; |
1213 | } |
1214 | else |
1215 | { |
1216 | /* There is no elimination anymore just use the hard |
1217 | register `from' itself. Setup self elimination |
1218 | offset to restore the original offset values. */ |
1219 | if (lra_dump_file != NULL) |
1220 | fprintf (stream: lra_dump_file, format: " %d is not eliminable at all\n" , |
1221 | ep->from); |
1222 | self_elim_offsets[ep->from] = -ep->offset; |
1223 | if (maybe_ne (a: ep->offset, b: 0)) |
1224 | bitmap_ior_into (insns_with_changed_offsets, |
1225 | &lra_reg_info[ep->from].insn_bitmap); |
1226 | } |
1227 | } |
1228 | |
1229 | INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, ep->offset); |
1230 | } |
1231 | setup_elimination_map (); |
1232 | result = false; |
1233 | CLEAR_HARD_REG_SET (set&: temp_hard_reg_set); |
1234 | for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) |
1235 | if (elimination_map[ep->from] == NULL) |
1236 | add_to_hard_reg_set (regs: &temp_hard_reg_set, Pmode, regno: ep->from); |
1237 | else if (elimination_map[ep->from] == ep) |
1238 | { |
1239 | /* Prevent the hard register into which we eliminate from |
1240 | the usage for pseudos. */ |
1241 | if (ep->from != ep->to) |
1242 | add_to_hard_reg_set (regs: &temp_hard_reg_set, Pmode, regno: ep->to); |
1243 | if (maybe_ne (a: ep->previous_offset, b: ep->offset)) |
1244 | { |
1245 | bitmap_ior_into (insns_with_changed_offsets, |
1246 | &lra_reg_info[ep->from].insn_bitmap); |
1247 | |
1248 | /* Update offset when the eliminate offset have been |
1249 | changed. */ |
1250 | lra_update_reg_val_offset (val: lra_reg_info[ep->from].val, |
1251 | incr: ep->offset - ep->previous_offset); |
1252 | result = true; |
1253 | } |
1254 | } |
1255 | lra_no_alloc_regs |= temp_hard_reg_set; |
1256 | eliminable_regset &= ~temp_hard_reg_set; |
1257 | spill_pseudos (set: temp_hard_reg_set, NULL); |
1258 | return result; |
1259 | } |
1260 | |
1261 | /* Initialize the table of hard registers to eliminate. |
1262 | Pre-condition: global flag frame_pointer_needed has been set before |
1263 | calling this function. */ |
1264 | static void |
1265 | init_elim_table (void) |
1266 | { |
1267 | class lra_elim_table *ep; |
1268 | bool value_p; |
1269 | const struct elim_table_1 *ep1; |
1270 | |
1271 | if (!reg_eliminate) |
1272 | reg_eliminate = XCNEWVEC (class lra_elim_table, NUM_ELIMINABLE_REGS); |
1273 | |
1274 | memset (s: self_elim_offsets, c: 0, n: sizeof (self_elim_offsets)); |
1275 | /* Initiate member values which will be never changed. */ |
1276 | self_elim_table.can_eliminate = self_elim_table.prev_can_eliminate = true; |
1277 | self_elim_table.previous_offset = 0; |
1278 | |
1279 | for (ep = reg_eliminate, ep1 = reg_eliminate_1; |
1280 | ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++, ep1++) |
1281 | { |
1282 | ep->offset = ep->previous_offset = 0; |
1283 | ep->from = ep1->from; |
1284 | ep->to = ep1->to; |
1285 | value_p = (targetm.can_eliminate (ep->from, ep->to) |
1286 | && ! (ep->to == STACK_POINTER_REGNUM |
1287 | && frame_pointer_needed |
1288 | && (! SUPPORTS_STACK_ALIGNMENT |
1289 | || ! stack_realign_fp))); |
1290 | setup_can_eliminate (ep, value: value_p); |
1291 | } |
1292 | |
1293 | /* Build the FROM and TO REG rtx's. Note that code in gen_rtx_REG |
1294 | will cause, e.g., gen_rtx_REG (Pmode, STACK_POINTER_REGNUM) to |
1295 | equal stack_pointer_rtx. We depend on this. Threfore we switch |
1296 | off that we are in LRA temporarily. */ |
1297 | lra_in_progress = false; |
1298 | for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) |
1299 | { |
1300 | ep->from_rtx = gen_rtx_REG (Pmode, ep->from); |
1301 | ep->to_rtx = gen_rtx_REG (Pmode, ep->to); |
1302 | eliminable_reg_rtx[ep->from] = ep->from_rtx; |
1303 | } |
1304 | lra_in_progress = true; |
1305 | } |
1306 | |
1307 | /* Function for initialization of elimination once per function. It |
1308 | sets up sp offset for each insn. */ |
1309 | static void |
1310 | init_elimination (void) |
1311 | { |
1312 | bool stop_to_sp_elimination_p; |
1313 | basic_block bb; |
1314 | rtx_insn *insn; |
1315 | class lra_elim_table *ep; |
1316 | |
1317 | init_elim_table (); |
1318 | FOR_EACH_BB_FN (bb, cfun) |
1319 | { |
1320 | curr_sp_change = 0; |
1321 | stop_to_sp_elimination_p = false; |
1322 | FOR_BB_INSNS (bb, insn) |
1323 | if (INSN_P (insn)) |
1324 | { |
1325 | lra_get_insn_recog_data (insn)->sp_offset = curr_sp_change; |
1326 | if (NONDEBUG_INSN_P (insn)) |
1327 | { |
1328 | mark_not_eliminable (x: PATTERN (insn), VOIDmode); |
1329 | if (maybe_ne (a: curr_sp_change, b: 0) |
1330 | && find_reg_note (insn, REG_LABEL_OPERAND, NULL_RTX)) |
1331 | stop_to_sp_elimination_p = true; |
1332 | } |
1333 | } |
1334 | if (! frame_pointer_needed |
1335 | && (maybe_ne (a: curr_sp_change, b: 0) || stop_to_sp_elimination_p) |
1336 | && bb->succs && bb->succs->length () != 0) |
1337 | for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) |
1338 | if (ep->to == STACK_POINTER_REGNUM) |
1339 | setup_can_eliminate (ep, value: false); |
1340 | } |
1341 | setup_elimination_map (); |
1342 | } |
1343 | |
1344 | /* Update and return stack pointer OFFSET after processing X. */ |
1345 | poly_int64 |
1346 | lra_update_sp_offset (rtx x, poly_int64 offset) |
1347 | { |
1348 | curr_sp_change = offset; |
1349 | mark_not_eliminable (x, VOIDmode); |
1350 | return curr_sp_change; |
1351 | } |
1352 | |
1353 | |
1354 | /* Eliminate hard reg given by its location LOC. */ |
1355 | void |
1356 | lra_eliminate_reg_if_possible (rtx *loc) |
1357 | { |
1358 | int regno; |
1359 | class lra_elim_table *ep; |
1360 | |
1361 | lra_assert (REG_P (*loc)); |
1362 | if ((regno = REGNO (*loc)) >= FIRST_PSEUDO_REGISTER |
1363 | || ! TEST_HARD_REG_BIT (set: lra_no_alloc_regs, bit: regno)) |
1364 | return; |
1365 | if ((ep = get_elimination (reg: *loc)) != NULL) |
1366 | *loc = ep->to_rtx; |
1367 | } |
1368 | |
1369 | /* Do (final if FINAL_P or first if FIRST_P) elimination in INSN. Add |
1370 | the insn for subsequent processing in the constraint pass, update |
1371 | the insn info. */ |
1372 | static void |
1373 | process_insn_for_elimination (rtx_insn *insn, bool final_p, bool first_p) |
1374 | { |
1375 | eliminate_regs_in_insn (insn, replace_p: final_p, first_p, update_sp_offset: 0); |
1376 | if (! final_p) |
1377 | { |
1378 | /* Check that insn changed its code. This is a case when a move |
1379 | insn becomes an add insn and we do not want to process the |
1380 | insn as a move anymore. */ |
1381 | int icode = recog (PATTERN (insn), insn, 0); |
1382 | |
1383 | if (icode >= 0 && icode != INSN_CODE (insn)) |
1384 | { |
1385 | if (INSN_CODE (insn) >= 0) |
1386 | /* Insn code is changed. It may change its operand type |
1387 | from IN to INOUT. Inform the subsequent assignment |
1388 | subpass about this situation. */ |
1389 | check_and_force_assignment_correctness_p = true; |
1390 | INSN_CODE (insn) = icode; |
1391 | lra_update_insn_recog_data (insn); |
1392 | } |
1393 | lra_update_insn_regno_info (insn); |
1394 | lra_push_insn (insn); |
1395 | lra_set_used_insn_alternative (insn, LRA_UNKNOWN_ALT); |
1396 | } |
1397 | } |
1398 | |
1399 | /* Update frame pointer to stack pointer elimination if we started with |
1400 | permitted frame pointer elimination and now target reports that we can not |
1401 | do this elimination anymore. Record spilled pseudos in SPILLED_PSEUDOS |
1402 | unless it is null, and return the recorded pseudos number. */ |
1403 | int |
1404 | lra_update_fp2sp_elimination (int *spilled_pseudos) |
1405 | { |
1406 | int n; |
1407 | HARD_REG_SET set; |
1408 | class lra_elim_table *ep; |
1409 | |
1410 | if (frame_pointer_needed || !targetm.frame_pointer_required ()) |
1411 | return 0; |
1412 | gcc_assert (!elimination_fp2sp_occured_p); |
1413 | if (lra_dump_file != NULL) |
1414 | fprintf (stream: lra_dump_file, |
1415 | format: " Frame pointer can not be eliminated anymore\n" ); |
1416 | frame_pointer_needed = true; |
1417 | CLEAR_HARD_REG_SET (set); |
1418 | add_to_hard_reg_set (regs: &set, Pmode, HARD_FRAME_POINTER_REGNUM); |
1419 | n = spill_pseudos (set, spilled_pseudos); |
1420 | for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) |
1421 | if (ep->from == FRAME_POINTER_REGNUM && ep->to == STACK_POINTER_REGNUM) |
1422 | setup_can_eliminate (ep, value: false); |
1423 | return n; |
1424 | } |
1425 | |
1426 | /* Entry function to do final elimination if FINAL_P or to update |
1427 | elimination register offsets (FIRST_P if we are doing it the first |
1428 | time). */ |
1429 | void |
1430 | lra_eliminate (bool final_p, bool first_p) |
1431 | { |
1432 | unsigned int uid; |
1433 | bitmap_head insns_with_changed_offsets; |
1434 | bitmap_iterator bi; |
1435 | class lra_elim_table *ep; |
1436 | |
1437 | gcc_assert (! final_p || ! first_p); |
1438 | |
1439 | timevar_push (tv: TV_LRA_ELIMINATE); |
1440 | |
1441 | if (first_p) |
1442 | { |
1443 | elimination_fp2sp_occured_p = false; |
1444 | init_elimination (); |
1445 | } |
1446 | |
1447 | bitmap_initialize (head: &insns_with_changed_offsets, obstack: ®_obstack); |
1448 | if (final_p) |
1449 | { |
1450 | if (flag_checking) |
1451 | { |
1452 | update_reg_eliminate (insns_with_changed_offsets: &insns_with_changed_offsets); |
1453 | gcc_assert (bitmap_empty_p (&insns_with_changed_offsets)); |
1454 | } |
1455 | /* We change eliminable hard registers in insns so we should do |
1456 | this for all insns containing any eliminable hard |
1457 | register. */ |
1458 | for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) |
1459 | if (elimination_map[ep->from] != NULL) |
1460 | bitmap_ior_into (&insns_with_changed_offsets, |
1461 | &lra_reg_info[ep->from].insn_bitmap); |
1462 | } |
1463 | else if (! update_reg_eliminate (insns_with_changed_offsets: &insns_with_changed_offsets)) |
1464 | goto lra_eliminate_done; |
1465 | if (lra_dump_file != NULL) |
1466 | { |
1467 | fprintf (stream: lra_dump_file, format: "New elimination table:\n" ); |
1468 | print_elim_table (f: lra_dump_file); |
1469 | } |
1470 | EXECUTE_IF_SET_IN_BITMAP (&insns_with_changed_offsets, 0, uid, bi) |
1471 | /* A dead insn can be deleted in process_insn_for_elimination. */ |
1472 | if (lra_insn_recog_data[uid] != NULL) |
1473 | process_insn_for_elimination (insn: lra_insn_recog_data[uid]->insn, |
1474 | final_p, first_p); |
1475 | bitmap_clear (&insns_with_changed_offsets); |
1476 | |
1477 | lra_eliminate_done: |
1478 | timevar_pop (tv: TV_LRA_ELIMINATE); |
1479 | } |
1480 | |