1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * linux/arch/alpha/kernel/setup.c |
4 | * |
5 | * Copyright (C) 1995 Linus Torvalds |
6 | */ |
7 | |
8 | /* 2.3.x bootmem, 1999 Andrea Arcangeli <andrea@suse.de> */ |
9 | |
10 | /* |
11 | * Bootup setup stuff. |
12 | */ |
13 | |
14 | #include <linux/sched.h> |
15 | #include <linux/kernel.h> |
16 | #include <linux/mm.h> |
17 | #include <linux/stddef.h> |
18 | #include <linux/unistd.h> |
19 | #include <linux/ptrace.h> |
20 | #include <linux/slab.h> |
21 | #include <linux/user.h> |
22 | #include <linux/screen_info.h> |
23 | #include <linux/delay.h> |
24 | #include <linux/mc146818rtc.h> |
25 | #include <linux/console.h> |
26 | #include <linux/cpu.h> |
27 | #include <linux/errno.h> |
28 | #include <linux/init.h> |
29 | #include <linux/string.h> |
30 | #include <linux/ioport.h> |
31 | #include <linux/panic_notifier.h> |
32 | #include <linux/platform_device.h> |
33 | #include <linux/memblock.h> |
34 | #include <linux/pci.h> |
35 | #include <linux/seq_file.h> |
36 | #include <linux/root_dev.h> |
37 | #include <linux/initrd.h> |
38 | #include <linux/eisa.h> |
39 | #include <linux/pfn.h> |
40 | #ifdef CONFIG_MAGIC_SYSRQ |
41 | #include <linux/sysrq.h> |
42 | #include <linux/reboot.h> |
43 | #endif |
44 | #include <linux/notifier.h> |
45 | #include <asm/setup.h> |
46 | #include <asm/io.h> |
47 | #include <linux/log2.h> |
48 | #include <linux/export.h> |
49 | |
50 | static int alpha_panic_event(struct notifier_block *, unsigned long, void *); |
51 | static struct notifier_block alpha_panic_block = { |
52 | alpha_panic_event, |
53 | NULL, |
54 | INT_MAX /* try to do it first */ |
55 | }; |
56 | |
57 | #include <linux/uaccess.h> |
58 | #include <asm/hwrpb.h> |
59 | #include <asm/dma.h> |
60 | #include <asm/mmu_context.h> |
61 | #include <asm/console.h> |
62 | |
63 | #include "proto.h" |
64 | #include "pci_impl.h" |
65 | |
66 | |
67 | struct hwrpb_struct *hwrpb; |
68 | EXPORT_SYMBOL(hwrpb); |
69 | unsigned long srm_hae; |
70 | |
71 | int alpha_l1i_cacheshape; |
72 | int alpha_l1d_cacheshape; |
73 | int alpha_l2_cacheshape; |
74 | int alpha_l3_cacheshape; |
75 | |
76 | #ifdef CONFIG_VERBOSE_MCHECK |
77 | /* 0=minimum, 1=verbose, 2=all */ |
78 | /* These can be overridden via the command line, ie "verbose_mcheck=2") */ |
79 | unsigned long alpha_verbose_mcheck = CONFIG_VERBOSE_MCHECK_ON; |
80 | #endif |
81 | |
82 | /* Which processor we booted from. */ |
83 | int boot_cpuid; |
84 | |
85 | /* |
86 | * Using SRM callbacks for initial console output. This works from |
87 | * setup_arch() time through the end of time_init(), as those places |
88 | * are under our (Alpha) control. |
89 | |
90 | * "srmcons" specified in the boot command arguments allows us to |
91 | * see kernel messages during the period of time before the true |
92 | * console device is "registered" during console_init(). |
93 | * As of this version (2.5.59), console_init() will call |
94 | * disable_early_printk() as the last action before initializing |
95 | * the console drivers. That's the last possible time srmcons can be |
96 | * unregistered without interfering with console behavior. |
97 | * |
98 | * By default, OFF; set it with a bootcommand arg of "srmcons" or |
99 | * "console=srm". The meaning of these two args is: |
100 | * "srmcons" - early callback prints |
101 | * "console=srm" - full callback based console, including early prints |
102 | */ |
103 | int srmcons_output = 0; |
104 | |
105 | /* Enforce a memory size limit; useful for testing. By default, none. */ |
106 | unsigned long mem_size_limit = 0; |
107 | |
108 | /* Set AGP GART window size (0 means disabled). */ |
109 | unsigned long alpha_agpgart_size = DEFAULT_AGP_APER_SIZE; |
110 | |
111 | #ifdef CONFIG_ALPHA_GENERIC |
112 | struct alpha_machine_vector alpha_mv; |
113 | EXPORT_SYMBOL(alpha_mv); |
114 | #endif |
115 | |
116 | #ifndef alpha_using_srm |
117 | int alpha_using_srm; |
118 | EXPORT_SYMBOL(alpha_using_srm); |
119 | #endif |
120 | |
121 | #ifndef alpha_using_qemu |
122 | int alpha_using_qemu; |
123 | #endif |
124 | |
125 | static struct alpha_machine_vector *get_sysvec(unsigned long, unsigned long, |
126 | unsigned long); |
127 | static struct alpha_machine_vector *get_sysvec_byname(const char *); |
128 | static void get_sysnames(unsigned long, unsigned long, unsigned long, |
129 | char **, char **); |
130 | static void determine_cpu_caches (unsigned int); |
131 | |
132 | static char __initdata command_line[COMMAND_LINE_SIZE]; |
133 | |
134 | #ifdef CONFIG_VGA_CONSOLE |
135 | /* |
136 | * The format of "screen_info" is strange, and due to early |
137 | * i386-setup code. This is just enough to make the console |
138 | * code think we're on a VGA color display. |
139 | */ |
140 | |
141 | struct screen_info vgacon_screen_info = { |
142 | .orig_x = 0, |
143 | .orig_y = 25, |
144 | .orig_video_cols = 80, |
145 | .orig_video_lines = 25, |
146 | .orig_video_isVGA = 1, |
147 | .orig_video_points = 16 |
148 | }; |
149 | #endif |
150 | |
151 | /* |
152 | * The direct map I/O window, if any. This should be the same |
153 | * for all busses, since it's used by virt_to_bus. |
154 | */ |
155 | |
156 | unsigned long __direct_map_base; |
157 | unsigned long __direct_map_size; |
158 | EXPORT_SYMBOL(__direct_map_base); |
159 | EXPORT_SYMBOL(__direct_map_size); |
160 | |
161 | /* |
162 | * Declare all of the machine vectors. |
163 | */ |
164 | |
165 | /* GCC 2.7.2 (on alpha at least) is lame. It does not support either |
166 | __attribute__((weak)) or #pragma weak. Bypass it and talk directly |
167 | to the assembler. */ |
168 | |
169 | #define WEAK(X) \ |
170 | extern struct alpha_machine_vector X; \ |
171 | asm(".weak "#X) |
172 | |
173 | WEAK(alcor_mv); |
174 | WEAK(alphabook1_mv); |
175 | WEAK(avanti_mv); |
176 | WEAK(cabriolet_mv); |
177 | WEAK(clipper_mv); |
178 | WEAK(dp264_mv); |
179 | WEAK(eb164_mv); |
180 | WEAK(eb64p_mv); |
181 | WEAK(eb66_mv); |
182 | WEAK(eb66p_mv); |
183 | WEAK(eiger_mv); |
184 | WEAK(jensen_mv); |
185 | WEAK(lx164_mv); |
186 | WEAK(lynx_mv); |
187 | WEAK(marvel_ev7_mv); |
188 | WEAK(miata_mv); |
189 | WEAK(mikasa_mv); |
190 | WEAK(mikasa_primo_mv); |
191 | WEAK(monet_mv); |
192 | WEAK(nautilus_mv); |
193 | WEAK(noname_mv); |
194 | WEAK(noritake_mv); |
195 | WEAK(noritake_primo_mv); |
196 | WEAK(p2k_mv); |
197 | WEAK(pc164_mv); |
198 | WEAK(privateer_mv); |
199 | WEAK(rawhide_mv); |
200 | WEAK(ruffian_mv); |
201 | WEAK(rx164_mv); |
202 | WEAK(sable_mv); |
203 | WEAK(sable_gamma_mv); |
204 | WEAK(shark_mv); |
205 | WEAK(sx164_mv); |
206 | WEAK(takara_mv); |
207 | WEAK(titan_mv); |
208 | WEAK(webbrick_mv); |
209 | WEAK(wildfire_mv); |
210 | WEAK(xl_mv); |
211 | WEAK(xlt_mv); |
212 | |
213 | #undef WEAK |
214 | |
215 | /* |
216 | * I/O resources inherited from PeeCees. Except for perhaps the |
217 | * turbochannel alphas, everyone has these on some sort of SuperIO chip. |
218 | * |
219 | * ??? If this becomes less standard, move the struct out into the |
220 | * machine vector. |
221 | */ |
222 | |
223 | static void __init |
224 | reserve_std_resources(void) |
225 | { |
226 | static struct resource standard_io_resources[] = { |
227 | { .name = "rtc" , .start = -1, .end = -1 }, |
228 | { .name = "dma1" , .start = 0x00, .end = 0x1f }, |
229 | { .name = "pic1" , .start = 0x20, .end = 0x3f }, |
230 | { .name = "timer" , .start = 0x40, .end = 0x5f }, |
231 | { .name = "keyboard" , .start = 0x60, .end = 0x6f }, |
232 | { .name = "dma page reg" , .start = 0x80, .end = 0x8f }, |
233 | { .name = "pic2" , .start = 0xa0, .end = 0xbf }, |
234 | { .name = "dma2" , .start = 0xc0, .end = 0xdf }, |
235 | }; |
236 | |
237 | struct resource *io = &ioport_resource; |
238 | size_t i; |
239 | |
240 | if (hose_head) { |
241 | struct pci_controller *hose; |
242 | for (hose = hose_head; hose; hose = hose->next) |
243 | if (hose->index == 0) { |
244 | io = hose->io_space; |
245 | break; |
246 | } |
247 | } |
248 | |
249 | /* Fix up for the Jensen's queer RTC placement. */ |
250 | standard_io_resources[0].start = RTC_PORT(0); |
251 | standard_io_resources[0].end = RTC_PORT(0) + 0x0f; |
252 | |
253 | for (i = 0; i < ARRAY_SIZE(standard_io_resources); ++i) |
254 | request_resource(root: io, new: standard_io_resources+i); |
255 | } |
256 | |
257 | #define PFN_MAX PFN_DOWN(0x80000000) |
258 | #define for_each_mem_cluster(memdesc, _cluster, i) \ |
259 | for ((_cluster) = (memdesc)->cluster, (i) = 0; \ |
260 | (i) < (memdesc)->numclusters; (i)++, (_cluster)++) |
261 | |
262 | static unsigned long __init |
263 | get_mem_size_limit(char *s) |
264 | { |
265 | unsigned long end = 0; |
266 | char *from = s; |
267 | |
268 | end = simple_strtoul(from, &from, 0); |
269 | if ( *from == 'K' || *from == 'k' ) { |
270 | end = end << 10; |
271 | from++; |
272 | } else if ( *from == 'M' || *from == 'm' ) { |
273 | end = end << 20; |
274 | from++; |
275 | } else if ( *from == 'G' || *from == 'g' ) { |
276 | end = end << 30; |
277 | from++; |
278 | } |
279 | return end >> PAGE_SHIFT; /* Return the PFN of the limit. */ |
280 | } |
281 | |
282 | #ifdef CONFIG_BLK_DEV_INITRD |
283 | void * __init |
284 | move_initrd(unsigned long mem_limit) |
285 | { |
286 | void *start; |
287 | unsigned long size; |
288 | |
289 | size = initrd_end - initrd_start; |
290 | start = memblock_alloc(PAGE_ALIGN(size), PAGE_SIZE); |
291 | if (!start || __pa(start) + size > mem_limit) { |
292 | initrd_start = initrd_end = 0; |
293 | return NULL; |
294 | } |
295 | memmove(start, (void *)initrd_start, size); |
296 | initrd_start = (unsigned long)start; |
297 | initrd_end = initrd_start + size; |
298 | printk("initrd moved to %p\n" , start); |
299 | return start; |
300 | } |
301 | #endif |
302 | |
303 | static void __init |
304 | setup_memory(void *kernel_end) |
305 | { |
306 | struct memclust_struct * cluster; |
307 | struct memdesc_struct * memdesc; |
308 | unsigned long kernel_size; |
309 | unsigned long i; |
310 | |
311 | /* Find free clusters, and init and free the bootmem accordingly. */ |
312 | memdesc = (struct memdesc_struct *) |
313 | (hwrpb->mddt_offset + (unsigned long) hwrpb); |
314 | |
315 | for_each_mem_cluster(memdesc, cluster, i) { |
316 | unsigned long end; |
317 | |
318 | printk("memcluster %lu, usage %01lx, start %8lu, end %8lu\n" , |
319 | i, cluster->usage, cluster->start_pfn, |
320 | cluster->start_pfn + cluster->numpages); |
321 | |
322 | end = cluster->start_pfn + cluster->numpages; |
323 | if (end > max_low_pfn) |
324 | max_low_pfn = end; |
325 | |
326 | memblock_add(PFN_PHYS(cluster->start_pfn), |
327 | size: cluster->numpages << PAGE_SHIFT); |
328 | |
329 | /* Bit 0 is console/PALcode reserved. Bit 1 is |
330 | non-volatile memory -- we might want to mark |
331 | this for later. */ |
332 | if (cluster->usage & 3) |
333 | memblock_reserve(PFN_PHYS(cluster->start_pfn), |
334 | size: cluster->numpages << PAGE_SHIFT); |
335 | } |
336 | |
337 | /* |
338 | * Except for the NUMA systems (wildfire, marvel) all of the |
339 | * Alpha systems we run on support 32GB of memory or less. |
340 | * Since the NUMA systems introduce large holes in memory addressing, |
341 | * we can get into a situation where there is not enough contiguous |
342 | * memory for the memory map. |
343 | * |
344 | * Limit memory to the first 32GB to limit the NUMA systems to |
345 | * memory on their first node (wildfire) or 2 (marvel) to avoid |
346 | * not being able to produce the memory map. In order to access |
347 | * all of the memory on the NUMA systems, build with discontiguous |
348 | * memory support. |
349 | * |
350 | * If the user specified a memory limit, let that memory limit stand. |
351 | */ |
352 | if (!mem_size_limit) |
353 | mem_size_limit = (32ul * 1024 * 1024 * 1024) >> PAGE_SHIFT; |
354 | |
355 | if (mem_size_limit && max_low_pfn >= mem_size_limit) |
356 | { |
357 | printk("setup: forcing memory size to %ldK (from %ldK).\n" , |
358 | mem_size_limit << (PAGE_SHIFT - 10), |
359 | max_low_pfn << (PAGE_SHIFT - 10)); |
360 | max_low_pfn = mem_size_limit; |
361 | } |
362 | |
363 | /* Reserve the kernel memory. */ |
364 | kernel_size = virt_to_phys(address: kernel_end) - KERNEL_START_PHYS; |
365 | memblock_reserve(base: KERNEL_START_PHYS, size: kernel_size); |
366 | |
367 | #ifdef CONFIG_BLK_DEV_INITRD |
368 | initrd_start = INITRD_START; |
369 | if (initrd_start) { |
370 | initrd_end = initrd_start+INITRD_SIZE; |
371 | printk("Initial ramdisk at: 0x%p (%lu bytes)\n" , |
372 | (void *) initrd_start, INITRD_SIZE); |
373 | |
374 | if ((void *)initrd_end > phys_to_virt(PFN_PHYS(max_low_pfn))) { |
375 | if (!move_initrd(PFN_PHYS(max_low_pfn))) |
376 | printk("initrd extends beyond end of memory " |
377 | "(0x%08lx > 0x%p)\ndisabling initrd\n" , |
378 | initrd_end, |
379 | phys_to_virt(PFN_PHYS(max_low_pfn))); |
380 | } else { |
381 | memblock_reserve(virt_to_phys(address: (void *)initrd_start), |
382 | size: INITRD_SIZE); |
383 | } |
384 | } |
385 | #endif /* CONFIG_BLK_DEV_INITRD */ |
386 | } |
387 | |
388 | int page_is_ram(unsigned long pfn) |
389 | { |
390 | struct memclust_struct * cluster; |
391 | struct memdesc_struct * memdesc; |
392 | unsigned long i; |
393 | |
394 | memdesc = (struct memdesc_struct *) |
395 | (hwrpb->mddt_offset + (unsigned long) hwrpb); |
396 | for_each_mem_cluster(memdesc, cluster, i) |
397 | { |
398 | if (pfn >= cluster->start_pfn && |
399 | pfn < cluster->start_pfn + cluster->numpages) { |
400 | return (cluster->usage & 3) ? 0 : 1; |
401 | } |
402 | } |
403 | |
404 | return 0; |
405 | } |
406 | |
407 | static int __init |
408 | register_cpus(void) |
409 | { |
410 | int i; |
411 | |
412 | for_each_possible_cpu(i) { |
413 | struct cpu *p = kzalloc(size: sizeof(*p), GFP_KERNEL); |
414 | if (!p) |
415 | return -ENOMEM; |
416 | register_cpu(cpu: p, num: i); |
417 | } |
418 | return 0; |
419 | } |
420 | |
421 | arch_initcall(register_cpus); |
422 | |
423 | #ifdef CONFIG_MAGIC_SYSRQ |
424 | static void sysrq_reboot_handler(u8 unused) |
425 | { |
426 | machine_halt(); |
427 | } |
428 | |
429 | static const struct sysrq_key_op srm_sysrq_reboot_op = { |
430 | .handler = sysrq_reboot_handler, |
431 | .help_msg = "reboot(b)" , |
432 | .action_msg = "Resetting" , |
433 | .enable_mask = SYSRQ_ENABLE_BOOT, |
434 | }; |
435 | #endif |
436 | |
437 | void __init |
438 | setup_arch(char **cmdline_p) |
439 | { |
440 | extern char _end[]; |
441 | |
442 | struct alpha_machine_vector *vec = NULL; |
443 | struct percpu_struct *cpu; |
444 | char *type_name, *var_name, *p; |
445 | void *kernel_end = _end; /* end of kernel */ |
446 | char *args = command_line; |
447 | |
448 | hwrpb = (struct hwrpb_struct*) __va(INIT_HWRPB->phys_addr); |
449 | boot_cpuid = hard_smp_processor_id(); |
450 | |
451 | /* |
452 | * Pre-process the system type to make sure it will be valid. |
453 | * |
454 | * This may restore real CABRIO and EB66+ family names, ie |
455 | * EB64+ and EB66. |
456 | * |
457 | * Oh, and "white box" AS800 (aka DIGITAL Server 3000 series) |
458 | * and AS1200 (DIGITAL Server 5000 series) have the type as |
459 | * the negative of the real one. |
460 | */ |
461 | if ((long)hwrpb->sys_type < 0) { |
462 | hwrpb->sys_type = -((long)hwrpb->sys_type); |
463 | hwrpb_update_checksum(hwrpb); |
464 | } |
465 | |
466 | /* Register a call for panic conditions. */ |
467 | atomic_notifier_chain_register(nh: &panic_notifier_list, |
468 | nb: &alpha_panic_block); |
469 | |
470 | #ifndef alpha_using_srm |
471 | /* Assume that we've booted from SRM if we haven't booted from MILO. |
472 | Detect the later by looking for "MILO" in the system serial nr. */ |
473 | alpha_using_srm = !str_has_prefix(str: (const char *)hwrpb->ssn, prefix: "MILO" ); |
474 | #endif |
475 | #ifndef alpha_using_qemu |
476 | /* Similarly, look for QEMU. */ |
477 | alpha_using_qemu = strstr((const char *)hwrpb->ssn, "QEMU" ) != 0; |
478 | #endif |
479 | |
480 | /* If we are using SRM, we want to allow callbacks |
481 | as early as possible, so do this NOW, and then |
482 | they should work immediately thereafter. |
483 | */ |
484 | kernel_end = callback_init(kernel_end); |
485 | |
486 | /* |
487 | * Locate the command line. |
488 | */ |
489 | /* Hack for Jensen... since we're restricted to 8 or 16 chars for |
490 | boot flags depending on the boot mode, we need some shorthand. |
491 | This should do for installation. */ |
492 | if (strcmp(COMMAND_LINE, "INSTALL" ) == 0) { |
493 | strscpy(p: command_line, q: "root=/dev/fd0 load_ramdisk=1" , size: sizeof(command_line)); |
494 | } else { |
495 | strscpy(command_line, COMMAND_LINE, sizeof(command_line)); |
496 | } |
497 | strcpy(p: boot_command_line, q: command_line); |
498 | *cmdline_p = command_line; |
499 | |
500 | /* |
501 | * Process command-line arguments. |
502 | */ |
503 | while ((p = strsep(&args, " \t" )) != NULL) { |
504 | if (!*p) continue; |
505 | if (strncmp(p, "alpha_mv=" , 9) == 0) { |
506 | vec = get_sysvec_byname(p+9); |
507 | continue; |
508 | } |
509 | if (strncmp(p, "cycle=" , 6) == 0) { |
510 | est_cycle_freq = simple_strtol(p+6, NULL, 0); |
511 | continue; |
512 | } |
513 | if (strncmp(p, "mem=" , 4) == 0) { |
514 | mem_size_limit = get_mem_size_limit(s: p+4); |
515 | continue; |
516 | } |
517 | if (strncmp(p, "srmcons" , 7) == 0) { |
518 | srmcons_output |= 1; |
519 | continue; |
520 | } |
521 | if (strncmp(p, "console=srm" , 11) == 0) { |
522 | srmcons_output |= 2; |
523 | continue; |
524 | } |
525 | if (strncmp(p, "gartsize=" , 9) == 0) { |
526 | alpha_agpgart_size = |
527 | get_mem_size_limit(s: p+9) << PAGE_SHIFT; |
528 | continue; |
529 | } |
530 | #ifdef CONFIG_VERBOSE_MCHECK |
531 | if (strncmp(p, "verbose_mcheck=" , 15) == 0) { |
532 | alpha_verbose_mcheck = simple_strtol(p+15, NULL, 0); |
533 | continue; |
534 | } |
535 | #endif |
536 | } |
537 | |
538 | /* Replace the command line, now that we've killed it with strsep. */ |
539 | strcpy(p: command_line, q: boot_command_line); |
540 | |
541 | /* If we want SRM console printk echoing early, do it now. */ |
542 | if (alpha_using_srm && srmcons_output) { |
543 | register_srm_console(); |
544 | |
545 | /* |
546 | * If "console=srm" was specified, clear the srmcons_output |
547 | * flag now so that time.c won't unregister_srm_console |
548 | */ |
549 | if (srmcons_output & 2) |
550 | srmcons_output = 0; |
551 | } |
552 | |
553 | #ifdef CONFIG_MAGIC_SYSRQ |
554 | /* If we're using SRM, make sysrq-b halt back to the prom, |
555 | not auto-reboot. */ |
556 | if (alpha_using_srm) { |
557 | unregister_sysrq_key(key: 'b', op: __sysrq_reboot_op); |
558 | register_sysrq_key(key: 'b', op: &srm_sysrq_reboot_op); |
559 | } |
560 | #endif |
561 | |
562 | /* |
563 | * Identify and reconfigure for the current system. |
564 | */ |
565 | cpu = (struct percpu_struct*)((char*)hwrpb + hwrpb->processor_offset); |
566 | |
567 | get_sysnames(hwrpb->sys_type, hwrpb->sys_variation, |
568 | cpu->type, &type_name, &var_name); |
569 | if (*var_name == '0') |
570 | var_name = "" ; |
571 | |
572 | if (!vec) { |
573 | vec = get_sysvec(hwrpb->sys_type, hwrpb->sys_variation, |
574 | cpu->type); |
575 | } |
576 | |
577 | if (!vec) { |
578 | panic(fmt: "Unsupported system type: %s%s%s (%ld %ld)\n" , |
579 | type_name, (*var_name ? " variation " : "" ), var_name, |
580 | hwrpb->sys_type, hwrpb->sys_variation); |
581 | } |
582 | if (vec != &alpha_mv) { |
583 | alpha_mv = *vec; |
584 | } |
585 | |
586 | printk("Booting " |
587 | #ifdef CONFIG_ALPHA_GENERIC |
588 | "GENERIC " |
589 | #endif |
590 | "on %s%s%s using machine vector %s from %s\n" , |
591 | type_name, (*var_name ? " variation " : "" ), |
592 | var_name, alpha_mv.vector_name, |
593 | (alpha_using_srm ? "SRM" : "MILO" )); |
594 | |
595 | printk("Major Options: " |
596 | #ifdef CONFIG_SMP |
597 | "SMP " |
598 | #endif |
599 | #ifdef CONFIG_ALPHA_EV56 |
600 | "EV56 " |
601 | #endif |
602 | #ifdef CONFIG_ALPHA_EV67 |
603 | "EV67 " |
604 | #endif |
605 | #ifdef CONFIG_ALPHA_LEGACY_START_ADDRESS |
606 | "LEGACY_START " |
607 | #endif |
608 | #ifdef CONFIG_VERBOSE_MCHECK |
609 | "VERBOSE_MCHECK " |
610 | #endif |
611 | |
612 | #ifdef CONFIG_DEBUG_SPINLOCK |
613 | "DEBUG_SPINLOCK " |
614 | #endif |
615 | #ifdef CONFIG_MAGIC_SYSRQ |
616 | "MAGIC_SYSRQ " |
617 | #endif |
618 | "\n" ); |
619 | |
620 | printk("Command line: %s\n" , command_line); |
621 | |
622 | /* |
623 | * Sync up the HAE. |
624 | * Save the SRM's current value for restoration. |
625 | */ |
626 | srm_hae = *alpha_mv.hae_register; |
627 | __set_hae(alpha_mv.hae_cache); |
628 | |
629 | /* Reset enable correctable error reports. */ |
630 | wrmces(mces: 0x7); |
631 | |
632 | /* Find our memory. */ |
633 | setup_memory(kernel_end); |
634 | memblock_set_bottom_up(enable: true); |
635 | sparse_init(); |
636 | |
637 | /* First guess at cpu cache sizes. Do this before init_arch. */ |
638 | determine_cpu_caches(cpu->type); |
639 | |
640 | /* Initialize the machine. Usually has to do with setting up |
641 | DMA windows and the like. */ |
642 | if (alpha_mv.init_arch) |
643 | alpha_mv.init_arch(); |
644 | |
645 | /* Reserve standard resources. */ |
646 | reserve_std_resources(); |
647 | |
648 | /* |
649 | * Give us a default console. TGA users will see nothing until |
650 | * chr_dev_init is called, rather late in the boot sequence. |
651 | */ |
652 | |
653 | #ifdef CONFIG_VT |
654 | #if defined(CONFIG_VGA_CONSOLE) |
655 | vgacon_register_screen(si: &vgacon_screen_info); |
656 | #endif |
657 | #endif |
658 | |
659 | /* Default root filesystem to sda2. */ |
660 | ROOT_DEV = MKDEV(SCSI_DISK0_MAJOR, 2); |
661 | |
662 | #ifdef CONFIG_EISA |
663 | /* FIXME: only set this when we actually have EISA in this box? */ |
664 | EISA_bus = 1; |
665 | #endif |
666 | |
667 | /* |
668 | * Check ASN in HWRPB for validity, report if bad. |
669 | * FIXME: how was this failing? Should we trust it instead, |
670 | * and copy the value into alpha_mv.max_asn? |
671 | */ |
672 | |
673 | if (hwrpb->max_asn != MAX_ASN) { |
674 | printk("Max ASN from HWRPB is bad (0x%lx)\n" , hwrpb->max_asn); |
675 | } |
676 | |
677 | /* |
678 | * Identify the flock of penguins. |
679 | */ |
680 | |
681 | #ifdef CONFIG_SMP |
682 | setup_smp(); |
683 | #endif |
684 | paging_init(); |
685 | } |
686 | |
687 | static char sys_unknown[] = "Unknown" ; |
688 | static char systype_names[][16] = { |
689 | "0" , |
690 | "ADU" , "Cobra" , "Ruby" , "Flamingo" , "Mannequin" , "Jensen" , |
691 | "Pelican" , "Morgan" , "Sable" , "Medulla" , "Noname" , |
692 | "Turbolaser" , "Avanti" , "Mustang" , "Alcor" , "Tradewind" , |
693 | "Mikasa" , "EB64" , "EB66" , "EB64+" , "AlphaBook1" , |
694 | "Rawhide" , "K2" , "Lynx" , "XL" , "EB164" , "Noritake" , |
695 | "Cortex" , "29" , "Miata" , "XXM" , "Takara" , "Yukon" , |
696 | "Tsunami" , "Wildfire" , "CUSCO" , "Eiger" , "Titan" , "Marvel" |
697 | }; |
698 | |
699 | static char unofficial_names[][8] = {"100" , "Ruffian" }; |
700 | |
701 | static char api_names[][16] = {"200" , "Nautilus" }; |
702 | |
703 | static char eb164_names[][8] = {"EB164" , "PC164" , "LX164" , "SX164" , "RX164" }; |
704 | static int eb164_indices[] = {0,0,0,1,1,1,1,1,2,2,2,2,3,3,3,3,4}; |
705 | |
706 | static char alcor_names[][16] = {"Alcor" , "Maverick" , "Bret" }; |
707 | static int alcor_indices[] = {0,0,0,1,1,1,0,0,0,0,0,0,2,2,2,2,2,2}; |
708 | |
709 | static char eb64p_names[][16] = {"EB64+" , "Cabriolet" , "AlphaPCI64" }; |
710 | static int eb64p_indices[] = {0,0,1,2}; |
711 | |
712 | static char eb66_names[][8] = {"EB66" , "EB66+" }; |
713 | static int eb66_indices[] = {0,0,1}; |
714 | |
715 | static char marvel_names[][16] = { |
716 | "Marvel/EV7" |
717 | }; |
718 | static int marvel_indices[] = { 0 }; |
719 | |
720 | static char rawhide_names[][16] = { |
721 | "Dodge" , "Wrangler" , "Durango" , "Tincup" , "DaVinci" |
722 | }; |
723 | static int rawhide_indices[] = {0,0,0,1,1,2,2,3,3,4,4}; |
724 | |
725 | static char titan_names[][16] = { |
726 | "DEFAULT" , "Privateer" , "Falcon" , "Granite" |
727 | }; |
728 | static int titan_indices[] = {0,1,2,2,3}; |
729 | |
730 | static char tsunami_names[][16] = { |
731 | "0" , "DP264" , "Warhol" , "Windjammer" , "Monet" , "Clipper" , |
732 | "Goldrush" , "Webbrick" , "Catamaran" , "Brisbane" , "Melbourne" , |
733 | "Flying Clipper" , "Shark" |
734 | }; |
735 | static int tsunami_indices[] = {0,1,2,3,4,5,6,7,8,9,10,11,12}; |
736 | |
737 | static struct alpha_machine_vector * __init |
738 | get_sysvec(unsigned long type, unsigned long variation, unsigned long cpu) |
739 | { |
740 | static struct alpha_machine_vector *systype_vecs[] __initdata = |
741 | { |
742 | NULL, /* 0 */ |
743 | NULL, /* ADU */ |
744 | NULL, /* Cobra */ |
745 | NULL, /* Ruby */ |
746 | NULL, /* Flamingo */ |
747 | NULL, /* Mannequin */ |
748 | &jensen_mv, |
749 | NULL, /* Pelican */ |
750 | NULL, /* Morgan */ |
751 | NULL, /* Sable -- see below. */ |
752 | NULL, /* Medulla */ |
753 | &noname_mv, |
754 | NULL, /* Turbolaser */ |
755 | &avanti_mv, |
756 | NULL, /* Mustang */ |
757 | NULL, /* Alcor, Bret, Maverick. HWRPB inaccurate? */ |
758 | NULL, /* Tradewind */ |
759 | NULL, /* Mikasa -- see below. */ |
760 | NULL, /* EB64 */ |
761 | NULL, /* EB66 -- see variation. */ |
762 | NULL, /* EB64+ -- see variation. */ |
763 | &alphabook1_mv, |
764 | &rawhide_mv, |
765 | NULL, /* K2 */ |
766 | &lynx_mv, /* Lynx */ |
767 | &xl_mv, |
768 | NULL, /* EB164 -- see variation. */ |
769 | NULL, /* Noritake -- see below. */ |
770 | NULL, /* Cortex */ |
771 | NULL, /* 29 */ |
772 | &miata_mv, |
773 | NULL, /* XXM */ |
774 | &takara_mv, |
775 | NULL, /* Yukon */ |
776 | NULL, /* Tsunami -- see variation. */ |
777 | &wildfire_mv, /* Wildfire */ |
778 | NULL, /* CUSCO */ |
779 | &eiger_mv, /* Eiger */ |
780 | NULL, /* Titan */ |
781 | NULL, /* Marvel */ |
782 | }; |
783 | |
784 | static struct alpha_machine_vector *unofficial_vecs[] __initdata = |
785 | { |
786 | NULL, /* 100 */ |
787 | &ruffian_mv, |
788 | }; |
789 | |
790 | static struct alpha_machine_vector *api_vecs[] __initdata = |
791 | { |
792 | NULL, /* 200 */ |
793 | &nautilus_mv, |
794 | }; |
795 | |
796 | static struct alpha_machine_vector *alcor_vecs[] __initdata = |
797 | { |
798 | &alcor_mv, &xlt_mv, &xlt_mv |
799 | }; |
800 | |
801 | static struct alpha_machine_vector *eb164_vecs[] __initdata = |
802 | { |
803 | &eb164_mv, &pc164_mv, &lx164_mv, &sx164_mv, &rx164_mv |
804 | }; |
805 | |
806 | static struct alpha_machine_vector *eb64p_vecs[] __initdata = |
807 | { |
808 | &eb64p_mv, |
809 | &cabriolet_mv, |
810 | &cabriolet_mv /* AlphaPCI64 */ |
811 | }; |
812 | |
813 | static struct alpha_machine_vector *eb66_vecs[] __initdata = |
814 | { |
815 | &eb66_mv, |
816 | &eb66p_mv |
817 | }; |
818 | |
819 | static struct alpha_machine_vector *marvel_vecs[] __initdata = |
820 | { |
821 | &marvel_ev7_mv, |
822 | }; |
823 | |
824 | static struct alpha_machine_vector *titan_vecs[] __initdata = |
825 | { |
826 | &titan_mv, /* default */ |
827 | &privateer_mv, /* privateer */ |
828 | &titan_mv, /* falcon */ |
829 | &privateer_mv, /* granite */ |
830 | }; |
831 | |
832 | static struct alpha_machine_vector *tsunami_vecs[] __initdata = |
833 | { |
834 | NULL, |
835 | &dp264_mv, /* dp264 */ |
836 | &dp264_mv, /* warhol */ |
837 | &dp264_mv, /* windjammer */ |
838 | &monet_mv, /* monet */ |
839 | &clipper_mv, /* clipper */ |
840 | &dp264_mv, /* goldrush */ |
841 | &webbrick_mv, /* webbrick */ |
842 | &dp264_mv, /* catamaran */ |
843 | NULL, /* brisbane? */ |
844 | NULL, /* melbourne? */ |
845 | NULL, /* flying clipper? */ |
846 | &shark_mv, /* shark */ |
847 | }; |
848 | |
849 | /* ??? Do we need to distinguish between Rawhides? */ |
850 | |
851 | struct alpha_machine_vector *vec; |
852 | |
853 | /* Search the system tables first... */ |
854 | vec = NULL; |
855 | if (type < ARRAY_SIZE(systype_vecs)) { |
856 | vec = systype_vecs[type]; |
857 | } else if ((type > ST_API_BIAS) && |
858 | (type - ST_API_BIAS) < ARRAY_SIZE(api_vecs)) { |
859 | vec = api_vecs[type - ST_API_BIAS]; |
860 | } else if ((type > ST_UNOFFICIAL_BIAS) && |
861 | (type - ST_UNOFFICIAL_BIAS) < ARRAY_SIZE(unofficial_vecs)) { |
862 | vec = unofficial_vecs[type - ST_UNOFFICIAL_BIAS]; |
863 | } |
864 | |
865 | /* If we've not found one, try for a variation. */ |
866 | |
867 | if (!vec) { |
868 | /* Member ID is a bit-field. */ |
869 | unsigned long member = (variation >> 10) & 0x3f; |
870 | |
871 | cpu &= 0xffffffff; /* make it usable */ |
872 | |
873 | switch (type) { |
874 | case ST_DEC_ALCOR: |
875 | if (member < ARRAY_SIZE(alcor_indices)) |
876 | vec = alcor_vecs[alcor_indices[member]]; |
877 | break; |
878 | case ST_DEC_EB164: |
879 | if (member < ARRAY_SIZE(eb164_indices)) |
880 | vec = eb164_vecs[eb164_indices[member]]; |
881 | /* PC164 may show as EB164 variation with EV56 CPU, |
882 | but, since no true EB164 had anything but EV5... */ |
883 | if (vec == &eb164_mv && cpu == EV56_CPU) |
884 | vec = &pc164_mv; |
885 | break; |
886 | case ST_DEC_EB64P: |
887 | if (member < ARRAY_SIZE(eb64p_indices)) |
888 | vec = eb64p_vecs[eb64p_indices[member]]; |
889 | break; |
890 | case ST_DEC_EB66: |
891 | if (member < ARRAY_SIZE(eb66_indices)) |
892 | vec = eb66_vecs[eb66_indices[member]]; |
893 | break; |
894 | case ST_DEC_MARVEL: |
895 | if (member < ARRAY_SIZE(marvel_indices)) |
896 | vec = marvel_vecs[marvel_indices[member]]; |
897 | break; |
898 | case ST_DEC_TITAN: |
899 | vec = titan_vecs[0]; /* default */ |
900 | if (member < ARRAY_SIZE(titan_indices)) |
901 | vec = titan_vecs[titan_indices[member]]; |
902 | break; |
903 | case ST_DEC_TSUNAMI: |
904 | if (member < ARRAY_SIZE(tsunami_indices)) |
905 | vec = tsunami_vecs[tsunami_indices[member]]; |
906 | break; |
907 | case ST_DEC_1000: |
908 | if (cpu == EV5_CPU || cpu == EV56_CPU) |
909 | vec = &mikasa_primo_mv; |
910 | else |
911 | vec = &mikasa_mv; |
912 | break; |
913 | case ST_DEC_NORITAKE: |
914 | if (cpu == EV5_CPU || cpu == EV56_CPU) |
915 | vec = &noritake_primo_mv; |
916 | else |
917 | vec = &noritake_mv; |
918 | break; |
919 | case ST_DEC_2100_A500: |
920 | if (cpu == EV5_CPU || cpu == EV56_CPU) |
921 | vec = &sable_gamma_mv; |
922 | else |
923 | vec = &sable_mv; |
924 | break; |
925 | } |
926 | } |
927 | return vec; |
928 | } |
929 | |
930 | static struct alpha_machine_vector * __init |
931 | get_sysvec_byname(const char *name) |
932 | { |
933 | static struct alpha_machine_vector *all_vecs[] __initdata = |
934 | { |
935 | &alcor_mv, |
936 | &alphabook1_mv, |
937 | &avanti_mv, |
938 | &cabriolet_mv, |
939 | &clipper_mv, |
940 | &dp264_mv, |
941 | &eb164_mv, |
942 | &eb64p_mv, |
943 | &eb66_mv, |
944 | &eb66p_mv, |
945 | &eiger_mv, |
946 | &jensen_mv, |
947 | &lx164_mv, |
948 | &lynx_mv, |
949 | &miata_mv, |
950 | &mikasa_mv, |
951 | &mikasa_primo_mv, |
952 | &monet_mv, |
953 | &nautilus_mv, |
954 | &noname_mv, |
955 | &noritake_mv, |
956 | &noritake_primo_mv, |
957 | &p2k_mv, |
958 | &pc164_mv, |
959 | &privateer_mv, |
960 | &rawhide_mv, |
961 | &ruffian_mv, |
962 | &rx164_mv, |
963 | &sable_mv, |
964 | &sable_gamma_mv, |
965 | &shark_mv, |
966 | &sx164_mv, |
967 | &takara_mv, |
968 | &webbrick_mv, |
969 | &wildfire_mv, |
970 | &xl_mv, |
971 | &xlt_mv |
972 | }; |
973 | |
974 | size_t i; |
975 | |
976 | for (i = 0; i < ARRAY_SIZE(all_vecs); ++i) { |
977 | struct alpha_machine_vector *mv = all_vecs[i]; |
978 | if (strcasecmp(s1: mv->vector_name, s2: name) == 0) |
979 | return mv; |
980 | } |
981 | return NULL; |
982 | } |
983 | |
984 | static void |
985 | get_sysnames(unsigned long type, unsigned long variation, unsigned long cpu, |
986 | char **type_name, char **variation_name) |
987 | { |
988 | unsigned long member; |
989 | |
990 | /* If not in the tables, make it UNKNOWN, |
991 | else set type name to family */ |
992 | if (type < ARRAY_SIZE(systype_names)) { |
993 | *type_name = systype_names[type]; |
994 | } else if ((type > ST_API_BIAS) && |
995 | (type - ST_API_BIAS) < ARRAY_SIZE(api_names)) { |
996 | *type_name = api_names[type - ST_API_BIAS]; |
997 | } else if ((type > ST_UNOFFICIAL_BIAS) && |
998 | (type - ST_UNOFFICIAL_BIAS) < ARRAY_SIZE(unofficial_names)) { |
999 | *type_name = unofficial_names[type - ST_UNOFFICIAL_BIAS]; |
1000 | } else { |
1001 | *type_name = sys_unknown; |
1002 | *variation_name = sys_unknown; |
1003 | return; |
1004 | } |
1005 | |
1006 | /* Set variation to "0"; if variation is zero, done. */ |
1007 | *variation_name = systype_names[0]; |
1008 | if (variation == 0) { |
1009 | return; |
1010 | } |
1011 | |
1012 | member = (variation >> 10) & 0x3f; /* member ID is a bit-field */ |
1013 | |
1014 | cpu &= 0xffffffff; /* make it usable */ |
1015 | |
1016 | switch (type) { /* select by family */ |
1017 | default: /* default to variation "0" for now */ |
1018 | break; |
1019 | case ST_DEC_EB164: |
1020 | if (member >= ARRAY_SIZE(eb164_indices)) |
1021 | break; |
1022 | *variation_name = eb164_names[eb164_indices[member]]; |
1023 | /* PC164 may show as EB164 variation, but with EV56 CPU, |
1024 | so, since no true EB164 had anything but EV5... */ |
1025 | if (eb164_indices[member] == 0 && cpu == EV56_CPU) |
1026 | *variation_name = eb164_names[1]; /* make it PC164 */ |
1027 | break; |
1028 | case ST_DEC_ALCOR: |
1029 | if (member < ARRAY_SIZE(alcor_indices)) |
1030 | *variation_name = alcor_names[alcor_indices[member]]; |
1031 | break; |
1032 | case ST_DEC_EB64P: |
1033 | if (member < ARRAY_SIZE(eb64p_indices)) |
1034 | *variation_name = eb64p_names[eb64p_indices[member]]; |
1035 | break; |
1036 | case ST_DEC_EB66: |
1037 | if (member < ARRAY_SIZE(eb66_indices)) |
1038 | *variation_name = eb66_names[eb66_indices[member]]; |
1039 | break; |
1040 | case ST_DEC_MARVEL: |
1041 | if (member < ARRAY_SIZE(marvel_indices)) |
1042 | *variation_name = marvel_names[marvel_indices[member]]; |
1043 | break; |
1044 | case ST_DEC_RAWHIDE: |
1045 | if (member < ARRAY_SIZE(rawhide_indices)) |
1046 | *variation_name = rawhide_names[rawhide_indices[member]]; |
1047 | break; |
1048 | case ST_DEC_TITAN: |
1049 | *variation_name = titan_names[0]; /* default */ |
1050 | if (member < ARRAY_SIZE(titan_indices)) |
1051 | *variation_name = titan_names[titan_indices[member]]; |
1052 | break; |
1053 | case ST_DEC_TSUNAMI: |
1054 | if (member < ARRAY_SIZE(tsunami_indices)) |
1055 | *variation_name = tsunami_names[tsunami_indices[member]]; |
1056 | break; |
1057 | } |
1058 | } |
1059 | |
1060 | /* |
1061 | * A change was made to the HWRPB via an ECO and the following code |
1062 | * tracks a part of the ECO. In HWRPB versions less than 5, the ECO |
1063 | * was not implemented in the console firmware. If it's revision 5 or |
1064 | * greater we can get the name of the platform as an ASCII string from |
1065 | * the HWRPB. That's what this function does. It checks the revision |
1066 | * level and if the string is in the HWRPB it returns the address of |
1067 | * the string--a pointer to the name of the platform. |
1068 | * |
1069 | * Returns: |
1070 | * - Pointer to a ASCII string if it's in the HWRPB |
1071 | * - Pointer to a blank string if the data is not in the HWRPB. |
1072 | */ |
1073 | |
1074 | static char * |
1075 | platform_string(void) |
1076 | { |
1077 | struct dsr_struct *dsr; |
1078 | static char unk_system_string[] = "N/A" ; |
1079 | |
1080 | /* Go to the console for the string pointer. |
1081 | * If the rpb_vers is not 5 or greater the rpb |
1082 | * is old and does not have this data in it. |
1083 | */ |
1084 | if (hwrpb->revision < 5) |
1085 | return (unk_system_string); |
1086 | else { |
1087 | /* The Dynamic System Recognition struct |
1088 | * has the system platform name starting |
1089 | * after the character count of the string. |
1090 | */ |
1091 | dsr = ((struct dsr_struct *) |
1092 | ((char *)hwrpb + hwrpb->dsr_offset)); |
1093 | return ((char *)dsr + (dsr->sysname_off + |
1094 | sizeof(long))); |
1095 | } |
1096 | } |
1097 | |
1098 | static int |
1099 | get_nr_processors(struct percpu_struct *cpubase, unsigned long num) |
1100 | { |
1101 | struct percpu_struct *cpu; |
1102 | unsigned long i; |
1103 | int count = 0; |
1104 | |
1105 | for (i = 0; i < num; i++) { |
1106 | cpu = (struct percpu_struct *) |
1107 | ((char *)cpubase + i*hwrpb->processor_size); |
1108 | if ((cpu->flags & 0x1cc) == 0x1cc) |
1109 | count++; |
1110 | } |
1111 | return count; |
1112 | } |
1113 | |
1114 | static void |
1115 | show_cache_size (struct seq_file *f, const char *which, int shape) |
1116 | { |
1117 | if (shape == -1) |
1118 | seq_printf (m: f, fmt: "%s\t\t: n/a\n" , which); |
1119 | else if (shape == 0) |
1120 | seq_printf (m: f, fmt: "%s\t\t: unknown\n" , which); |
1121 | else |
1122 | seq_printf (m: f, fmt: "%s\t\t: %dK, %d-way, %db line\n" , |
1123 | which, shape >> 10, shape & 15, |
1124 | 1 << ((shape >> 4) & 15)); |
1125 | } |
1126 | |
1127 | static int |
1128 | show_cpuinfo(struct seq_file *f, void *slot) |
1129 | { |
1130 | extern struct unaligned_stat { |
1131 | unsigned long count, va, pc; |
1132 | } unaligned[2]; |
1133 | |
1134 | static char cpu_names[][8] = { |
1135 | "EV3" , "EV4" , "Simulate" , "LCA4" , "EV5" , "EV45" , "EV56" , |
1136 | "EV6" , "PCA56" , "PCA57" , "EV67" , "EV68CB" , "EV68AL" , |
1137 | "EV68CX" , "EV7" , "EV79" , "EV69" |
1138 | }; |
1139 | |
1140 | struct percpu_struct *cpu = slot; |
1141 | unsigned int cpu_index; |
1142 | char *cpu_name; |
1143 | char *systype_name; |
1144 | char *sysvariation_name; |
1145 | int nr_processors; |
1146 | unsigned long timer_freq; |
1147 | |
1148 | cpu_index = (unsigned) (cpu->type - 1); |
1149 | cpu_name = "Unknown" ; |
1150 | if (cpu_index < ARRAY_SIZE(cpu_names)) |
1151 | cpu_name = cpu_names[cpu_index]; |
1152 | |
1153 | get_sysnames(type: hwrpb->sys_type, variation: hwrpb->sys_variation, |
1154 | cpu: cpu->type, type_name: &systype_name, variation_name: &sysvariation_name); |
1155 | |
1156 | nr_processors = get_nr_processors(cpubase: cpu, num: hwrpb->nr_processors); |
1157 | |
1158 | #if CONFIG_HZ == 1024 || CONFIG_HZ == 1200 |
1159 | timer_freq = (100UL * hwrpb->intr_freq) / 4096; |
1160 | #else |
1161 | timer_freq = 100UL * CONFIG_HZ; |
1162 | #endif |
1163 | |
1164 | seq_printf(m: f, fmt: "cpu\t\t\t: Alpha\n" |
1165 | "cpu model\t\t: %s\n" |
1166 | "cpu variation\t\t: %ld\n" |
1167 | "cpu revision\t\t: %ld\n" |
1168 | "cpu serial number\t: %s\n" |
1169 | "system type\t\t: %s\n" |
1170 | "system variation\t: %s\n" |
1171 | "system revision\t\t: %ld\n" |
1172 | "system serial number\t: %s\n" |
1173 | "cycle frequency [Hz]\t: %lu %s\n" |
1174 | "timer frequency [Hz]\t: %lu.%02lu\n" |
1175 | "page size [bytes]\t: %ld\n" |
1176 | "phys. address bits\t: %ld\n" |
1177 | "max. addr. space #\t: %ld\n" |
1178 | "BogoMIPS\t\t: %lu.%02lu\n" |
1179 | "kernel unaligned acc\t: %ld (pc=%lx,va=%lx)\n" |
1180 | "user unaligned acc\t: %ld (pc=%lx,va=%lx)\n" |
1181 | "platform string\t\t: %s\n" |
1182 | "cpus detected\t\t: %d\n" , |
1183 | cpu_name, cpu->variation, cpu->revision, |
1184 | (char*)cpu->serial_no, |
1185 | systype_name, sysvariation_name, hwrpb->sys_revision, |
1186 | (char*)hwrpb->ssn, |
1187 | est_cycle_freq ? : hwrpb->cycle_freq, |
1188 | est_cycle_freq ? "est." : "" , |
1189 | timer_freq / 100, timer_freq % 100, |
1190 | hwrpb->pagesize, |
1191 | hwrpb->pa_bits, |
1192 | hwrpb->max_asn, |
1193 | loops_per_jiffy / (500000/HZ), |
1194 | (loops_per_jiffy / (5000/HZ)) % 100, |
1195 | unaligned[0].count, unaligned[0].pc, unaligned[0].va, |
1196 | unaligned[1].count, unaligned[1].pc, unaligned[1].va, |
1197 | platform_string(), nr_processors); |
1198 | |
1199 | #ifdef CONFIG_SMP |
1200 | seq_printf(m: f, fmt: "cpus active\t\t: %u\n" |
1201 | "cpu active mask\t\t: %016lx\n" , |
1202 | num_online_cpus(), cpumask_bits(cpu_possible_mask)[0]); |
1203 | #endif |
1204 | |
1205 | show_cache_size (f, which: "L1 Icache" , shape: alpha_l1i_cacheshape); |
1206 | show_cache_size (f, which: "L1 Dcache" , shape: alpha_l1d_cacheshape); |
1207 | show_cache_size (f, which: "L2 cache" , shape: alpha_l2_cacheshape); |
1208 | show_cache_size (f, which: "L3 cache" , shape: alpha_l3_cacheshape); |
1209 | |
1210 | return 0; |
1211 | } |
1212 | |
1213 | static int __init |
1214 | read_mem_block(int *addr, int stride, int size) |
1215 | { |
1216 | long nloads = size / stride, cnt, tmp; |
1217 | |
1218 | __asm__ __volatile__( |
1219 | " rpcc %0\n" |
1220 | "1: ldl %3,0(%2)\n" |
1221 | " subq %1,1,%1\n" |
1222 | /* Next two XORs introduce an explicit data dependency between |
1223 | consecutive loads in the loop, which will give us true load |
1224 | latency. */ |
1225 | " xor %3,%2,%2\n" |
1226 | " xor %3,%2,%2\n" |
1227 | " addq %2,%4,%2\n" |
1228 | " bne %1,1b\n" |
1229 | " rpcc %3\n" |
1230 | " subl %3,%0,%0\n" |
1231 | : "=&r" (cnt), "=&r" (nloads), "=&r" (addr), "=&r" (tmp) |
1232 | : "r" (stride), "1" (nloads), "2" (addr)); |
1233 | |
1234 | return cnt / (size / stride); |
1235 | } |
1236 | |
1237 | #define CSHAPE(totalsize, linesize, assoc) \ |
1238 | ((totalsize & ~0xff) | (linesize << 4) | assoc) |
1239 | |
1240 | /* ??? EV5 supports up to 64M, but did the systems with more than |
1241 | 16M of BCACHE ever exist? */ |
1242 | #define MAX_BCACHE_SIZE 16*1024*1024 |
1243 | |
1244 | /* Note that the offchip caches are direct mapped on all Alphas. */ |
1245 | static int __init |
1246 | external_cache_probe(int minsize, int width) |
1247 | { |
1248 | int cycles, prev_cycles = 1000000; |
1249 | int stride = 1 << width; |
1250 | long size = minsize, maxsize = MAX_BCACHE_SIZE * 2; |
1251 | |
1252 | if (maxsize > (max_low_pfn + 1) << PAGE_SHIFT) |
1253 | maxsize = 1 << (ilog2(max_low_pfn + 1) + PAGE_SHIFT); |
1254 | |
1255 | /* Get the first block cached. */ |
1256 | read_mem_block(__va(0), stride, size); |
1257 | |
1258 | while (size < maxsize) { |
1259 | /* Get an average load latency in cycles. */ |
1260 | cycles = read_mem_block(__va(0), stride, size); |
1261 | if (cycles > prev_cycles * 2) { |
1262 | /* Fine, we exceed the cache. */ |
1263 | printk("%ldK Bcache detected; load hit latency %d " |
1264 | "cycles, load miss latency %d cycles\n" , |
1265 | size >> 11, prev_cycles, cycles); |
1266 | return CSHAPE(size >> 1, width, 1); |
1267 | } |
1268 | /* Try to get the next block cached. */ |
1269 | read_mem_block(__va(size), stride, size); |
1270 | prev_cycles = cycles; |
1271 | size <<= 1; |
1272 | } |
1273 | return -1; /* No BCACHE found. */ |
1274 | } |
1275 | |
1276 | static void __init |
1277 | determine_cpu_caches (unsigned int cpu_type) |
1278 | { |
1279 | int L1I, L1D, L2, L3; |
1280 | |
1281 | switch (cpu_type) { |
1282 | case EV4_CPU: |
1283 | case EV45_CPU: |
1284 | { |
1285 | if (cpu_type == EV4_CPU) |
1286 | L1I = CSHAPE(8*1024, 5, 1); |
1287 | else |
1288 | L1I = CSHAPE(16*1024, 5, 1); |
1289 | L1D = L1I; |
1290 | L3 = -1; |
1291 | |
1292 | /* BIU_CTL is a write-only Abox register. PALcode has a |
1293 | shadow copy, and may be available from some versions |
1294 | of the CSERVE PALcall. If we can get it, then |
1295 | |
1296 | unsigned long biu_ctl, size; |
1297 | size = 128*1024 * (1 << ((biu_ctl >> 28) & 7)); |
1298 | L2 = CSHAPE (size, 5, 1); |
1299 | |
1300 | Unfortunately, we can't rely on that. |
1301 | */ |
1302 | L2 = external_cache_probe(minsize: 128*1024, width: 5); |
1303 | break; |
1304 | } |
1305 | |
1306 | case LCA4_CPU: |
1307 | { |
1308 | unsigned long car, size; |
1309 | |
1310 | L1I = L1D = CSHAPE(8*1024, 5, 1); |
1311 | L3 = -1; |
1312 | |
1313 | car = *(vuip) phys_to_virt (address: 0x120000078UL); |
1314 | size = 64*1024 * (1 << ((car >> 5) & 7)); |
1315 | /* No typo -- 8 byte cacheline size. Whodathunk. */ |
1316 | L2 = (car & 1 ? CSHAPE (size, 3, 1) : -1); |
1317 | break; |
1318 | } |
1319 | |
1320 | case EV5_CPU: |
1321 | case EV56_CPU: |
1322 | { |
1323 | unsigned long sc_ctl, width; |
1324 | |
1325 | L1I = L1D = CSHAPE(8*1024, 5, 1); |
1326 | |
1327 | /* Check the line size of the Scache. */ |
1328 | sc_ctl = *(vulp) phys_to_virt (address: 0xfffff000a8UL); |
1329 | width = sc_ctl & 0x1000 ? 6 : 5; |
1330 | L2 = CSHAPE (96*1024, width, 3); |
1331 | |
1332 | /* BC_CONTROL and BC_CONFIG are write-only IPRs. PALcode |
1333 | has a shadow copy, and may be available from some versions |
1334 | of the CSERVE PALcall. If we can get it, then |
1335 | |
1336 | unsigned long bc_control, bc_config, size; |
1337 | size = 1024*1024 * (1 << ((bc_config & 7) - 1)); |
1338 | L3 = (bc_control & 1 ? CSHAPE (size, width, 1) : -1); |
1339 | |
1340 | Unfortunately, we can't rely on that. |
1341 | */ |
1342 | L3 = external_cache_probe(minsize: 1024*1024, width); |
1343 | break; |
1344 | } |
1345 | |
1346 | case PCA56_CPU: |
1347 | case PCA57_CPU: |
1348 | { |
1349 | if (cpu_type == PCA56_CPU) { |
1350 | L1I = CSHAPE(16*1024, 6, 1); |
1351 | L1D = CSHAPE(8*1024, 5, 1); |
1352 | } else { |
1353 | L1I = CSHAPE(32*1024, 6, 2); |
1354 | L1D = CSHAPE(16*1024, 5, 1); |
1355 | } |
1356 | L3 = -1; |
1357 | |
1358 | #if 0 |
1359 | unsigned long cbox_config, size; |
1360 | |
1361 | cbox_config = *(vulp) phys_to_virt (0xfffff00008UL); |
1362 | size = 512*1024 * (1 << ((cbox_config >> 12) & 3)); |
1363 | |
1364 | L2 = ((cbox_config >> 31) & 1 ? CSHAPE (size, 6, 1) : -1); |
1365 | #else |
1366 | L2 = external_cache_probe(minsize: 512*1024, width: 6); |
1367 | #endif |
1368 | break; |
1369 | } |
1370 | |
1371 | case EV6_CPU: |
1372 | case EV67_CPU: |
1373 | case EV68CB_CPU: |
1374 | case EV68AL_CPU: |
1375 | case EV68CX_CPU: |
1376 | case EV69_CPU: |
1377 | L1I = L1D = CSHAPE(64*1024, 6, 2); |
1378 | L2 = external_cache_probe(minsize: 1024*1024, width: 6); |
1379 | L3 = -1; |
1380 | break; |
1381 | |
1382 | case EV7_CPU: |
1383 | case EV79_CPU: |
1384 | L1I = L1D = CSHAPE(64*1024, 6, 2); |
1385 | L2 = CSHAPE(7*1024*1024/4, 6, 7); |
1386 | L3 = -1; |
1387 | break; |
1388 | |
1389 | default: |
1390 | /* Nothing known about this cpu type. */ |
1391 | L1I = L1D = L2 = L3 = 0; |
1392 | break; |
1393 | } |
1394 | |
1395 | alpha_l1i_cacheshape = L1I; |
1396 | alpha_l1d_cacheshape = L1D; |
1397 | alpha_l2_cacheshape = L2; |
1398 | alpha_l3_cacheshape = L3; |
1399 | } |
1400 | |
1401 | /* |
1402 | * We show only CPU #0 info. |
1403 | */ |
1404 | static void * |
1405 | c_start(struct seq_file *f, loff_t *pos) |
1406 | { |
1407 | return *pos ? NULL : (char *)hwrpb + hwrpb->processor_offset; |
1408 | } |
1409 | |
1410 | static void * |
1411 | c_next(struct seq_file *f, void *v, loff_t *pos) |
1412 | { |
1413 | (*pos)++; |
1414 | return NULL; |
1415 | } |
1416 | |
1417 | static void |
1418 | c_stop(struct seq_file *f, void *v) |
1419 | { |
1420 | } |
1421 | |
1422 | const struct seq_operations cpuinfo_op = { |
1423 | .start = c_start, |
1424 | .next = c_next, |
1425 | .stop = c_stop, |
1426 | .show = show_cpuinfo, |
1427 | }; |
1428 | |
1429 | |
1430 | static int |
1431 | alpha_panic_event(struct notifier_block *this, unsigned long event, void *ptr) |
1432 | { |
1433 | #if 1 |
1434 | /* FIXME FIXME FIXME */ |
1435 | /* If we are using SRM and serial console, just hard halt here. */ |
1436 | if (alpha_using_srm && srmcons_output) |
1437 | __halt(); |
1438 | #endif |
1439 | return NOTIFY_DONE; |
1440 | } |
1441 | |
1442 | static __init int add_pcspkr(void) |
1443 | { |
1444 | struct platform_device *pd; |
1445 | int ret; |
1446 | |
1447 | pd = platform_device_alloc(name: "pcspkr" , id: -1); |
1448 | if (!pd) |
1449 | return -ENOMEM; |
1450 | |
1451 | ret = platform_device_add(pdev: pd); |
1452 | if (ret) |
1453 | platform_device_put(pdev: pd); |
1454 | |
1455 | return ret; |
1456 | } |
1457 | device_initcall(add_pcspkr); |
1458 | |