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| 1 | /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ |
|---|---|
| 2 | /* |
| 3 | * Author: Hanlu Li <lihanlu@loongson.cn> |
| 4 | * Huacai Chen <chenhuacai@loongson.cn> |
| 5 | * |
| 6 | * Copyright (C) 2020-2022 Loongson Technology Corporation Limited |
| 7 | */ |
| 8 | #ifndef _UAPI_ASM_PTRACE_H |
| 9 | #define _UAPI_ASM_PTRACE_H |
| 10 | |
| 11 | #include <linux/types.h> |
| 12 | |
| 13 | /* |
| 14 | * For PTRACE_{POKE,PEEK}USR. 0 - 31 are GPRs, |
| 15 | * 32 is syscall's original ARG0, 33 is PC, 34 is BADVADDR. |
| 16 | */ |
| 17 | #define GPR_BASE 0 |
| 18 | #define GPR_NUM 32 |
| 19 | #define GPR_END (GPR_BASE + GPR_NUM - 1) |
| 20 | #define ARG0 (GPR_END + 1) |
| 21 | #define PC (GPR_END + 2) |
| 22 | #define BADVADDR (GPR_END + 3) |
| 23 | |
| 24 | #define NUM_FPU_REGS 32 |
| 25 | |
| 26 | struct user_pt_regs { |
| 27 | /* Main processor registers. */ |
| 28 | unsigned long regs[32]; |
| 29 | |
| 30 | /* Original syscall arg0. */ |
| 31 | unsigned long orig_a0; |
| 32 | |
| 33 | /* Special CSR registers. */ |
| 34 | unsigned long csr_era; |
| 35 | unsigned long csr_badv; |
| 36 | unsigned long reserved[10]; |
| 37 | } __attribute__((aligned(8))); |
| 38 | |
| 39 | struct user_fp_state { |
| 40 | __u64 fpr[32]; |
| 41 | __u64 fcc; |
| 42 | __u32 fcsr; |
| 43 | }; |
| 44 | |
| 45 | struct user_lsx_state { |
| 46 | /* 32 registers, 128 bits width per register. */ |
| 47 | __u64 vregs[32*2]; |
| 48 | }; |
| 49 | |
| 50 | struct user_lasx_state { |
| 51 | /* 32 registers, 256 bits width per register. */ |
| 52 | __u64 vregs[32*4]; |
| 53 | }; |
| 54 | |
| 55 | struct user_lbt_state { |
| 56 | __u64 scr[4]; |
| 57 | __u32 eflags; |
| 58 | __u32 ftop; |
| 59 | }; |
| 60 | |
| 61 | struct user_watch_state { |
| 62 | __u64 dbg_info; |
| 63 | struct { |
| 64 | #if __BITS_PER_LONG == 32 |
| 65 | __u32 addr; |
| 66 | __u32 mask; |
| 67 | #else |
| 68 | __u64 addr; |
| 69 | __u64 mask; |
| 70 | #endif |
| 71 | __u32 ctrl; |
| 72 | __u32 pad; |
| 73 | } dbg_regs[8]; |
| 74 | }; |
| 75 | |
| 76 | struct user_watch_state_v2 { |
| 77 | __u64 dbg_info; |
| 78 | struct { |
| 79 | #if __BITS_PER_LONG == 32 |
| 80 | __u32 addr; |
| 81 | __u32 mask; |
| 82 | #else |
| 83 | __u64 addr; |
| 84 | __u64 mask; |
| 85 | #endif |
| 86 | __u32 ctrl; |
| 87 | __u32 pad; |
| 88 | } dbg_regs[14]; |
| 89 | }; |
| 90 | |
| 91 | #define PTRACE_SYSEMU 0x1f |
| 92 | #define PTRACE_SYSEMU_SINGLESTEP 0x20 |
| 93 | |
| 94 | #endif /* _UAPI_ASM_PTRACE_H */ |
| 95 |
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