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| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
|---|---|
| 2 | /* |
| 3 | * the definition file of cs5536 Virtual Support Module(VSM). |
| 4 | * pci configuration space can be accessed through the VSM, so |
| 5 | * there is no need of the MSR read/write now, except the spec. |
| 6 | * MSR registers which are not implemented yet. |
| 7 | * |
| 8 | * Copyright (C) 2007 Lemote Inc. |
| 9 | * Author : jlliu, liujl@lemote.com |
| 10 | */ |
| 11 | |
| 12 | #ifndef _CS5536_PCI_H |
| 13 | #define _CS5536_PCI_H |
| 14 | |
| 15 | #include <linux/init.h> |
| 16 | #include <linux/types.h> |
| 17 | #include <linux/pci_regs.h> |
| 18 | |
| 19 | extern void cs5536_pci_conf_write4(int function, int reg, u32 value); |
| 20 | extern u32 cs5536_pci_conf_read4(int function, int reg); |
| 21 | |
| 22 | extern void pci_ehci_write_reg(int reg, u32 value); |
| 23 | extern u32 pci_ehci_read_reg(int reg); |
| 24 | |
| 25 | extern void pci_ide_write_reg(int reg, u32 value); |
| 26 | extern u32 pci_ide_read_reg(int reg); |
| 27 | |
| 28 | extern void pci_acc_write_reg(int reg, u32 value); |
| 29 | extern u32 pci_acc_read_reg(int reg); |
| 30 | |
| 31 | extern void pci_ohci_write_reg(int reg, u32 value); |
| 32 | extern u32 pci_ohci_read_reg(int reg); |
| 33 | |
| 34 | extern void pci_isa_write_bar(int n, u32 value); |
| 35 | extern u32 pci_isa_read_bar(int n); |
| 36 | extern void pci_isa_write_reg(int reg, u32 value); |
| 37 | extern u32 pci_isa_read_reg(int reg); |
| 38 | |
| 39 | extern int __init init_mfgpt_clocksource(void); |
| 40 | |
| 41 | #define CS5536_ACC_INTR 9 |
| 42 | #define CS5536_IDE_INTR 14 |
| 43 | #define CS5536_USB_INTR 11 |
| 44 | #define CS5536_MFGPT_INTR 5 |
| 45 | #define CS5536_UART1_INTR 4 |
| 46 | #define CS5536_UART2_INTR 3 |
| 47 | |
| 48 | /************** PCI BUS DEVICE FUNCTION ***************/ |
| 49 | |
| 50 | /* |
| 51 | * PCI bus device function |
| 52 | */ |
| 53 | #define PCI_BUS_CS5536 0 |
| 54 | #define PCI_IDSEL_CS5536 14 |
| 55 | |
| 56 | /********** STANDARD PCI-2.2 EXPANSION ****************/ |
| 57 | |
| 58 | /* |
| 59 | * PCI configuration space |
| 60 | * we have to virtualize the PCI configure space head, so we should |
| 61 | * define the necessary IDs and some others. |
| 62 | */ |
| 63 | |
| 64 | /* CONFIG of PCI VENDOR ID*/ |
| 65 | #define CFG_PCI_VENDOR_ID(mod_dev_id, sys_vendor_id) \ |
| 66 | (((mod_dev_id) << 16) | (sys_vendor_id)) |
| 67 | |
| 68 | /* VENDOR ID */ |
| 69 | #define CS5536_VENDOR_ID 0x1022 |
| 70 | |
| 71 | /* DEVICE ID */ |
| 72 | #define CS5536_ISA_DEVICE_ID 0x2090 |
| 73 | #define CS5536_IDE_DEVICE_ID 0x209a |
| 74 | #define CS5536_ACC_DEVICE_ID 0x2093 |
| 75 | #define CS5536_OHCI_DEVICE_ID 0x2094 |
| 76 | #define CS5536_EHCI_DEVICE_ID 0x2095 |
| 77 | |
| 78 | /* CLASS CODE : CLASS SUB-CLASS INTERFACE */ |
| 79 | #define CS5536_ISA_CLASS_CODE 0x060100 |
| 80 | #define CS5536_IDE_CLASS_CODE 0x010180 |
| 81 | #define CS5536_ACC_CLASS_CODE 0x040100 |
| 82 | #define CS5536_OHCI_CLASS_CODE 0x0C0310 |
| 83 | #define CS5536_EHCI_CLASS_CODE 0x0C0320 |
| 84 | |
| 85 | /* BHLC : BIST HEADER-TYPE LATENCY-TIMER CACHE-LINE-SIZE */ |
| 86 | |
| 87 | #define CFG_PCI_CACHE_LINE_SIZE(header_type, latency_timer) \ |
| 88 | ((PCI_NONE_BIST << 24) | ((header_type) << 16) \ |
| 89 | | ((latency_timer) << 8) | PCI_NORMAL_CACHE_LINE_SIZE); |
| 90 | |
| 91 | #define PCI_NONE_BIST 0x00 /* RO not implemented yet. */ |
| 92 | #define PCI_BRIDGE_HEADER_TYPE 0x80 /* RO */ |
| 93 | #define PCI_NORMAL_HEADER_TYPE 0x00 |
| 94 | #define PCI_NORMAL_LATENCY_TIMER 0x00 |
| 95 | #define PCI_NORMAL_CACHE_LINE_SIZE 0x08 /* RW */ |
| 96 | |
| 97 | /* BAR */ |
| 98 | #define PCI_BAR0_REG 0x10 |
| 99 | #define PCI_BAR1_REG 0x14 |
| 100 | #define PCI_BAR2_REG 0x18 |
| 101 | #define PCI_BAR3_REG 0x1c |
| 102 | #define PCI_BAR4_REG 0x20 |
| 103 | #define PCI_BAR5_REG 0x24 |
| 104 | #define PCI_BAR_RANGE_MASK 0xFFFFFFFF |
| 105 | |
| 106 | /* CARDBUS CIS POINTER */ |
| 107 | #define PCI_CARDBUS_CIS_POINTER 0x00000000 |
| 108 | |
| 109 | /* SUBSYSTEM VENDOR ID */ |
| 110 | #define CS5536_SUB_VENDOR_ID CS5536_VENDOR_ID |
| 111 | |
| 112 | /* SUBSYSTEM ID */ |
| 113 | #define CS5536_ISA_SUB_ID CS5536_ISA_DEVICE_ID |
| 114 | #define CS5536_IDE_SUB_ID CS5536_IDE_DEVICE_ID |
| 115 | #define CS5536_ACC_SUB_ID CS5536_ACC_DEVICE_ID |
| 116 | #define CS5536_OHCI_SUB_ID CS5536_OHCI_DEVICE_ID |
| 117 | #define CS5536_EHCI_SUB_ID CS5536_EHCI_DEVICE_ID |
| 118 | |
| 119 | /* EXPANSION ROM BAR */ |
| 120 | #define PCI_EXPANSION_ROM_BAR 0x00000000 |
| 121 | |
| 122 | /* CAPABILITIES POINTER */ |
| 123 | #define PCI_CAPLIST_POINTER 0x00000000 |
| 124 | #define PCI_CAPLIST_USB_POINTER 0x40 |
| 125 | /* INTERRUPT */ |
| 126 | |
| 127 | #define CFG_PCI_INTERRUPT_LINE(pin, mod_intr) \ |
| 128 | ((PCI_MAX_LATENCY << 24) | (PCI_MIN_GRANT << 16) | \ |
| 129 | ((pin) << 8) | (mod_intr)) |
| 130 | |
| 131 | #define PCI_MAX_LATENCY 0x40 |
| 132 | #define PCI_MIN_GRANT 0x00 |
| 133 | #define PCI_DEFAULT_PIN 0x01 |
| 134 | |
| 135 | /*********** EXPANSION PCI REG ************************/ |
| 136 | |
| 137 | /* |
| 138 | * ISA EXPANSION |
| 139 | */ |
| 140 | #define PCI_UART1_INT_REG 0x50 |
| 141 | #define PCI_UART2_INT_REG 0x54 |
| 142 | #define PCI_ISA_FIXUP_REG 0x58 |
| 143 | |
| 144 | /* |
| 145 | * IDE EXPANSION |
| 146 | */ |
| 147 | #define PCI_IDE_CFG_REG 0x40 |
| 148 | #define CS5536_IDE_FLASH_SIGNATURE 0xDEADBEEF |
| 149 | #define PCI_IDE_DTC_REG 0x48 |
| 150 | #define PCI_IDE_CAST_REG 0x4C |
| 151 | #define PCI_IDE_ETC_REG 0x50 |
| 152 | #define PCI_IDE_PM_REG 0x54 |
| 153 | #define PCI_IDE_INT_REG 0x60 |
| 154 | |
| 155 | /* |
| 156 | * ACC EXPANSION |
| 157 | */ |
| 158 | #define PCI_ACC_INT_REG 0x50 |
| 159 | |
| 160 | /* |
| 161 | * OHCI EXPANSION : INTTERUPT IS IMPLEMENTED BY THE OHCI |
| 162 | */ |
| 163 | #define PCI_OHCI_PM_REG 0x40 |
| 164 | #define PCI_OHCI_INT_REG 0x50 |
| 165 | |
| 166 | /* |
| 167 | * EHCI EXPANSION |
| 168 | */ |
| 169 | #define PCI_EHCI_LEGSMIEN_REG 0x50 |
| 170 | #define PCI_EHCI_LEGSMISTS_REG 0x54 |
| 171 | #define PCI_EHCI_FLADJ_REG 0x60 |
| 172 | |
| 173 | #endif /* _CS5536_PCI_H_ */ |
| 174 |
Warning: This file is not a C or C++ file. It does not have highlighting.