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| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
|---|---|
| 2 | #ifndef __ASM_MACH_LOONGSON64_IRQ_H_ |
| 3 | #define __ASM_MACH_LOONGSON64_IRQ_H_ |
| 4 | |
| 5 | /* cpu core interrupt numbers */ |
| 6 | #define NR_IRQS_LEGACY 16 |
| 7 | #define NR_MIPS_CPU_IRQS 8 |
| 8 | #define NR_MAX_CHAINED_IRQS 40 /* Chained IRQs means those not directly used by devices */ |
| 9 | #define NR_IRQS (NR_IRQS_LEGACY + NR_MIPS_CPU_IRQS + NR_MAX_CHAINED_IRQS + 256) |
| 10 | #define MAX_IO_PICS 1 |
| 11 | #define MIPS_CPU_IRQ_BASE NR_IRQS_LEGACY |
| 12 | #define GSI_MIN_CPU_IRQ 0 |
| 13 | |
| 14 | #include <asm/mach-generic/irq.h> |
| 15 | |
| 16 | #endif /* __ASM_MACH_LOONGSON64_IRQ_H_ */ |
| 17 |
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