1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * arch/powerpc/platforms/embedded6xx/flipper-pic.c
4 *
5 * Nintendo GameCube/Wii "Flipper" interrupt controller support.
6 * Copyright (C) 2004-2009 The GameCube Linux Team
7 * Copyright (C) 2007,2008,2009 Albert Herranz
8 */
9#define DRV_MODULE_NAME "flipper-pic"
10#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
11
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/irq.h>
15#include <linux/irqdomain.h>
16#include <linux/of.h>
17#include <linux/of_address.h>
18#include <asm/io.h>
19
20#include "flipper-pic.h"
21
22#define FLIPPER_NR_IRQS 32
23
24/*
25 * Each interrupt has a corresponding bit in both
26 * the Interrupt Cause (ICR) and Interrupt Mask (IMR) registers.
27 *
28 * Enabling/disabling an interrupt line involves setting/clearing
29 * the corresponding bit in IMR.
30 * Except for the RSW interrupt, all interrupts get deasserted automatically
31 * when the source deasserts the interrupt.
32 */
33#define FLIPPER_ICR 0x00
34#define FLIPPER_ICR_RSS (1<<16) /* reset switch state */
35
36#define FLIPPER_IMR 0x04
37
38#define FLIPPER_RESET 0x24
39
40
41/*
42 * IRQ chip hooks.
43 *
44 */
45
46static void flipper_pic_mask_and_ack(struct irq_data *d)
47{
48 int irq = irqd_to_hwirq(d);
49 void __iomem *io_base = irq_data_get_irq_chip_data(d);
50 u32 mask = 1 << irq;
51
52 clrbits32(io_base + FLIPPER_IMR, mask);
53 /* this is at least needed for RSW */
54 out_be32(io_base + FLIPPER_ICR, mask);
55}
56
57static void flipper_pic_ack(struct irq_data *d)
58{
59 int irq = irqd_to_hwirq(d);
60 void __iomem *io_base = irq_data_get_irq_chip_data(d);
61
62 /* this is at least needed for RSW */
63 out_be32(io_base + FLIPPER_ICR, 1 << irq);
64}
65
66static void flipper_pic_mask(struct irq_data *d)
67{
68 int irq = irqd_to_hwirq(d);
69 void __iomem *io_base = irq_data_get_irq_chip_data(d);
70
71 clrbits32(io_base + FLIPPER_IMR, 1 << irq);
72}
73
74static void flipper_pic_unmask(struct irq_data *d)
75{
76 int irq = irqd_to_hwirq(d);
77 void __iomem *io_base = irq_data_get_irq_chip_data(d);
78
79 setbits32(io_base + FLIPPER_IMR, 1 << irq);
80}
81
82
83static struct irq_chip flipper_pic = {
84 .name = "flipper-pic",
85 .irq_ack = flipper_pic_ack,
86 .irq_mask_ack = flipper_pic_mask_and_ack,
87 .irq_mask = flipper_pic_mask,
88 .irq_unmask = flipper_pic_unmask,
89};
90
91/*
92 * IRQ host hooks.
93 *
94 */
95
96static struct irq_domain *flipper_irq_host;
97
98static int flipper_pic_map(struct irq_domain *h, unsigned int virq,
99 irq_hw_number_t hwirq)
100{
101 irq_set_chip_data(irq: virq, data: h->host_data);
102 irq_set_status_flags(irq: virq, set: IRQ_LEVEL);
103 irq_set_chip_and_handler(irq: virq, chip: &flipper_pic, handle: handle_level_irq);
104 return 0;
105}
106
107static const struct irq_domain_ops flipper_irq_domain_ops = {
108 .map = flipper_pic_map,
109};
110
111/*
112 * Platform hooks.
113 *
114 */
115
116static void __flipper_quiesce(void __iomem *io_base)
117{
118 /* mask and ack all IRQs */
119 out_be32(io_base + FLIPPER_IMR, 0x00000000);
120 out_be32(io_base + FLIPPER_ICR, 0xffffffff);
121}
122
123static struct irq_domain * __init flipper_pic_init(struct device_node *np)
124{
125 struct device_node *pi;
126 struct irq_domain *irq_domain = NULL;
127 struct resource res;
128 void __iomem *io_base;
129 int retval;
130
131 pi = of_get_parent(node: np);
132 if (!pi) {
133 pr_err("no parent found\n");
134 goto out;
135 }
136 if (!of_device_is_compatible(device: pi, "nintendo,flipper-pi")) {
137 pr_err("unexpected parent compatible\n");
138 goto out;
139 }
140
141 retval = of_address_to_resource(dev: pi, index: 0, r: &res);
142 if (retval) {
143 pr_err("no io memory range found\n");
144 goto out;
145 }
146 io_base = ioremap(offset: res.start, size: resource_size(res: &res));
147
148 pr_info("controller at 0x%pa mapped to 0x%p\n", &res.start, io_base);
149
150 __flipper_quiesce(io_base);
151
152 irq_domain = irq_domain_create_linear(of_fwnode_handle(np),
153 FLIPPER_NR_IRQS,
154 ops: &flipper_irq_domain_ops, host_data: io_base);
155 if (!irq_domain) {
156 pr_err("failed to allocate irq_domain\n");
157 return NULL;
158 }
159
160out:
161 return irq_domain;
162}
163
164unsigned int flipper_pic_get_irq(void)
165{
166 void __iomem *io_base = flipper_irq_host->host_data;
167 int irq;
168 u32 irq_status;
169
170 irq_status = in_be32(io_base + FLIPPER_ICR) &
171 in_be32(io_base + FLIPPER_IMR);
172 if (irq_status == 0)
173 return 0; /* no more IRQs pending */
174
175 irq = __ffs(irq_status);
176 return irq_find_mapping(domain: flipper_irq_host, hwirq: irq);
177}
178
179/*
180 * Probe function.
181 *
182 */
183
184void __init flipper_pic_probe(void)
185{
186 struct device_node *np;
187
188 np = of_find_compatible_node(NULL, NULL, compat: "nintendo,flipper-pic");
189 BUG_ON(!np);
190
191 flipper_irq_host = flipper_pic_init(np);
192 BUG_ON(!flipper_irq_host);
193
194 irq_set_default_domain(domain: flipper_irq_host);
195
196 of_node_put(node: np);
197}
198
199/*
200 * Misc functions related to the flipper chipset.
201 *
202 */
203
204/**
205 * flipper_quiesce() - quiesce flipper irq controller
206 *
207 * Mask and ack all interrupt sources.
208 *
209 */
210void flipper_quiesce(void)
211{
212 void __iomem *io_base = flipper_irq_host->host_data;
213
214 __flipper_quiesce(io_base);
215}
216
217/*
218 * Resets the platform.
219 */
220void flipper_platform_reset(void)
221{
222 void __iomem *io_base;
223
224 if (flipper_irq_host && flipper_irq_host->host_data) {
225 io_base = flipper_irq_host->host_data;
226 out_8(io_base + FLIPPER_RESET, 0x00);
227 }
228}
229
230/*
231 * Returns non-zero if the reset button is pressed.
232 */
233int flipper_is_reset_button_pressed(void)
234{
235 void __iomem *io_base;
236 u32 icr;
237
238 if (flipper_irq_host && flipper_irq_host->host_data) {
239 io_base = flipper_irq_host->host_data;
240 icr = in_be32(io_base + FLIPPER_ICR);
241 return !(icr & FLIPPER_ICR_RSS);
242 }
243 return 0;
244}
245
246

source code of linux/arch/powerpc/platforms/embedded6xx/flipper-pic.c