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| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
|---|---|
| 2 | #ifndef _ASM_S390_PCI_DMA_H |
| 3 | #define _ASM_S390_PCI_DMA_H |
| 4 | |
| 5 | /* I/O Translation Anchor (IOTA) */ |
| 6 | enum zpci_ioat_dtype { |
| 7 | ZPCI_IOTA_STO = 0, |
| 8 | ZPCI_IOTA_RTTO = 1, |
| 9 | ZPCI_IOTA_RSTO = 2, |
| 10 | ZPCI_IOTA_RFTO = 3, |
| 11 | ZPCI_IOTA_PFAA = 4, |
| 12 | ZPCI_IOTA_IOPFAA = 5, |
| 13 | ZPCI_IOTA_IOPTO = 7 |
| 14 | }; |
| 15 | |
| 16 | #define ZPCI_IOTA_IOT_ENABLED 0x800UL |
| 17 | #define ZPCI_IOTA_DT_ST (ZPCI_IOTA_STO << 2) |
| 18 | #define ZPCI_IOTA_DT_RT (ZPCI_IOTA_RTTO << 2) |
| 19 | #define ZPCI_IOTA_DT_RS (ZPCI_IOTA_RSTO << 2) |
| 20 | #define ZPCI_IOTA_DT_RF (ZPCI_IOTA_RFTO << 2) |
| 21 | #define ZPCI_IOTA_DT_PF (ZPCI_IOTA_PFAA << 2) |
| 22 | #define ZPCI_IOTA_FS_4K 0 |
| 23 | #define ZPCI_IOTA_FS_1M 1 |
| 24 | #define ZPCI_IOTA_FS_2G 2 |
| 25 | #define ZPCI_KEY (PAGE_DEFAULT_KEY << 5) |
| 26 | |
| 27 | #define ZPCI_TABLE_SIZE_RT (1UL << 42) |
| 28 | #define ZPCI_TABLE_SIZE_RS (1UL << 53) |
| 29 | |
| 30 | #define ZPCI_IOTA_STO_FLAG (ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_ST) |
| 31 | #define ZPCI_IOTA_RTTO_FLAG (ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RT) |
| 32 | #define ZPCI_IOTA_RSTO_FLAG (ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RS) |
| 33 | #define ZPCI_IOTA_RFTO_FLAG (ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RF) |
| 34 | #define ZPCI_IOTA_RFAA_FLAG (ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_PF | ZPCI_IOTA_FS_2G) |
| 35 | |
| 36 | /* I/O Region and segment tables */ |
| 37 | #define ZPCI_INDEX_MASK 0x7ffUL |
| 38 | |
| 39 | #define ZPCI_TABLE_TYPE_MASK 0xc |
| 40 | #define ZPCI_TABLE_TYPE_RFX 0xc |
| 41 | #define ZPCI_TABLE_TYPE_RSX 0x8 |
| 42 | #define ZPCI_TABLE_TYPE_RTX 0x4 |
| 43 | #define ZPCI_TABLE_TYPE_SX 0x0 |
| 44 | |
| 45 | #define ZPCI_TABLE_LEN_RFX 0x3 |
| 46 | #define ZPCI_TABLE_LEN_RSX 0x3 |
| 47 | #define ZPCI_TABLE_LEN_RTX 0x3 |
| 48 | |
| 49 | #define ZPCI_TABLE_OFFSET_MASK 0xc0 |
| 50 | #define ZPCI_TABLE_SIZE 0x4000 |
| 51 | #define ZPCI_TABLE_ALIGN ZPCI_TABLE_SIZE |
| 52 | #define ZPCI_TABLE_ENTRY_SIZE (sizeof(unsigned long)) |
| 53 | #define ZPCI_TABLE_ENTRIES (ZPCI_TABLE_SIZE / ZPCI_TABLE_ENTRY_SIZE) |
| 54 | |
| 55 | #define ZPCI_TABLE_BITS 11 |
| 56 | #define ZPCI_PT_BITS 8 |
| 57 | #define ZPCI_ST_SHIFT (ZPCI_PT_BITS + PAGE_SHIFT) |
| 58 | #define ZPCI_RT_SHIFT (ZPCI_ST_SHIFT + ZPCI_TABLE_BITS) |
| 59 | #define ZPCI_RS_SHIFT (ZPCI_RT_SHIFT + ZPCI_TABLE_BITS) |
| 60 | #define ZPCI_RF_SHIFT (ZPCI_RS_SHIFT + ZPCI_TABLE_BITS) |
| 61 | |
| 62 | #define ZPCI_RTE_FLAG_MASK 0x3fffUL |
| 63 | #define ZPCI_RTE_ADDR_MASK (~ZPCI_RTE_FLAG_MASK) |
| 64 | #define ZPCI_STE_FLAG_MASK 0x7ffUL |
| 65 | #define ZPCI_STE_ADDR_MASK (~ZPCI_STE_FLAG_MASK) |
| 66 | |
| 67 | /* I/O Page tables */ |
| 68 | #define ZPCI_PTE_VALID_MASK 0x400 |
| 69 | #define ZPCI_PTE_INVALID 0x400 |
| 70 | #define ZPCI_PTE_VALID 0x000 |
| 71 | #define ZPCI_PT_SIZE 0x800 |
| 72 | #define ZPCI_PT_ALIGN ZPCI_PT_SIZE |
| 73 | #define ZPCI_PT_ENTRIES (ZPCI_PT_SIZE / ZPCI_TABLE_ENTRY_SIZE) |
| 74 | #define ZPCI_PT_MASK (ZPCI_PT_ENTRIES - 1) |
| 75 | |
| 76 | #define ZPCI_PTE_FLAG_MASK 0xfffUL |
| 77 | #define ZPCI_PTE_ADDR_MASK (~ZPCI_PTE_FLAG_MASK) |
| 78 | |
| 79 | /* Shared bits */ |
| 80 | #define ZPCI_TABLE_VALID 0x00 |
| 81 | #define ZPCI_TABLE_INVALID 0x20 |
| 82 | #define ZPCI_TABLE_PROTECTED 0x200 |
| 83 | #define ZPCI_TABLE_UNPROTECTED 0x000 |
| 84 | |
| 85 | #define ZPCI_TABLE_VALID_MASK 0x20 |
| 86 | #define ZPCI_TABLE_PROT_MASK 0x200 |
| 87 | |
| 88 | struct zpci_iommu_ctrs { |
| 89 | atomic64_t mapped_pages; |
| 90 | atomic64_t unmapped_pages; |
| 91 | atomic64_t global_rpcits; |
| 92 | atomic64_t sync_map_rpcits; |
| 93 | atomic64_t sync_rpcits; |
| 94 | }; |
| 95 | |
| 96 | struct zpci_dev; |
| 97 | |
| 98 | struct zpci_iommu_ctrs *zpci_get_iommu_ctrs(struct zpci_dev *zdev); |
| 99 | |
| 100 | #endif |
| 101 |
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