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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * S390 version
4 * Copyright IBM Corp. 1999, 2000
5 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 */
7#ifndef _S390_PTRACE_H
8#define _S390_PTRACE_H
9
10#include <linux/bits.h>
11#include <linux/typecheck.h>
12#include <uapi/asm/ptrace.h>
13#include <asm/thread_info.h>
14#include <asm/tpi.h>
15
16#define PIF_SYSCALL 0 /* inside a system call */
17#define PIF_PSW_ADDR_ADJUSTED 1 /* psw address has been adjusted */
18#define PIF_SYSCALL_RET_SET 2 /* return value was set via ptrace */
19#define PIF_GUEST_FAULT 3 /* indicates program check in sie64a */
20#define PIF_FTRACE_FULL_REGS 4 /* all register contents valid (ftrace) */
21
22#define _PIF_SYSCALL BIT(PIF_SYSCALL)
23#define _PIF_ADDR_PSW_ADJUSTED BIT(PIF_PSW_ADDR_ADJUSTED)
24#define _PIF_SYSCALL_RET_SET BIT(PIF_SYSCALL_RET_SET)
25#define _PIF_GUEST_FAULT BIT(PIF_GUEST_FAULT)
26#define _PIF_FTRACE_FULL_REGS BIT(PIF_FTRACE_FULL_REGS)
27
28#define PSW32_MASK_PER _AC(0x40000000, UL)
29#define PSW32_MASK_DAT _AC(0x04000000, UL)
30#define PSW32_MASK_IO _AC(0x02000000, UL)
31#define PSW32_MASK_EXT _AC(0x01000000, UL)
32#define PSW32_MASK_KEY _AC(0x00F00000, UL)
33#define PSW32_MASK_BASE _AC(0x00080000, UL) /* Always one */
34#define PSW32_MASK_MCHECK _AC(0x00040000, UL)
35#define PSW32_MASK_WAIT _AC(0x00020000, UL)
36#define PSW32_MASK_PSTATE _AC(0x00010000, UL)
37#define PSW32_MASK_ASC _AC(0x0000C000, UL)
38#define PSW32_MASK_CC _AC(0x00003000, UL)
39#define PSW32_MASK_PM _AC(0x00000f00, UL)
40#define PSW32_MASK_RI _AC(0x00000080, UL)
41
42#define PSW32_ADDR_AMODE _AC(0x80000000, UL)
43#define PSW32_ADDR_INSN _AC(0x7FFFFFFF, UL)
44
45#define PSW32_DEFAULT_KEY ((PAGE_DEFAULT_ACC) << 20)
46
47#define PSW32_ASC_PRIMARY _AC(0x00000000, UL)
48#define PSW32_ASC_ACCREG _AC(0x00004000, UL)
49#define PSW32_ASC_SECONDARY _AC(0x00008000, UL)
50#define PSW32_ASC_HOME _AC(0x0000C000, UL)
51
52#define PSW_DEFAULT_KEY ((PAGE_DEFAULT_ACC) << 52)
53
54#define PSW_KERNEL_BITS (PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_ASC_HOME | \
55 PSW_MASK_EA | PSW_MASK_BA | PSW_MASK_DAT)
56#define PSW_USER_BITS (PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \
57 PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_MASK_MCHECK | \
58 PSW_MASK_PSTATE | PSW_ASC_PRIMARY)
59
60#ifndef __ASSEMBLER__
61
62struct psw_bits {
63 unsigned long : 1;
64 unsigned long per : 1; /* PER-Mask */
65 unsigned long : 3;
66 unsigned long dat : 1; /* DAT Mode */
67 unsigned long io : 1; /* Input/Output Mask */
68 unsigned long ext : 1; /* External Mask */
69 unsigned long key : 4; /* PSW Key */
70 unsigned long : 1;
71 unsigned long mcheck : 1; /* Machine-Check Mask */
72 unsigned long wait : 1; /* Wait State */
73 unsigned long pstate : 1; /* Problem State */
74 unsigned long as : 2; /* Address Space Control */
75 unsigned long cc : 2; /* Condition Code */
76 unsigned long pm : 4; /* Program Mask */
77 unsigned long ri : 1; /* Runtime Instrumentation */
78 unsigned long : 6;
79 unsigned long eaba : 2; /* Addressing Mode */
80 unsigned long : 31;
81 unsigned long ia : 64; /* Instruction Address */
82};
83
84enum {
85 PSW_BITS_AMODE_24BIT = 0,
86 PSW_BITS_AMODE_31BIT = 1,
87 PSW_BITS_AMODE_64BIT = 3
88};
89
90enum {
91 PSW_BITS_AS_PRIMARY = 0,
92 PSW_BITS_AS_ACCREG = 1,
93 PSW_BITS_AS_SECONDARY = 2,
94 PSW_BITS_AS_HOME = 3
95};
96
97#define psw_bits(__psw) (*({ \
98 typecheck(psw_t, __psw); \
99 &(*(struct psw_bits *)(&(__psw))); \
100}))
101
102typedef struct {
103 unsigned int mask;
104 unsigned int addr;
105} psw32_t __aligned(8);
106
107#define PGM_INT_CODE_MASK 0x7f
108#define PGM_INT_CODE_PER 0x80
109
110/*
111 * The pt_regs struct defines the way the registers are stored on
112 * the stack during a system call.
113 */
114struct pt_regs {
115 union {
116 user_pt_regs user_regs;
117 struct {
118 unsigned long args[1];
119 psw_t psw;
120 unsigned long gprs[NUM_GPRS];
121 };
122 };
123 unsigned long orig_gpr2;
124 union {
125 struct {
126 unsigned int int_code;
127 unsigned int int_parm;
128 unsigned long int_parm_long;
129 };
130 struct tpi_info tpi_info;
131 };
132 unsigned long flags;
133 unsigned long last_break;
134};
135
136/*
137 * Program event recording (PER) register set.
138 */
139struct per_regs {
140 unsigned long control; /* PER control bits */
141 unsigned long start; /* PER starting address */
142 unsigned long end; /* PER ending address */
143};
144
145/*
146 * PER event contains information about the cause of the last PER exception.
147 */
148struct per_event {
149 unsigned short cause; /* PER code, ATMID and AI */
150 unsigned long address; /* PER address */
151 unsigned char paid; /* PER access identification */
152};
153
154/*
155 * Simplified per_info structure used to decode the ptrace user space ABI.
156 */
157struct per_struct_kernel {
158 unsigned long cr9; /* PER control bits */
159 unsigned long cr10; /* PER starting address */
160 unsigned long cr11; /* PER ending address */
161 unsigned long bits; /* Obsolete software bits */
162 unsigned long starting_addr; /* User specified start address */
163 unsigned long ending_addr; /* User specified end address */
164 unsigned short perc_atmid; /* PER trap ATMID */
165 unsigned long address; /* PER trap instruction address */
166 unsigned char access_id; /* PER trap access identification */
167};
168
169#define PER_EVENT_MASK 0xEB000000UL
170
171#define PER_EVENT_BRANCH 0x80000000UL
172#define PER_EVENT_IFETCH 0x40000000UL
173#define PER_EVENT_STORE 0x20000000UL
174#define PER_EVENT_STORE_REAL 0x08000000UL
175#define PER_EVENT_TRANSACTION_END 0x02000000UL
176#define PER_EVENT_NULLIFICATION 0x01000000UL
177
178#define PER_CONTROL_MASK 0x00e00000UL
179
180#define PER_CONTROL_BRANCH_ADDRESS 0x00800000UL
181#define PER_CONTROL_SUSPENSION 0x00400000UL
182#define PER_CONTROL_ALTERATION 0x00200000UL
183
184static inline void set_pt_regs_flag(struct pt_regs *regs, int flag)
185{
186 regs->flags |= (1UL << flag);
187}
188
189static inline void clear_pt_regs_flag(struct pt_regs *regs, int flag)
190{
191 regs->flags &= ~(1UL << flag);
192}
193
194static inline int test_pt_regs_flag(struct pt_regs *regs, int flag)
195{
196 return !!(regs->flags & (1UL << flag));
197}
198
199static inline int test_and_clear_pt_regs_flag(struct pt_regs *regs, int flag)
200{
201 int ret = test_pt_regs_flag(regs, flag);
202
203 clear_pt_regs_flag(regs, flag);
204 return ret;
205}
206
207struct task_struct;
208
209void update_cr_regs(struct task_struct *task);
210
211/*
212 * These are defined as per linux/ptrace.h, which see.
213 */
214#define arch_has_single_step() (1)
215#define arch_has_block_step() (1)
216
217#define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
218#define instruction_pointer(regs) ((regs)->psw.addr)
219#define user_stack_pointer(regs)((regs)->gprs[15])
220#define profile_pc(regs) instruction_pointer(regs)
221
222static inline long regs_return_value(struct pt_regs *regs)
223{
224 return regs->gprs[2];
225}
226
227static inline void instruction_pointer_set(struct pt_regs *regs,
228 unsigned long val)
229{
230 regs->psw.addr = val;
231}
232
233int regs_query_register_offset(const char *name);
234const char *regs_query_register_name(unsigned int offset);
235
236static __always_inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
237{
238 return regs->gprs[15];
239}
240
241static __always_inline unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset)
242{
243 if (offset >= NUM_GPRS)
244 return 0;
245 return regs->gprs[offset];
246}
247
248static __always_inline int regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr)
249{
250 unsigned long ksp = kernel_stack_pointer(regs);
251
252 return (addr & ~(THREAD_SIZE - 1)) == (ksp & ~(THREAD_SIZE - 1));
253}
254
255/**
256 * regs_get_kernel_stack_nth() - get Nth entry of the stack
257 * @regs:pt_regs which contains kernel stack pointer.
258 * @n:stack entry number.
259 *
260 * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
261 * is specifined by @regs. If the @n th entry is NOT in the kernel stack,
262 * this returns 0.
263 */
264static __always_inline unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)
265{
266 unsigned long addr;
267
268 addr = kernel_stack_pointer(regs) + n * sizeof(long);
269 if (!regs_within_kernel_stack(regs, addr))
270 return 0;
271 return READ_ONCE_NOCHECK(*(unsigned long *)addr);
272}
273
274/**
275 * regs_get_kernel_argument() - get Nth function argument in kernel
276 * @regs: pt_regs of that context
277 * @n: function argument number (start from 0)
278 *
279 * regs_get_kernel_argument() returns @n th argument of the function call.
280 */
281static inline unsigned long regs_get_kernel_argument(struct pt_regs *regs,
282 unsigned int n)
283{
284 unsigned int argoffset = STACK_FRAME_OVERHEAD / sizeof(long);
285
286#define NR_REG_ARGUMENTS 5
287 if (n < NR_REG_ARGUMENTS)
288 return regs_get_register(regs, 2 + n);
289 n -= NR_REG_ARGUMENTS;
290 return regs_get_kernel_stack_nth(regs, argoffset + n);
291}
292
293static inline void regs_set_return_value(struct pt_regs *regs, unsigned long rc)
294{
295 regs->gprs[2] = rc;
296}
297
298#endif /* __ASSEMBLER__ */
299#endif /* _S390_PTRACE_H */
300

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source code of linux/arch/s390/include/asm/ptrace.h