1/* SPDX-License-Identifier: GPL-2.0
2 *
3 * arch/sh/kernel/cpu/sh3/ex.S
4 *
5 * The SH-3 and SH-4 exception vector table.
6 *
7 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka
8 * Copyright (C) 2003 - 2008 Paul Mundt
9 */
10#include <linux/linkage.h>
11
12#if !defined(CONFIG_MMU)
13#define tlb_miss_load exception_error
14#define tlb_miss_store exception_error
15#define initial_page_write exception_error
16#define tlb_protection_violation_load exception_error
17#define tlb_protection_violation_store exception_error
18#define address_error_load exception_error
19#define address_error_store exception_error
20#endif
21
22#if !defined(CONFIG_SH_FPU)
23#define fpu_error_trap_handler exception_error
24#endif
25
26#if !defined(CONFIG_KGDB)
27#define kgdb_handle_exception exception_error
28#endif
29
30 .align 2
31 .data
32
33ENTRY(exception_handling_table)
34 .long exception_error /* 000 */
35 .long exception_error
36 .long tlb_miss_load /* 040 */
37 .long tlb_miss_store
38 .long initial_page_write
39 .long tlb_protection_violation_load
40 .long tlb_protection_violation_store
41 .long address_error_load
42 .long address_error_store /* 100 */
43 .long fpu_error_trap_handler /* 120 */
44 .long exception_error /* 140 */
45 .long system_call ! Unconditional Trap /* 160 */
46 .long exception_error ! reserved_instruction (filled by trap_init) /* 180 */
47 .long exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/
48 .long nmi_trap_handler /* 1C0 */ ! Allow trap to debugger
49 .long breakpoint_trap_handler /* 1E0 */
50
51 /*
52 * Pad the remainder of the table out, exceptions residing in far
53 * away offsets can be manually inserted in to their appropriate
54 * location via set_exception_table_{evt,vec}().
55 */
56 .balign 4096,0,4096
57

source code of linux/arch/sh/kernel/cpu/sh3/ex.S