1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * Architecture specific OF callbacks. |
4 | */ |
5 | #include <linux/export.h> |
6 | #include <linux/io.h> |
7 | #include <linux/interrupt.h> |
8 | #include <linux/list.h> |
9 | #include <linux/of.h> |
10 | #include <linux/of_fdt.h> |
11 | #include <linux/of_address.h> |
12 | #include <linux/of_platform.h> |
13 | #include <linux/of_irq.h> |
14 | #include <linux/libfdt.h> |
15 | #include <linux/slab.h> |
16 | #include <linux/pci.h> |
17 | #include <linux/of_pci.h> |
18 | #include <linux/initrd.h> |
19 | |
20 | #include <asm/irqdomain.h> |
21 | #include <asm/hpet.h> |
22 | #include <asm/apic.h> |
23 | #include <asm/io_apic.h> |
24 | #include <asm/pci_x86.h> |
25 | #include <asm/setup.h> |
26 | #include <asm/i8259.h> |
27 | #include <asm/prom.h> |
28 | |
29 | __initdata u64 initial_dtb; |
30 | char __initdata cmd_line[COMMAND_LINE_SIZE]; |
31 | |
32 | int __initdata of_ioapic; |
33 | |
34 | void __init add_dtb(u64 data) |
35 | { |
36 | initial_dtb = data + offsetof(struct setup_data, data); |
37 | } |
38 | |
39 | /* |
40 | * CE4100 ids. Will be moved to machine_device_initcall() once we have it. |
41 | */ |
42 | static struct of_device_id __initdata ce4100_ids[] = { |
43 | { .compatible = "intel,ce4100-cp" , }, |
44 | { .compatible = "isa" , }, |
45 | { .compatible = "pci" , }, |
46 | {}, |
47 | }; |
48 | |
49 | static int __init add_bus_probe(void) |
50 | { |
51 | if (!of_have_populated_dt()) |
52 | return 0; |
53 | |
54 | return of_platform_bus_probe(NULL, matches: ce4100_ids, NULL); |
55 | } |
56 | device_initcall(add_bus_probe); |
57 | |
58 | #ifdef CONFIG_PCI |
59 | struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus) |
60 | { |
61 | struct device_node *np; |
62 | |
63 | for_each_node_by_type(np, "pci" ) { |
64 | const void *prop; |
65 | unsigned int bus_min; |
66 | |
67 | prop = of_get_property(node: np, name: "bus-range" , NULL); |
68 | if (!prop) |
69 | continue; |
70 | bus_min = be32_to_cpup(p: prop); |
71 | if (bus->number == bus_min) |
72 | return np; |
73 | } |
74 | return NULL; |
75 | } |
76 | |
77 | static int x86_of_pci_irq_enable(struct pci_dev *dev) |
78 | { |
79 | u32 virq; |
80 | int ret; |
81 | u8 pin; |
82 | |
83 | ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, val: &pin); |
84 | if (ret) |
85 | return ret; |
86 | if (!pin) |
87 | return 0; |
88 | |
89 | virq = of_irq_parse_and_map_pci(dev, slot: 0, pin: 0); |
90 | if (virq == 0) |
91 | return -EINVAL; |
92 | dev->irq = virq; |
93 | return 0; |
94 | } |
95 | |
96 | static void x86_of_pci_irq_disable(struct pci_dev *dev) |
97 | { |
98 | } |
99 | |
100 | void x86_of_pci_init(void) |
101 | { |
102 | pcibios_enable_irq = x86_of_pci_irq_enable; |
103 | pcibios_disable_irq = x86_of_pci_irq_disable; |
104 | } |
105 | #endif |
106 | |
107 | static void __init dtb_setup_hpet(void) |
108 | { |
109 | #ifdef CONFIG_HPET_TIMER |
110 | struct device_node *dn; |
111 | struct resource r; |
112 | int ret; |
113 | |
114 | dn = of_find_compatible_node(NULL, NULL, compat: "intel,ce4100-hpet" ); |
115 | if (!dn) |
116 | return; |
117 | ret = of_address_to_resource(dev: dn, index: 0, r: &r); |
118 | if (ret) { |
119 | WARN_ON(1); |
120 | return; |
121 | } |
122 | hpet_address = r.start; |
123 | #endif |
124 | } |
125 | |
126 | #ifdef CONFIG_X86_LOCAL_APIC |
127 | |
128 | static void __init dtb_cpu_setup(void) |
129 | { |
130 | struct device_node *dn; |
131 | u32 apic_id; |
132 | |
133 | for_each_of_cpu_node(dn) { |
134 | apic_id = of_get_cpu_hwid(cpun: dn, thread: 0); |
135 | if (apic_id == ~0U) { |
136 | pr_warn("%pOF: missing local APIC ID\n" , dn); |
137 | continue; |
138 | } |
139 | generic_processor_info(apicid: apic_id); |
140 | } |
141 | } |
142 | |
143 | static void __init dtb_lapic_setup(void) |
144 | { |
145 | struct device_node *dn; |
146 | struct resource r; |
147 | unsigned long lapic_addr = APIC_DEFAULT_PHYS_BASE; |
148 | int ret; |
149 | |
150 | dn = of_find_compatible_node(NULL, NULL, compat: "intel,ce4100-lapic" ); |
151 | if (dn) { |
152 | ret = of_address_to_resource(dev: dn, index: 0, r: &r); |
153 | if (WARN_ON(ret)) |
154 | return; |
155 | lapic_addr = r.start; |
156 | } |
157 | |
158 | /* Did the boot loader setup the local APIC ? */ |
159 | if (!boot_cpu_has(X86_FEATURE_APIC)) { |
160 | /* Try force enabling, which registers the APIC address */ |
161 | if (!apic_force_enable(addr: lapic_addr)) |
162 | return; |
163 | } else { |
164 | register_lapic_address(address: lapic_addr); |
165 | } |
166 | smp_found_config = 1; |
167 | pic_mode = !of_property_read_bool(np: dn, propname: "intel,virtual-wire-mode" ); |
168 | pr_info("%s compatibility mode.\n" , pic_mode ? "IMCR and PIC" : "Virtual Wire" ); |
169 | } |
170 | |
171 | #endif /* CONFIG_X86_LOCAL_APIC */ |
172 | |
173 | #ifdef CONFIG_X86_IO_APIC |
174 | static unsigned int ioapic_id; |
175 | |
176 | struct of_ioapic_type { |
177 | u32 out_type; |
178 | u32 is_level; |
179 | u32 active_low; |
180 | }; |
181 | |
182 | static struct of_ioapic_type of_ioapic_type[] = |
183 | { |
184 | { |
185 | .out_type = IRQ_TYPE_EDGE_FALLING, |
186 | .is_level = 0, |
187 | .active_low = 1, |
188 | }, |
189 | { |
190 | .out_type = IRQ_TYPE_LEVEL_HIGH, |
191 | .is_level = 1, |
192 | .active_low = 0, |
193 | }, |
194 | { |
195 | .out_type = IRQ_TYPE_LEVEL_LOW, |
196 | .is_level = 1, |
197 | .active_low = 1, |
198 | }, |
199 | { |
200 | .out_type = IRQ_TYPE_EDGE_RISING, |
201 | .is_level = 0, |
202 | .active_low = 0, |
203 | }, |
204 | }; |
205 | |
206 | static int dt_irqdomain_alloc(struct irq_domain *domain, unsigned int virq, |
207 | unsigned int nr_irqs, void *arg) |
208 | { |
209 | struct irq_fwspec *fwspec = (struct irq_fwspec *)arg; |
210 | struct of_ioapic_type *it; |
211 | struct irq_alloc_info tmp; |
212 | int type_index; |
213 | |
214 | if (WARN_ON(fwspec->param_count < 2)) |
215 | return -EINVAL; |
216 | |
217 | type_index = fwspec->param[1]; |
218 | if (type_index >= ARRAY_SIZE(of_ioapic_type)) |
219 | return -EINVAL; |
220 | |
221 | it = &of_ioapic_type[type_index]; |
222 | ioapic_set_alloc_attr(info: &tmp, NUMA_NO_NODE, trigger: it->is_level, polarity: it->active_low); |
223 | tmp.devid = mpc_ioapic_id(ioapic: mp_irqdomain_ioapic_idx(domain)); |
224 | tmp.ioapic.pin = fwspec->param[0]; |
225 | |
226 | return mp_irqdomain_alloc(domain, virq, nr_irqs, arg: &tmp); |
227 | } |
228 | |
229 | static const struct irq_domain_ops ioapic_irq_domain_ops = { |
230 | .alloc = dt_irqdomain_alloc, |
231 | .free = mp_irqdomain_free, |
232 | .activate = mp_irqdomain_activate, |
233 | .deactivate = mp_irqdomain_deactivate, |
234 | }; |
235 | |
236 | static void __init dtb_add_ioapic(struct device_node *dn) |
237 | { |
238 | struct resource r; |
239 | int ret; |
240 | struct ioapic_domain_cfg cfg = { |
241 | .type = IOAPIC_DOMAIN_DYNAMIC, |
242 | .ops = &ioapic_irq_domain_ops, |
243 | .dev = dn, |
244 | }; |
245 | |
246 | ret = of_address_to_resource(dev: dn, index: 0, r: &r); |
247 | if (ret) { |
248 | pr_err("Can't obtain address from device node %pOF.\n" , dn); |
249 | return; |
250 | } |
251 | mp_register_ioapic(id: ++ioapic_id, address: r.start, gsi_base: gsi_top, cfg: &cfg); |
252 | } |
253 | |
254 | static void __init dtb_ioapic_setup(void) |
255 | { |
256 | struct device_node *dn; |
257 | |
258 | for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic" ) |
259 | dtb_add_ioapic(dn); |
260 | |
261 | if (nr_ioapics) { |
262 | of_ioapic = 1; |
263 | return; |
264 | } |
265 | pr_err("Error: No information about IO-APIC in OF.\n" ); |
266 | } |
267 | #else |
268 | static void __init dtb_ioapic_setup(void) {} |
269 | #endif |
270 | |
271 | static void __init dtb_apic_setup(void) |
272 | { |
273 | #ifdef CONFIG_X86_LOCAL_APIC |
274 | dtb_lapic_setup(); |
275 | dtb_cpu_setup(); |
276 | #endif |
277 | dtb_ioapic_setup(); |
278 | } |
279 | |
280 | #ifdef CONFIG_OF_EARLY_FLATTREE |
281 | void __init x86_flattree_get_config(void) |
282 | { |
283 | u32 size, map_len; |
284 | void *dt; |
285 | |
286 | if (!initial_dtb) |
287 | return; |
288 | |
289 | map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK), (u64)128); |
290 | |
291 | dt = early_memremap(phys_addr: initial_dtb, size: map_len); |
292 | size = fdt_totalsize(dt); |
293 | if (map_len < size) { |
294 | early_memunmap(addr: dt, size: map_len); |
295 | dt = early_memremap(phys_addr: initial_dtb, size); |
296 | map_len = size; |
297 | } |
298 | |
299 | early_init_dt_verify(params: dt); |
300 | unflatten_and_copy_device_tree(); |
301 | early_memunmap(addr: dt, size: map_len); |
302 | } |
303 | #endif |
304 | |
305 | void __init x86_dtb_init(void) |
306 | { |
307 | if (!of_have_populated_dt()) |
308 | return; |
309 | |
310 | dtb_setup_hpet(); |
311 | dtb_apic_setup(); |
312 | } |
313 | |