1/* SPDX-License-Identifier: GPL-2.0
2 *
3 * Copyright 2016-2018 HabanaLabs, Ltd.
4 * All Rights Reserved.
5 *
6 */
7
8/************************************
9 ** This is an auto-generated file **
10 ** DO NOT EDIT BELOW **
11 ************************************/
12
13#ifndef ASIC_REG_PSOC_GLOBAL_CONF_REGS_H_
14#define ASIC_REG_PSOC_GLOBAL_CONF_REGS_H_
15
16/*
17 *****************************************
18 * PSOC_GLOBAL_CONF (Prototype: GLOBAL_CONF)
19 *****************************************
20 */
21
22#define mmPSOC_GLOBAL_CONF_NON_RST_FLOPS_0 0xC4B000
23
24#define mmPSOC_GLOBAL_CONF_NON_RST_FLOPS_1 0xC4B004
25
26#define mmPSOC_GLOBAL_CONF_NON_RST_FLOPS_2 0xC4B008
27
28#define mmPSOC_GLOBAL_CONF_NON_RST_FLOPS_3 0xC4B00C
29
30#define mmPSOC_GLOBAL_CONF_PCI_FW_FSM 0xC4B020
31
32#define mmPSOC_GLOBAL_CONF_BOOT_SEQ_RE_START 0xC4B024
33
34#define mmPSOC_GLOBAL_CONF_BTM_FSM 0xC4B028
35
36#define mmPSOC_GLOBAL_CONF_SW_BTM_FSM 0xC4B030
37
38#define mmPSOC_GLOBAL_CONF_SW_BOOT_SEQ_FSM 0xC4B034
39
40#define mmPSOC_GLOBAL_CONF_BOOT_SEQ_TIMEOUT 0xC4B038
41
42#define mmPSOC_GLOBAL_CONF_SPI_MEM_EN 0xC4B040
43
44#define mmPSOC_GLOBAL_CONF_PRSTN 0xC4B044
45
46#define mmPSOC_GLOBAL_CONF_PCIE_EN 0xC4B048
47
48#define mmPSOC_GLOBAL_CONF_PCIE_PRSTN_INTR 0xC4B04C
49
50#define mmPSOC_GLOBAL_CONF_SPI_IMG_STS 0xC4B050
51
52#define mmPSOC_GLOBAL_CONF_BOOT_SEQ_FSM 0xC4B054
53
54#define mmPSOC_GLOBAL_CONF_BOOT_SEQ_EXT_LD 0xC4B058
55
56#define mmPSOC_GLOBAL_CONF_PHY_STABLE 0xC4B060
57
58#define mmPSOC_GLOBAL_CONF_PRSTN_OVR 0xC4B064
59
60#define mmPSOC_GLOBAL_CONF_ETR_FLUSH 0xC4B068
61
62#define mmPSOC_GLOBAL_CONF_COLD_RST_FLOPS_0 0xC4B070
63
64#define mmPSOC_GLOBAL_CONF_COLD_RST_FLOPS_1 0xC4B074
65
66#define mmPSOC_GLOBAL_CONF_COLD_RST_FLOPS_2 0xC4B078
67
68#define mmPSOC_GLOBAL_CONF_COLD_RST_FLOPS_3 0xC4B07C
69
70#define mmPSOC_GLOBAL_CONF_DIS_RAZWI_ERR 0xC4B080
71
72#define mmPSOC_GLOBAL_CONF_PCIE_PHY_RST_N 0xC4B084
73
74#define mmPSOC_GLOBAL_CONF_RAZWI 0xC4B088
75
76#define mmPSOC_GLOBAL_CONF_PROT 0xC4B090
77
78#define mmPSOC_GLOBAL_CONF_ADC 0xC4B094
79
80#define mmPSOC_GLOBAL_CONF_BOOT_SEQ_TO 0xC4B098
81
82#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_0 0xC4B100
83
84#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_1 0xC4B104
85
86#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_2 0xC4B108
87
88#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_3 0xC4B10C
89
90#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_4 0xC4B110
91
92#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_5 0xC4B114
93
94#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_6 0xC4B118
95
96#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_7 0xC4B11C
97
98#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_8 0xC4B120
99
100#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_9 0xC4B124
101
102#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_10 0xC4B128
103
104#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_11 0xC4B12C
105
106#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_12 0xC4B130
107
108#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_13 0xC4B134
109
110#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_14 0xC4B138
111
112#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_15 0xC4B13C
113
114#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_16 0xC4B140
115
116#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_17 0xC4B144
117
118#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_18 0xC4B148
119
120#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_19 0xC4B14C
121
122#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_20 0xC4B150
123
124#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_21 0xC4B154
125
126#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_22 0xC4B158
127
128#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_23 0xC4B15C
129
130#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_24 0xC4B160
131
132#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_25 0xC4B164
133
134#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_26 0xC4B168
135
136#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_27 0xC4B16C
137
138#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_28 0xC4B170
139
140#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_29 0xC4B174
141
142#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_30 0xC4B178
143
144#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_31 0xC4B17C
145
146#define mmPSOC_GLOBAL_CONF_SEMAPHORE_0 0xC4B200
147
148#define mmPSOC_GLOBAL_CONF_SEMAPHORE_1 0xC4B204
149
150#define mmPSOC_GLOBAL_CONF_SEMAPHORE_2 0xC4B208
151
152#define mmPSOC_GLOBAL_CONF_SEMAPHORE_3 0xC4B20C
153
154#define mmPSOC_GLOBAL_CONF_SEMAPHORE_4 0xC4B210
155
156#define mmPSOC_GLOBAL_CONF_SEMAPHORE_5 0xC4B214
157
158#define mmPSOC_GLOBAL_CONF_SEMAPHORE_6 0xC4B218
159
160#define mmPSOC_GLOBAL_CONF_SEMAPHORE_7 0xC4B21C
161
162#define mmPSOC_GLOBAL_CONF_SEMAPHORE_8 0xC4B220
163
164#define mmPSOC_GLOBAL_CONF_SEMAPHORE_9 0xC4B224
165
166#define mmPSOC_GLOBAL_CONF_SEMAPHORE_10 0xC4B228
167
168#define mmPSOC_GLOBAL_CONF_SEMAPHORE_11 0xC4B22C
169
170#define mmPSOC_GLOBAL_CONF_SEMAPHORE_12 0xC4B230
171
172#define mmPSOC_GLOBAL_CONF_SEMAPHORE_13 0xC4B234
173
174#define mmPSOC_GLOBAL_CONF_SEMAPHORE_14 0xC4B238
175
176#define mmPSOC_GLOBAL_CONF_SEMAPHORE_15 0xC4B23C
177
178#define mmPSOC_GLOBAL_CONF_SEMAPHORE_16 0xC4B240
179
180#define mmPSOC_GLOBAL_CONF_SEMAPHORE_17 0xC4B244
181
182#define mmPSOC_GLOBAL_CONF_SEMAPHORE_18 0xC4B248
183
184#define mmPSOC_GLOBAL_CONF_SEMAPHORE_19 0xC4B24C
185
186#define mmPSOC_GLOBAL_CONF_SEMAPHORE_20 0xC4B250
187
188#define mmPSOC_GLOBAL_CONF_SEMAPHORE_21 0xC4B254
189
190#define mmPSOC_GLOBAL_CONF_SEMAPHORE_22 0xC4B258
191
192#define mmPSOC_GLOBAL_CONF_SEMAPHORE_23 0xC4B25C
193
194#define mmPSOC_GLOBAL_CONF_SEMAPHORE_24 0xC4B260
195
196#define mmPSOC_GLOBAL_CONF_SEMAPHORE_25 0xC4B264
197
198#define mmPSOC_GLOBAL_CONF_SEMAPHORE_26 0xC4B268
199
200#define mmPSOC_GLOBAL_CONF_SEMAPHORE_27 0xC4B26C
201
202#define mmPSOC_GLOBAL_CONF_SEMAPHORE_28 0xC4B270
203
204#define mmPSOC_GLOBAL_CONF_SEMAPHORE_29 0xC4B274
205
206#define mmPSOC_GLOBAL_CONF_SEMAPHORE_30 0xC4B278
207
208#define mmPSOC_GLOBAL_CONF_SEMAPHORE_31 0xC4B27C
209
210#define mmPSOC_GLOBAL_CONF_CPU_BOOT_STATUS 0xC4B300
211
212#define mmPSOC_GLOBAL_CONF_KMD_MSG_TO_CPU 0xC4B304
213
214#define mmPSOC_GLOBAL_CONF_SPL_SOURCE 0xC4B308
215
216#define mmPSOC_GLOBAL_CONF_I2C_MSTR1_DBG 0xC4B30C
217
218#define mmPSOC_GLOBAL_CONF_I2C_SLV 0xC4B310
219
220#define mmPSOC_GLOBAL_CONF_I2C_SLV_INTR_MASK 0xC4B314
221
222#define mmPSOC_GLOBAL_CONF_TRACE_ADDR 0xC4B320
223
224#define mmPSOC_GLOBAL_CONF_ARUSER 0xC4B330
225
226#define mmPSOC_GLOBAL_CONF_AWUSER 0xC4B334
227
228#define mmPSOC_GLOBAL_CONF_TRACE_AWUSER 0xC4B338
229
230#define mmPSOC_GLOBAL_CONF_TRACE_ARUSER 0xC4B33C
231
232#define mmPSOC_GLOBAL_CONF_BTL_STS 0xC4B340
233
234#define mmPSOC_GLOBAL_CONF_TIMEOUT_INTR 0xC4B350
235
236#define mmPSOC_GLOBAL_CONF_COMB_TIMEOUT_INTR 0xC4B354
237
238#define mmPSOC_GLOBAL_CONF_PERIPH_INTR 0xC4B358
239
240#define mmPSOC_GLOBAL_CONF_COMB_PERIPH_INTR 0xC4B35C
241
242#define mmPSOC_GLOBAL_CONF_AXI_ERR_INTR 0xC4B360
243
244#define mmPSOC_GLOBAL_CONF_TARGETID 0xC4B400
245
246#define mmPSOC_GLOBAL_CONF_EMMC_INT_VOL_STABLE 0xC4B420
247
248#define mmPSOC_GLOBAL_CONF_BOOT_STRAP_PINS 0xC4B430
249
250#define mmPSOC_GLOBAL_CONF_MEM_REPAIR_DIV 0xC4B44C
251
252#define mmPSOC_GLOBAL_CONF_MEM_REPAIR_CTRL 0xC4B450
253
254#define mmPSOC_GLOBAL_CONF_MEM_REPAIR_STS 0xC4B454
255
256#define mmPSOC_GLOBAL_CONF_OUTSTANT_TRANS 0xC4B458
257
258#define mmPSOC_GLOBAL_CONF_MASK_REQ 0xC4B45C
259
260#define mmPSOC_GLOBAL_CONF_WD_RST_CFG_L 0xC4B460
261
262#define mmPSOC_GLOBAL_CONF_WD_RST_CFG_H 0xC4B464
263
264#define mmPSOC_GLOBAL_CONF_MNL_RST_CFG_L 0xC4B470
265
266#define mmPSOC_GLOBAL_CONF_MNL_RST_CFG_H 0xC4B474
267
268#define mmPSOC_GLOBAL_CONF_PRSTN_RST_CFG_L 0xC4B480
269
270#define mmPSOC_GLOBAL_CONF_PRSTN_RST_CFG_H 0xC4B484
271
272#define mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG_L 0xC4B490
273
274#define mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG_H 0xC4B494
275
276#define mmPSOC_GLOBAL_CONF_SW_ALL_RST 0xC4B498
277
278#define mmPSOC_GLOBAL_CONF_SOFT_RST 0xC4B4A0
279
280#define mmPSOC_GLOBAL_CONF_SOFT_RST_CFG_L 0xC4B4A4
281
282#define mmPSOC_GLOBAL_CONF_SOFT_RST_CFG_H 0xC4B4A8
283
284#define mmPSOC_GLOBAL_CONF_UNIT_RST_N 0xC4B4B0
285
286#define mmPSOC_GLOBAL_CONF_UNIT_RST_N_L 0xC4B4B4
287
288#define mmPSOC_GLOBAL_CONF_UNIT_RST_N_H 0xC4B4B8
289
290#define mmPSOC_GLOBAL_CONF_BTL_IMG 0xC4B4E0
291
292#define mmPSOC_GLOBAL_CONF_PRSTN_MASK 0xC4B4E4
293
294#define mmPSOC_GLOBAL_CONF_WD_MASK 0xC4B4E8
295
296#define mmPSOC_GLOBAL_CONF_RST_SRC 0xC4B4F0
297
298#define mmPSOC_GLOBAL_CONF_BOOT_STATE 0xC4B4F4
299
300#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_0 0xC4B500
301
302#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_1 0xC4B504
303
304#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_2 0xC4B508
305
306#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_3 0xC4B50C
307
308#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_4 0xC4B510
309
310#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_5 0xC4B514
311
312#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_6 0xC4B518
313
314#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_7 0xC4B51C
315
316#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_8 0xC4B520
317
318#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_9 0xC4B524
319
320#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_10 0xC4B528
321
322#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_11 0xC4B52C
323
324#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_12 0xC4B530
325
326#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_13 0xC4B534
327
328#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_14 0xC4B538
329
330#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_15 0xC4B53C
331
332#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_16 0xC4B540
333
334#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_17 0xC4B544
335
336#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_18 0xC4B548
337
338#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_19 0xC4B54C
339
340#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_20 0xC4B550
341
342#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_21 0xC4B554
343
344#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_22 0xC4B558
345
346#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_23 0xC4B55C
347
348#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_24 0xC4B560
349
350#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_25 0xC4B564
351
352#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_26 0xC4B568
353
354#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_27 0xC4B56C
355
356#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_28 0xC4B570
357
358#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_29 0xC4B574
359
360#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_30 0xC4B578
361
362#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_31 0xC4B57C
363
364#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_32 0xC4B580
365
366#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_33 0xC4B584
367
368#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_34 0xC4B588
369
370#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_35 0xC4B58C
371
372#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_36 0xC4B590
373
374#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_37 0xC4B594
375
376#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_38 0xC4B598
377
378#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_39 0xC4B59C
379
380#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_40 0xC4B5A0
381
382#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_41 0xC4B5A4
383
384#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_42 0xC4B5A8
385
386#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_43 0xC4B5AC
387
388#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_44 0xC4B5B0
389
390#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_45 0xC4B5B4
391
392#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_46 0xC4B5B8
393
394#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_47 0xC4B5BC
395
396#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_48 0xC4B5C0
397
398#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_49 0xC4B5C4
399
400#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_50 0xC4B5C8
401
402#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_51 0xC4B5CC
403
404#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_52 0xC4B5D0
405
406#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_53 0xC4B5D4
407
408#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_54 0xC4B5D8
409
410#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_55 0xC4B5DC
411
412#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_56 0xC4B5E0
413
414#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_57 0xC4B5E4
415
416#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_58 0xC4B5E8
417
418#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_59 0xC4B5EC
419
420#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_60 0xC4B5F0
421
422#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_61 0xC4B5F4
423
424#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_62 0xC4B5F8
425
426#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_63 0xC4B5FC
427
428#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_64 0xC4B600
429
430#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_65 0xC4B604
431
432#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_66 0xC4B608
433
434#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_67 0xC4B60C
435
436#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_68 0xC4B610
437
438#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_69 0xC4B614
439
440#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_70 0xC4B618
441
442#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_71 0xC4B61C
443
444#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_72 0xC4B620
445
446#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_73 0xC4B624
447
448#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_74 0xC4B628
449
450#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_75 0xC4B62C
451
452#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_76 0xC4B630
453
454#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_77 0xC4B634
455
456#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_78 0xC4B638
457
458#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_79 0xC4B63C
459
460#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_80 0xC4B640
461
462#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_81 0xC4B644
463
464#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_82 0xC4B648
465
466#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_83 0xC4B64C
467
468#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_84 0xC4B650
469
470#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_85 0xC4B654
471
472#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_86 0xC4B658
473
474#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_87 0xC4B65C
475
476#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_88 0xC4B660
477
478#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_89 0xC4B664
479
480#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_0 0xC4B690
481
482#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_1 0xC4B694
483
484#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_2 0xC4B698
485
486#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_3 0xC4B69C
487
488#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_4 0xC4B6A0
489
490#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_5 0xC4B6A4
491
492#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_6 0xC4B6A8
493
494#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_7 0xC4B6AC
495
496#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_8 0xC4B6B0
497
498#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_9 0xC4B6B4
499
500#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_10 0xC4B6B8
501
502#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_11 0xC4B6BC
503
504#define mmPSOC_GLOBAL_CONF_PAD_1V8_INPUT_0 0xC4B6C0
505
506#define mmPSOC_GLOBAL_CONF_PAD_1V8_INPUT_1 0xC4B6C4
507
508#define mmPSOC_GLOBAL_CONF_PAD_1V8_INPUT_2 0xC4B6C8
509
510#define mmPSOC_GLOBAL_CONF_PAD_1V8_INPUT_3 0xC4B6CC
511
512#define mmPSOC_GLOBAL_CONF_PAD_1V8_INPUT_4 0xC4B6D0
513
514#define mmPSOC_GLOBAL_CONF_PAD_1V8_INPUT_5 0xC4B6D4
515
516#define mmPSOC_GLOBAL_CONF_PAD_1V8_INPUT_6 0xC4B6D8
517
518#define mmPSOC_GLOBAL_CONF_PAD_1V8_INPUT_7 0xC4B6DC
519
520#define mmPSOC_GLOBAL_CONF_BNK3V3_MS 0xC4B710
521
522#define mmPSOC_GLOBAL_CONF_ADC_CLK_FREQ 0xC4B720
523
524#define mmPSOC_GLOBAL_CONF_ADC_DELAY_FROM_START 0xC4B724
525
526#define mmPSOC_GLOBAL_CONF_ADC_DATA_SAMPLES 0xC4B728
527
528#define mmPSOC_GLOBAL_CONF_ADC_TPH_CS 0xC4B72C
529
530#define mmPSOC_GLOBAL_CONF_ADC_LSB_NMSB 0xC4B730
531
532#define mmPSOC_GLOBAL_CONF_ADC_ONE_NCONTIUES 0xC4B734
533
534#define mmPSOC_GLOBAL_CONF_ADC_BLOCK_ENABLE 0xC4B738
535
536#define mmPSOC_GLOBAL_CONF_ADC_CFG_DATA 0xC4B73C
537
538#define mmPSOC_GLOBAL_CONF_ADC_TDV_CSDO 0xC4B740
539
540#define mmPSOC_GLOBAL_CONF_ADC_TSU_CSCK 0xC4B744
541
542#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_0 0xC4B800
543
544#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_1 0xC4B804
545
546#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_2 0xC4B808
547
548#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_3 0xC4B80C
549
550#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_4 0xC4B810
551
552#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_5 0xC4B814
553
554#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_6 0xC4B818
555
556#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_7 0xC4B81C
557
558#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_8 0xC4B820
559
560#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_9 0xC4B824
561
562#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_10 0xC4B828
563
564#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_11 0xC4B82C
565
566#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_12 0xC4B830
567
568#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_13 0xC4B834
569
570#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_14 0xC4B838
571
572#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_15 0xC4B83C
573
574#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_16 0xC4B840
575
576#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_17 0xC4B844
577
578#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_18 0xC4B848
579
580#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_19 0xC4B84C
581
582#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_20 0xC4B850
583
584#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_21 0xC4B854
585
586#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_22 0xC4B858
587
588#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_23 0xC4B85C
589
590#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_24 0xC4B860
591
592#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_25 0xC4B864
593
594#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_26 0xC4B868
595
596#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_27 0xC4B86C
597
598#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_28 0xC4B870
599
600#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_29 0xC4B874
601
602#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_30 0xC4B878
603
604#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_31 0xC4B87C
605
606#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_32 0xC4B880
607
608#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_33 0xC4B884
609
610#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_34 0xC4B888
611
612#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_35 0xC4B88C
613
614#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_36 0xC4B890
615
616#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_37 0xC4B894
617
618#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_38 0xC4B898
619
620#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_39 0xC4B89C
621
622#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_40 0xC4B8A0
623
624#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_41 0xC4B8A4
625
626#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_42 0xC4B8A8
627
628#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_43 0xC4B8AC
629
630#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_44 0xC4B8B0
631
632#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_45 0xC4B8B4
633
634#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_46 0xC4B8B8
635
636#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_47 0xC4B8BC
637
638#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_48 0xC4B8C0
639
640#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_49 0xC4B8C4
641
642#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_50 0xC4B8C8
643
644#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_51 0xC4B8CC
645
646#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_52 0xC4B8D0
647
648#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_53 0xC4B8D4
649
650#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_54 0xC4B8D8
651
652#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_55 0xC4B8DC
653
654#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_56 0xC4B8E0
655
656#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_57 0xC4B8E4
657
658#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_58 0xC4B8E8
659
660#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_59 0xC4B8EC
661
662#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_60 0xC4B8F0
663
664#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_61 0xC4B8F4
665
666#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_62 0xC4B8F8
667
668#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_63 0xC4B8FC
669
670#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_64 0xC4B900
671
672#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_65 0xC4B904
673
674#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_66 0xC4B908
675
676#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_67 0xC4B90C
677
678#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_68 0xC4B910
679
680#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_69 0xC4B914
681
682#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_70 0xC4B918
683
684#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_71 0xC4B91C
685
686#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_72 0xC4B920
687
688#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_73 0xC4B924
689
690#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_74 0xC4B928
691
692#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_75 0xC4B92C
693
694#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_76 0xC4B930
695
696#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_77 0xC4B934
697
698#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_78 0xC4B938
699
700#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_79 0xC4B93C
701
702#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_80 0xC4B940
703
704#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_81 0xC4B944
705
706#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_82 0xC4B948
707
708#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_83 0xC4B94C
709
710#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_84 0xC4B950
711
712#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_85 0xC4B954
713
714#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_86 0xC4B958
715
716#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_87 0xC4B95C
717
718#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_88 0xC4B960
719
720#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_89 0xC4B964
721
722#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_90 0xC4B968
723
724#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_91 0xC4B96C
725
726#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_92 0xC4B970
727
728#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_93 0xC4B974
729
730#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_94 0xC4B978
731
732#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_95 0xC4B97C
733
734#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_96 0xC4B980
735
736#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_97 0xC4B984
737
738#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_98 0xC4B988
739
740#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_99 0xC4B98C
741
742#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_100 0xC4B990
743
744#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_101 0xC4B994
745
746#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_102 0xC4B998
747
748#define mmPSOC_GLOBAL_CONF_PAD_SEL_0 0xC4BA00
749
750#define mmPSOC_GLOBAL_CONF_PAD_SEL_1 0xC4BA04
751
752#define mmPSOC_GLOBAL_CONF_PAD_SEL_2 0xC4BA08
753
754#define mmPSOC_GLOBAL_CONF_PAD_SEL_3 0xC4BA0C
755
756#define mmPSOC_GLOBAL_CONF_PAD_SEL_4 0xC4BA10
757
758#define mmPSOC_GLOBAL_CONF_PAD_SEL_5 0xC4BA14
759
760#define mmPSOC_GLOBAL_CONF_PAD_SEL_6 0xC4BA18
761
762#define mmPSOC_GLOBAL_CONF_PAD_SEL_7 0xC4BA1C
763
764#define mmPSOC_GLOBAL_CONF_PAD_SEL_8 0xC4BA20
765
766#define mmPSOC_GLOBAL_CONF_PAD_SEL_9 0xC4BA24
767
768#define mmPSOC_GLOBAL_CONF_PAD_SEL_10 0xC4BA28
769
770#define mmPSOC_GLOBAL_CONF_PAD_SEL_11 0xC4BA2C
771
772#define mmPSOC_GLOBAL_CONF_PAD_SEL_12 0xC4BA30
773
774#define mmPSOC_GLOBAL_CONF_PAD_SEL_13 0xC4BA34
775
776#define mmPSOC_GLOBAL_CONF_PAD_SEL_14 0xC4BA38
777
778#define mmPSOC_GLOBAL_CONF_PAD_SEL_15 0xC4BA3C
779
780#define mmPSOC_GLOBAL_CONF_PAD_SEL_16 0xC4BA40
781
782#define mmPSOC_GLOBAL_CONF_PAD_SEL_17 0xC4BA44
783
784#define mmPSOC_GLOBAL_CONF_PAD_SEL_18 0xC4BA48
785
786#define mmPSOC_GLOBAL_CONF_PAD_SEL_19 0xC4BA4C
787
788#define mmPSOC_GLOBAL_CONF_PAD_SEL_20 0xC4BA50
789
790#define mmPSOC_GLOBAL_CONF_PAD_SEL_21 0xC4BA54
791
792#define mmPSOC_GLOBAL_CONF_PAD_SEL_22 0xC4BA58
793
794#define mmPSOC_GLOBAL_CONF_PAD_SEL_23 0xC4BA5C
795
796#define mmPSOC_GLOBAL_CONF_PAD_SEL_24 0xC4BA60
797
798#define mmPSOC_GLOBAL_CONF_PAD_SEL_25 0xC4BA64
799
800#define mmPSOC_GLOBAL_CONF_PAD_SEL_26 0xC4BA68
801
802#define mmPSOC_GLOBAL_CONF_PAD_SEL_27 0xC4BA6C
803
804#define mmPSOC_GLOBAL_CONF_PAD_SEL_28 0xC4BA70
805
806#define mmPSOC_GLOBAL_CONF_PAD_SEL_29 0xC4BA74
807
808#define mmPSOC_GLOBAL_CONF_PAD_SEL_30 0xC4BA78
809
810#define mmPSOC_GLOBAL_CONF_PAD_SEL_31 0xC4BA7C
811
812#define mmPSOC_GLOBAL_CONF_PAD_SEL_32 0xC4BA80
813
814#define mmPSOC_GLOBAL_CONF_PAD_SEL_33 0xC4BA84
815
816#define mmPSOC_GLOBAL_CONF_PAD_SEL_34 0xC4BA88
817
818#define mmPSOC_GLOBAL_CONF_PAD_SEL_35 0xC4BA8C
819
820#define mmPSOC_GLOBAL_CONF_PAD_SEL_36 0xC4BA90
821
822#define mmPSOC_GLOBAL_CONF_PAD_SEL_37 0xC4BA94
823
824#define mmPSOC_GLOBAL_CONF_PAD_SEL_38 0xC4BA98
825
826#define mmPSOC_GLOBAL_CONF_PAD_SEL_39 0xC4BA9C
827
828#define mmPSOC_GLOBAL_CONF_PAD_SEL_40 0xC4BAA0
829
830#define mmPSOC_GLOBAL_CONF_PAD_SEL_41 0xC4BAA4
831
832#define mmPSOC_GLOBAL_CONF_PAD_SEL_42 0xC4BAA8
833
834#define mmPSOC_GLOBAL_CONF_PAD_SEL_43 0xC4BAAC
835
836#define mmPSOC_GLOBAL_CONF_PAD_SEL_44 0xC4BAB0
837
838#define mmPSOC_GLOBAL_CONF_PAD_SEL_45 0xC4BAB4
839
840#define mmPSOC_GLOBAL_CONF_PAD_SEL_46 0xC4BAB8
841
842#define mmPSOC_GLOBAL_CONF_PAD_SEL_47 0xC4BABC
843
844#define mmPSOC_GLOBAL_CONF_PAD_SEL_48 0xC4BAC0
845
846#define mmPSOC_GLOBAL_CONF_PAD_SEL_49 0xC4BAC4
847
848#define mmPSOC_GLOBAL_CONF_PAD_SEL_50 0xC4BAC8
849
850#define mmPSOC_GLOBAL_CONF_PAD_SEL_51 0xC4BACC
851
852#define mmPSOC_GLOBAL_CONF_PAD_SEL_52 0xC4BAD0
853
854#define mmPSOC_GLOBAL_CONF_PAD_SEL_53 0xC4BAD4
855
856#define mmPSOC_GLOBAL_CONF_PAD_SEL_54 0xC4BAD8
857
858#define mmPSOC_GLOBAL_CONF_PAD_SEL_55 0xC4BADC
859
860#define mmPSOC_GLOBAL_CONF_PAD_SEL_56 0xC4BAE0
861
862#define mmPSOC_GLOBAL_CONF_PAD_SEL_57 0xC4BAE4
863
864#define mmPSOC_GLOBAL_CONF_PAD_SEL_58 0xC4BAE8
865
866#define mmPSOC_GLOBAL_CONF_PAD_SEL_59 0xC4BAEC
867
868#define mmPSOC_GLOBAL_CONF_PAD_SEL_60 0xC4BAF0
869
870#define mmPSOC_GLOBAL_CONF_PAD_SEL_61 0xC4BAF4
871
872#define mmPSOC_GLOBAL_CONF_PAD_SEL_62 0xC4BAF8
873
874#define mmPSOC_GLOBAL_CONF_PAD_SEL_63 0xC4BAFC
875
876#define mmPSOC_GLOBAL_CONF_PAD_SEL_64 0xC4BB00
877
878#define mmPSOC_GLOBAL_CONF_PAD_SEL_65 0xC4BB04
879
880#define mmPSOC_GLOBAL_CONF_PAD_SEL_66 0xC4BB08
881
882#define mmPSOC_GLOBAL_CONF_PAD_SEL_67 0xC4BB0C
883
884#define mmPSOC_GLOBAL_CONF_PAD_SEL_68 0xC4BB10
885
886#define mmPSOC_GLOBAL_CONF_PAD_SEL_69 0xC4BB14
887
888#define mmPSOC_GLOBAL_CONF_PAD_SEL_70 0xC4BB18
889
890#define mmPSOC_GLOBAL_CONF_PAD_SEL_71 0xC4BB1C
891
892#define mmPSOC_GLOBAL_CONF_PAD_SEL_72 0xC4BB20
893
894#define mmPSOC_GLOBAL_CONF_PAD_SEL_73 0xC4BB24
895
896#define mmPSOC_GLOBAL_CONF_PAD_SEL_74 0xC4BB28
897
898#define mmPSOC_GLOBAL_CONF_PAD_SEL_75 0xC4BB2C
899
900#define mmPSOC_GLOBAL_CONF_PAD_SEL_76 0xC4BB30
901
902#define mmPSOC_GLOBAL_CONF_PAD_SEL_77 0xC4BB34
903
904#define mmPSOC_GLOBAL_CONF_PAD_SEL_78 0xC4BB38
905
906#define mmPSOC_GLOBAL_CONF_PAD_SEL_79 0xC4BB3C
907
908#define mmPSOC_GLOBAL_CONF_PAD_SEL_80 0xC4BB40
909
910#define mmPSOC_GLOBAL_CONF_PAD_SEL_81 0xC4BB44
911
912#define mmPSOC_GLOBAL_CONF_PAD_SEL_82 0xC4BB48
913
914#define mmPSOC_GLOBAL_CONF_PAD_SEL_83 0xC4BB4C
915
916#define mmPSOC_GLOBAL_CONF_PAD_SEL_84 0xC4BB50
917
918#define mmPSOC_GLOBAL_CONF_PAD_SEL_85 0xC4BB54
919
920#define mmPSOC_GLOBAL_CONF_PAD_SEL_86 0xC4BB58
921
922#define mmPSOC_GLOBAL_CONF_PAD_SEL_87 0xC4BB5C
923
924#define mmPSOC_GLOBAL_CONF_PAD_SEL_88 0xC4BB60
925
926#define mmPSOC_GLOBAL_CONF_PAD_SEL_89 0xC4BB64
927
928#define mmPSOC_GLOBAL_CONF_PAD_SEL_90 0xC4BB68
929
930#define mmPSOC_GLOBAL_CONF_PAD_SEL_91 0xC4BB6C
931
932#define mmPSOC_GLOBAL_CONF_PAD_SEL_92 0xC4BB70
933
934#define mmPSOC_GLOBAL_CONF_PAD_SEL_93 0xC4BB74
935
936#define mmPSOC_GLOBAL_CONF_PAD_SEL_94 0xC4BB78
937
938#define mmPSOC_GLOBAL_CONF_PAD_SEL_95 0xC4BB7C
939
940#define mmPSOC_GLOBAL_CONF_PAD_SEL_96 0xC4BB80
941
942#define mmPSOC_GLOBAL_CONF_PAD_SEL_97 0xC4BB84
943
944#define mmPSOC_GLOBAL_CONF_PAD_SEL_98 0xC4BB88
945
946#define mmPSOC_GLOBAL_CONF_PAD_SEL_99 0xC4BB8C
947
948#define mmPSOC_GLOBAL_CONF_PAD_SEL_100 0xC4BB90
949
950#define mmPSOC_GLOBAL_CONF_PAD_SEL_101 0xC4BB94
951
952#define mmPSOC_GLOBAL_CONF_PAD_SEL_102 0xC4BB98
953
954#define mmPSOC_GLOBAL_CONF_RST_CTRL_0 0xC4BC00
955
956#define mmPSOC_GLOBAL_CONF_RST_CTRL_1 0xC4BC04
957
958#define mmPSOC_GLOBAL_CONF_RST_CTRL_2 0xC4BC08
959
960#define mmPSOC_GLOBAL_CONF_RST_CTRL_3 0xC4BC0C
961
962#define mmPSOC_GLOBAL_CONF_RST_CTRL_4 0xC4BC10
963
964#define mmPSOC_GLOBAL_CONF_RST_CTRL_5 0xC4BC14
965
966#define mmPSOC_GLOBAL_CONF_RST_CTRL_6 0xC4BC18
967
968#define mmPSOC_GLOBAL_CONF_RST_CTRL_7 0xC4BC1C
969
970#define mmPSOC_GLOBAL_CONF_RST_CTRL_8 0xC4BC20
971
972#define mmPSOC_GLOBAL_CONF_RST_CTRL_9 0xC4BC24
973
974#define mmPSOC_GLOBAL_CONF_RST_CTRL_10 0xC4BC28
975
976#define mmPSOC_GLOBAL_CONF_RST_CTRL_11 0xC4BC2C
977
978#define mmPSOC_GLOBAL_CONF_RST_CTRL_12 0xC4BC30
979
980#define mmPSOC_GLOBAL_CONF_RST_CTRL_13 0xC4BC34
981
982#define mmPSOC_GLOBAL_CONF_RST_CTRL_14 0xC4BC38
983
984#define mmPSOC_GLOBAL_CONF_RST_CTRL_15 0xC4BC3C
985
986#define mmPSOC_GLOBAL_CONF_RST_CTRL_16 0xC4BC40
987
988#define mmPSOC_GLOBAL_CONF_RST_CTRL_17 0xC4BC44
989
990#define mmPSOC_GLOBAL_CONF_RST_CTRL_18 0xC4BC48
991
992#define mmPSOC_GLOBAL_CONF_RST_CTRL_19 0xC4BC4C
993
994#define mmPSOC_GLOBAL_CONF_RST_CTRL_20 0xC4BC50
995
996#define mmPSOC_GLOBAL_CONF_RST_CTRL_21 0xC4BC54
997
998#define mmPSOC_GLOBAL_CONF_RST_CTRL_22 0xC4BC58
999
1000#define mmPSOC_GLOBAL_CONF_RST_CTRL_23 0xC4BC5C
1001
1002#define mmPSOC_GLOBAL_CONF_RST_CTRL_24 0xC4BC60
1003
1004#define mmPSOC_GLOBAL_CONF_RST_CTRL_25 0xC4BC64
1005
1006#define mmPSOC_GLOBAL_CONF_RST_CTRL_26 0xC4BC68
1007
1008#define mmPSOC_GLOBAL_CONF_RST_CTRL_27 0xC4BC6C
1009
1010#define mmPSOC_GLOBAL_CONF_RST_CTRL_28 0xC4BC70
1011
1012#define mmPSOC_GLOBAL_CONF_RST_CTRL_29 0xC4BC74
1013
1014#define mmPSOC_GLOBAL_CONF_RST_CTRL_30 0xC4BC78
1015
1016#define mmPSOC_GLOBAL_CONF_RST_CTRL_31 0xC4BC7C
1017
1018#define mmPSOC_GLOBAL_CONF_RST_CTRL_32 0xC4BC80
1019
1020#define mmPSOC_GLOBAL_CONF_RST_CTRL_33 0xC4BC84
1021
1022#define mmPSOC_GLOBAL_CONF_RST_CTRL_34 0xC4BC88
1023
1024#define mmPSOC_GLOBAL_CONF_RST_CTRL_35 0xC4BC8C
1025
1026#define mmPSOC_GLOBAL_CONF_RST_CTRL_36 0xC4BC90
1027
1028#define mmPSOC_GLOBAL_CONF_RST_CTRL_37 0xC4BC94
1029
1030#define mmPSOC_GLOBAL_CONF_RST_CTRL_38 0xC4BC98
1031
1032#define mmPSOC_GLOBAL_CONF_RST_CTRL_39 0xC4BC9C
1033
1034#define mmPSOC_GLOBAL_CONF_RST_CTRL_40 0xC4BCA0
1035
1036#define mmPSOC_GLOBAL_CONF_RST_CTRL_41 0xC4BCA4
1037
1038#define mmPSOC_GLOBAL_CONF_RST_CTRL_42 0xC4BCA8
1039
1040#define mmPSOC_GLOBAL_CONF_RST_CTRL_43 0xC4BCAC
1041
1042#define mmPSOC_GLOBAL_CONF_RST_CTRL_44 0xC4BCB0
1043
1044#define mmPSOC_GLOBAL_CONF_RST_CTRL_45 0xC4BCB4
1045
1046#define mmPSOC_GLOBAL_CONF_RST_CTRL_46 0xC4BCB8
1047
1048#define mmPSOC_GLOBAL_CONF_RST_CTRL_47 0xC4BCBC
1049
1050#define mmPSOC_GLOBAL_CONF_RST_CTRL_48 0xC4BCC0
1051
1052#define mmPSOC_GLOBAL_CONF_RST_CTRL_49 0xC4BCC4
1053
1054#define mmPSOC_GLOBAL_CONF_RST_CTRL_50 0xC4BCC8
1055
1056#define mmPSOC_GLOBAL_CONF_RST_CTRL_51 0xC4BCCC
1057
1058#define mmPSOC_GLOBAL_CONF_RST_CTRL_52 0xC4BCD0
1059
1060#define mmPSOC_GLOBAL_CONF_RST_CTRL_53 0xC4BCD4
1061
1062#endif /* ASIC_REG_PSOC_GLOBAL_CONF_REGS_H_ */
1063

source code of linux/drivers/accel/habanalabs/include/gaudi/asic_reg/psoc_global_conf_regs.h