| 1 | /* SPDX-License-Identifier: GPL-2.0 |
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| 2 | * |
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| 3 | * Copyright 2016-2020 HabanaLabs, Ltd. |
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| 4 | * All Rights Reserved. |
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| 5 | * |
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| 6 | */ |
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| 7 | |
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| 8 | /************************************ |
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| 9 | ** This is an auto-generated file ** |
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| 10 | ** DO NOT EDIT BELOW ** |
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| 11 | ************************************/ |
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| 12 | |
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| 13 | #ifndef ASIC_REG_DCORE0_TPC0_CFG_KERNEL_TENSOR_0_REGS_H_ |
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| 14 | #define ASIC_REG_DCORE0_TPC0_CFG_KERNEL_TENSOR_0_REGS_H_ |
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| 15 | |
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| 16 | /* |
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| 17 | ***************************************** |
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| 18 | * DCORE0_TPC0_CFG_KERNEL_TENSOR_0 |
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| 19 | * (Prototype: TPC_TENSOR) |
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| 20 | ***************************************** |
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| 21 | */ |
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| 22 | |
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| 23 | #define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_BASE_ADDR_LOW 0x400B000 |
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| 24 | |
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| 25 | #define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_BASE_ADDR_HIGH 0x400B004 |
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| 26 | |
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| 27 | #define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_PADDING_VALUE 0x400B008 |
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| 28 | |
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| 29 | #define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_TENSOR_CONFIG 0x400B00C |
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| 30 | |
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| 31 | #define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_0_SIZE 0x400B010 |
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| 32 | |
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| 33 | #define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_0_STRIDE 0x400B014 |
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| 34 | |
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| 35 | #define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_1_SIZE 0x400B018 |
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| 36 | |
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| 37 | #define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_1_STRIDE 0x400B01C |
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| 38 | |
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| 39 | #define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_2_SIZE 0x400B020 |
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| 40 | |
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| 41 | #define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_2_STRIDE 0x400B024 |
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| 42 | |
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| 43 | #define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_3_SIZE 0x400B028 |
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| 44 | |
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| 45 | #define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_3_STRIDE 0x400B02C |
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| 46 | |
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| 47 | #define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_4_SIZE 0x400B030 |
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| 48 | |
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| 49 | #define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_4_STRIDE 0x400B034 |
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| 50 | |
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| 51 | #define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_PREF_STRIDE 0x400B038 |
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| 52 | |
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| 53 | #define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_0_SIZE_STRIDE_HIGH 0x400B03C |
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| 54 | |
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| 55 | #define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_1_SIZE_STRIDE_HIGH 0x400B040 |
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| 56 | |
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| 57 | #define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_2_SIZE_STRIDE_HIGH 0x400B044 |
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| 58 | |
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| 59 | #define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_3_SIZE_STRIDE_HIGH 0x400B048 |
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| 60 | |
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| 61 | #define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_4_SIZE_STRIDE_HIGH 0x400B04C |
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| 62 | |
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| 63 | #endif /* ASIC_REG_DCORE0_TPC0_CFG_KERNEL_TENSOR_0_REGS_H_ */ |
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| 64 | |
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