1/* SPDX-License-Identifier: GPL-2.0
2 *
3 * Copyright 2016-2018 HabanaLabs, Ltd.
4 * All Rights Reserved.
5 *
6 */
7
8/************************************
9 ** This is an auto-generated file **
10 ** DO NOT EDIT BELOW **
11 ************************************/
12
13#ifndef ASIC_REG_MME6_RTR_REGS_H_
14#define ASIC_REG_MME6_RTR_REGS_H_
15
16/*
17 *****************************************
18 * MME6_RTR (Prototype: MME_RTR)
19 *****************************************
20 */
21
22#define mmMME6_RTR_HBW_RD_RQ_E_ARB 0x180100
23
24#define mmMME6_RTR_HBW_RD_RQ_W_ARB 0x180104
25
26#define mmMME6_RTR_HBW_RD_RQ_N_ARB 0x180108
27
28#define mmMME6_RTR_HBW_RD_RQ_S_ARB 0x18010C
29
30#define mmMME6_RTR_HBW_RD_RQ_L_ARB 0x180110
31
32#define mmMME6_RTR_HBW_E_ARB_MAX 0x180120
33
34#define mmMME6_RTR_HBW_W_ARB_MAX 0x180124
35
36#define mmMME6_RTR_HBW_N_ARB_MAX 0x180128
37
38#define mmMME6_RTR_HBW_S_ARB_MAX 0x18012C
39
40#define mmMME6_RTR_HBW_L_ARB_MAX 0x180130
41
42#define mmMME6_RTR_HBW_RD_RS_MAX_CREDIT 0x180140
43
44#define mmMME6_RTR_HBW_WR_RQ_MAX_CREDIT 0x180144
45
46#define mmMME6_RTR_HBW_RD_RQ_MAX_CREDIT 0x180148
47
48#define mmMME6_RTR_HBW_RD_RS_E_ARB 0x180150
49
50#define mmMME6_RTR_HBW_RD_RS_W_ARB 0x180154
51
52#define mmMME6_RTR_HBW_RD_RS_N_ARB 0x180158
53
54#define mmMME6_RTR_HBW_RD_RS_S_ARB 0x18015C
55
56#define mmMME6_RTR_HBW_RD_RS_L_ARB 0x180160
57
58#define mmMME6_RTR_HBW_WR_RQ_E_ARB 0x180170
59
60#define mmMME6_RTR_HBW_WR_RQ_W_ARB 0x180174
61
62#define mmMME6_RTR_HBW_WR_RQ_N_ARB 0x180178
63
64#define mmMME6_RTR_HBW_WR_RQ_S_ARB 0x18017C
65
66#define mmMME6_RTR_HBW_WR_RQ_L_ARB 0x180180
67
68#define mmMME6_RTR_HBW_WR_RS_E_ARB 0x180190
69
70#define mmMME6_RTR_HBW_WR_RS_W_ARB 0x180194
71
72#define mmMME6_RTR_HBW_WR_RS_N_ARB 0x180198
73
74#define mmMME6_RTR_HBW_WR_RS_S_ARB 0x18019C
75
76#define mmMME6_RTR_HBW_WR_RS_L_ARB 0x1801A0
77
78#define mmMME6_RTR_LBW_RD_RQ_E_ARB 0x180200
79
80#define mmMME6_RTR_LBW_RD_RQ_W_ARB 0x180204
81
82#define mmMME6_RTR_LBW_RD_RQ_N_ARB 0x180208
83
84#define mmMME6_RTR_LBW_RD_RQ_S_ARB 0x18020C
85
86#define mmMME6_RTR_LBW_RD_RQ_L_ARB 0x180210
87
88#define mmMME6_RTR_LBW_E_ARB_MAX 0x180220
89
90#define mmMME6_RTR_LBW_W_ARB_MAX 0x180224
91
92#define mmMME6_RTR_LBW_N_ARB_MAX 0x180228
93
94#define mmMME6_RTR_LBW_S_ARB_MAX 0x18022C
95
96#define mmMME6_RTR_LBW_L_ARB_MAX 0x180230
97
98#define mmMME6_RTR_LBW_SRAM_MAX_CREDIT 0x180240
99
100#define mmMME6_RTR_LBW_RD_RS_E_ARB 0x180250
101
102#define mmMME6_RTR_LBW_RD_RS_W_ARB 0x180254
103
104#define mmMME6_RTR_LBW_RD_RS_N_ARB 0x180258
105
106#define mmMME6_RTR_LBW_RD_RS_S_ARB 0x18025C
107
108#define mmMME6_RTR_LBW_RD_RS_L_ARB 0x180260
109
110#define mmMME6_RTR_LBW_WR_RQ_E_ARB 0x180270
111
112#define mmMME6_RTR_LBW_WR_RQ_W_ARB 0x180274
113
114#define mmMME6_RTR_LBW_WR_RQ_N_ARB 0x180278
115
116#define mmMME6_RTR_LBW_WR_RQ_S_ARB 0x18027C
117
118#define mmMME6_RTR_LBW_WR_RQ_L_ARB 0x180280
119
120#define mmMME6_RTR_LBW_WR_RS_E_ARB 0x180290
121
122#define mmMME6_RTR_LBW_WR_RS_W_ARB 0x180294
123
124#define mmMME6_RTR_LBW_WR_RS_N_ARB 0x180298
125
126#define mmMME6_RTR_LBW_WR_RS_S_ARB 0x18029C
127
128#define mmMME6_RTR_LBW_WR_RS_L_ARB 0x1802A0
129
130#define mmMME6_RTR_DBG_E_ARB 0x180300
131
132#define mmMME6_RTR_DBG_W_ARB 0x180304
133
134#define mmMME6_RTR_DBG_N_ARB 0x180308
135
136#define mmMME6_RTR_DBG_S_ARB 0x18030C
137
138#define mmMME6_RTR_DBG_L_ARB 0x180310
139
140#define mmMME6_RTR_DBG_E_ARB_MAX 0x180320
141
142#define mmMME6_RTR_DBG_W_ARB_MAX 0x180324
143
144#define mmMME6_RTR_DBG_N_ARB_MAX 0x180328
145
146#define mmMME6_RTR_DBG_S_ARB_MAX 0x18032C
147
148#define mmMME6_RTR_DBG_L_ARB_MAX 0x180330
149
150#define mmMME6_RTR_SPLIT_COEF_0 0x180400
151
152#define mmMME6_RTR_SPLIT_COEF_1 0x180404
153
154#define mmMME6_RTR_SPLIT_COEF_2 0x180408
155
156#define mmMME6_RTR_SPLIT_COEF_3 0x18040C
157
158#define mmMME6_RTR_SPLIT_COEF_4 0x180410
159
160#define mmMME6_RTR_SPLIT_COEF_5 0x180414
161
162#define mmMME6_RTR_SPLIT_COEF_6 0x180418
163
164#define mmMME6_RTR_SPLIT_COEF_7 0x18041C
165
166#define mmMME6_RTR_SPLIT_COEF_8 0x180420
167
168#define mmMME6_RTR_SPLIT_COEF_9 0x180424
169
170#define mmMME6_RTR_SPLIT_CFG 0x180440
171
172#define mmMME6_RTR_SPLIT_RD_SAT 0x180444
173
174#define mmMME6_RTR_SPLIT_RD_RST_TOKEN 0x180448
175
176#define mmMME6_RTR_SPLIT_RD_TIMEOUT_0 0x18044C
177
178#define mmMME6_RTR_SPLIT_RD_TIMEOUT_1 0x180450
179
180#define mmMME6_RTR_SPLIT_WR_SAT 0x180454
181
182#define mmMME6_RTR_WPLIT_WR_TST_TOLEN 0x180458
183
184#define mmMME6_RTR_SPLIT_WR_TIMEOUT_0 0x18045C
185
186#define mmMME6_RTR_SPLIT_WR_TIMEOUT_1 0x180460
187
188#define mmMME6_RTR_HBW_RANGE_HIT 0x180470
189
190#define mmMME6_RTR_HBW_RANGE_MASK_L_0 0x180480
191
192#define mmMME6_RTR_HBW_RANGE_MASK_L_1 0x180484
193
194#define mmMME6_RTR_HBW_RANGE_MASK_L_2 0x180488
195
196#define mmMME6_RTR_HBW_RANGE_MASK_L_3 0x18048C
197
198#define mmMME6_RTR_HBW_RANGE_MASK_L_4 0x180490
199
200#define mmMME6_RTR_HBW_RANGE_MASK_L_5 0x180494
201
202#define mmMME6_RTR_HBW_RANGE_MASK_L_6 0x180498
203
204#define mmMME6_RTR_HBW_RANGE_MASK_L_7 0x18049C
205
206#define mmMME6_RTR_HBW_RANGE_MASK_H_0 0x1804A0
207
208#define mmMME6_RTR_HBW_RANGE_MASK_H_1 0x1804A4
209
210#define mmMME6_RTR_HBW_RANGE_MASK_H_2 0x1804A8
211
212#define mmMME6_RTR_HBW_RANGE_MASK_H_3 0x1804AC
213
214#define mmMME6_RTR_HBW_RANGE_MASK_H_4 0x1804B0
215
216#define mmMME6_RTR_HBW_RANGE_MASK_H_5 0x1804B4
217
218#define mmMME6_RTR_HBW_RANGE_MASK_H_6 0x1804B8
219
220#define mmMME6_RTR_HBW_RANGE_MASK_H_7 0x1804BC
221
222#define mmMME6_RTR_HBW_RANGE_BASE_L_0 0x1804C0
223
224#define mmMME6_RTR_HBW_RANGE_BASE_L_1 0x1804C4
225
226#define mmMME6_RTR_HBW_RANGE_BASE_L_2 0x1804C8
227
228#define mmMME6_RTR_HBW_RANGE_BASE_L_3 0x1804CC
229
230#define mmMME6_RTR_HBW_RANGE_BASE_L_4 0x1804D0
231
232#define mmMME6_RTR_HBW_RANGE_BASE_L_5 0x1804D4
233
234#define mmMME6_RTR_HBW_RANGE_BASE_L_6 0x1804D8
235
236#define mmMME6_RTR_HBW_RANGE_BASE_L_7 0x1804DC
237
238#define mmMME6_RTR_HBW_RANGE_BASE_H_0 0x1804E0
239
240#define mmMME6_RTR_HBW_RANGE_BASE_H_1 0x1804E4
241
242#define mmMME6_RTR_HBW_RANGE_BASE_H_2 0x1804E8
243
244#define mmMME6_RTR_HBW_RANGE_BASE_H_3 0x1804EC
245
246#define mmMME6_RTR_HBW_RANGE_BASE_H_4 0x1804F0
247
248#define mmMME6_RTR_HBW_RANGE_BASE_H_5 0x1804F4
249
250#define mmMME6_RTR_HBW_RANGE_BASE_H_6 0x1804F8
251
252#define mmMME6_RTR_HBW_RANGE_BASE_H_7 0x1804FC
253
254#define mmMME6_RTR_LBW_RANGE_HIT 0x180500
255
256#define mmMME6_RTR_LBW_RANGE_MASK_0 0x180510
257
258#define mmMME6_RTR_LBW_RANGE_MASK_1 0x180514
259
260#define mmMME6_RTR_LBW_RANGE_MASK_2 0x180518
261
262#define mmMME6_RTR_LBW_RANGE_MASK_3 0x18051C
263
264#define mmMME6_RTR_LBW_RANGE_MASK_4 0x180520
265
266#define mmMME6_RTR_LBW_RANGE_MASK_5 0x180524
267
268#define mmMME6_RTR_LBW_RANGE_MASK_6 0x180528
269
270#define mmMME6_RTR_LBW_RANGE_MASK_7 0x18052C
271
272#define mmMME6_RTR_LBW_RANGE_MASK_8 0x180530
273
274#define mmMME6_RTR_LBW_RANGE_MASK_9 0x180534
275
276#define mmMME6_RTR_LBW_RANGE_MASK_10 0x180538
277
278#define mmMME6_RTR_LBW_RANGE_MASK_11 0x18053C
279
280#define mmMME6_RTR_LBW_RANGE_MASK_12 0x180540
281
282#define mmMME6_RTR_LBW_RANGE_MASK_13 0x180544
283
284#define mmMME6_RTR_LBW_RANGE_MASK_14 0x180548
285
286#define mmMME6_RTR_LBW_RANGE_MASK_15 0x18054C
287
288#define mmMME6_RTR_LBW_RANGE_BASE_0 0x180550
289
290#define mmMME6_RTR_LBW_RANGE_BASE_1 0x180554
291
292#define mmMME6_RTR_LBW_RANGE_BASE_2 0x180558
293
294#define mmMME6_RTR_LBW_RANGE_BASE_3 0x18055C
295
296#define mmMME6_RTR_LBW_RANGE_BASE_4 0x180560
297
298#define mmMME6_RTR_LBW_RANGE_BASE_5 0x180564
299
300#define mmMME6_RTR_LBW_RANGE_BASE_6 0x180568
301
302#define mmMME6_RTR_LBW_RANGE_BASE_7 0x18056C
303
304#define mmMME6_RTR_LBW_RANGE_BASE_8 0x180570
305
306#define mmMME6_RTR_LBW_RANGE_BASE_9 0x180574
307
308#define mmMME6_RTR_LBW_RANGE_BASE_10 0x180578
309
310#define mmMME6_RTR_LBW_RANGE_BASE_11 0x18057C
311
312#define mmMME6_RTR_LBW_RANGE_BASE_12 0x180580
313
314#define mmMME6_RTR_LBW_RANGE_BASE_13 0x180584
315
316#define mmMME6_RTR_LBW_RANGE_BASE_14 0x180588
317
318#define mmMME6_RTR_LBW_RANGE_BASE_15 0x18058C
319
320#define mmMME6_RTR_RGLTR 0x180590
321
322#define mmMME6_RTR_RGLTR_WR_RESULT 0x180594
323
324#define mmMME6_RTR_RGLTR_RD_RESULT 0x180598
325
326#define mmMME6_RTR_SCRAMB_EN 0x180600
327
328#define mmMME6_RTR_NON_LIN_SCRAMB 0x180604
329
330#endif /* ASIC_REG_MME6_RTR_REGS_H_ */
331

source code of linux/drivers/accel/habanalabs/include/goya/asic_reg/mme6_rtr_regs.h