1/* SPDX-License-Identifier: GPL-2.0
2 *
3 * Copyright 2016-2018 HabanaLabs, Ltd.
4 * All Rights Reserved.
5 *
6 */
7
8/************************************
9 ** This is an auto-generated file **
10 ** DO NOT EDIT BELOW **
11 ************************************/
12
13#ifndef ASIC_REG_TPC7_CFG_REGS_H_
14#define ASIC_REG_TPC7_CFG_REGS_H_
15
16/*
17 *****************************************
18 * TPC7_CFG (Prototype: TPC)
19 *****************************************
20 */
21
22#define mmTPC7_CFG_KERNEL_TENSOR_0_BASE_ADDR_LOW 0xFC6400
23
24#define mmTPC7_CFG_KERNEL_TENSOR_0_BASE_ADDR_HIGH 0xFC6404
25
26#define mmTPC7_CFG_KERNEL_TENSOR_0_PADDING_VALUE 0xFC6408
27
28#define mmTPC7_CFG_KERNEL_TENSOR_0_TENSOR_CONFIG 0xFC640C
29
30#define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_0_SIZE 0xFC6410
31
32#define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_0_STRIDE 0xFC6414
33
34#define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_0_BASE_OFFSET 0xFC6418
35
36#define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_1_SIZE 0xFC641C
37
38#define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_1_STRIDE 0xFC6420
39
40#define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_1_BASE_OFFSET 0xFC6424
41
42#define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_2_SIZE 0xFC6428
43
44#define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_2_STRIDE 0xFC642C
45
46#define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_2_BASE_OFFSET 0xFC6430
47
48#define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_3_SIZE 0xFC6434
49
50#define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_3_STRIDE 0xFC6438
51
52#define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_3_BASE_OFFSET 0xFC643C
53
54#define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_4_SIZE 0xFC6440
55
56#define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_4_STRIDE 0xFC6444
57
58#define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_4_BASE_OFFSET 0xFC6448
59
60#define mmTPC7_CFG_KERNEL_TENSOR_1_BASE_ADDR_LOW 0xFC644C
61
62#define mmTPC7_CFG_KERNEL_TENSOR_1_BASE_ADDR_HIGH 0xFC6450
63
64#define mmTPC7_CFG_KERNEL_TENSOR_1_PADDING_VALUE 0xFC6454
65
66#define mmTPC7_CFG_KERNEL_TENSOR_1_TENSOR_CONFIG 0xFC6458
67
68#define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_0_SIZE 0xFC645C
69
70#define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_0_STRIDE 0xFC6460
71
72#define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_0_BASE_OFFSET 0xFC6464
73
74#define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_1_SIZE 0xFC6468
75
76#define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_1_STRIDE 0xFC646C
77
78#define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_1_BASE_OFFSET 0xFC6470
79
80#define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_2_SIZE 0xFC6474
81
82#define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_2_STRIDE 0xFC6478
83
84#define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_2_BASE_OFFSET 0xFC647C
85
86#define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_3_SIZE 0xFC6480
87
88#define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_3_STRIDE 0xFC6484
89
90#define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_3_BASE_OFFSET 0xFC6488
91
92#define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_4_SIZE 0xFC648C
93
94#define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_4_STRIDE 0xFC6490
95
96#define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_4_BASE_OFFSET 0xFC6494
97
98#define mmTPC7_CFG_KERNEL_TENSOR_2_BASE_ADDR_LOW 0xFC6498
99
100#define mmTPC7_CFG_KERNEL_TENSOR_2_BASE_ADDR_HIGH 0xFC649C
101
102#define mmTPC7_CFG_KERNEL_TENSOR_2_PADDING_VALUE 0xFC64A0
103
104#define mmTPC7_CFG_KERNEL_TENSOR_2_TENSOR_CONFIG 0xFC64A4
105
106#define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_0_SIZE 0xFC64A8
107
108#define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_0_STRIDE 0xFC64AC
109
110#define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_0_BASE_OFFSET 0xFC64B0
111
112#define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_1_SIZE 0xFC64B4
113
114#define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_1_STRIDE 0xFC64B8
115
116#define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_1_BASE_OFFSET 0xFC64BC
117
118#define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_2_SIZE 0xFC64C0
119
120#define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_2_STRIDE 0xFC64C4
121
122#define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_2_BASE_OFFSET 0xFC64C8
123
124#define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_3_SIZE 0xFC64CC
125
126#define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_3_STRIDE 0xFC64D0
127
128#define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_3_BASE_OFFSET 0xFC64D4
129
130#define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_4_SIZE 0xFC64D8
131
132#define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_4_STRIDE 0xFC64DC
133
134#define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_4_BASE_OFFSET 0xFC64E0
135
136#define mmTPC7_CFG_KERNEL_TENSOR_3_BASE_ADDR_LOW 0xFC64E4
137
138#define mmTPC7_CFG_KERNEL_TENSOR_3_BASE_ADDR_HIGH 0xFC64E8
139
140#define mmTPC7_CFG_KERNEL_TENSOR_3_PADDING_VALUE 0xFC64EC
141
142#define mmTPC7_CFG_KERNEL_TENSOR_3_TENSOR_CONFIG 0xFC64F0
143
144#define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_0_SIZE 0xFC64F4
145
146#define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_0_STRIDE 0xFC64F8
147
148#define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_0_BASE_OFFSET 0xFC64FC
149
150#define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_1_SIZE 0xFC6500
151
152#define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_1_STRIDE 0xFC6504
153
154#define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_1_BASE_OFFSET 0xFC6508
155
156#define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_2_SIZE 0xFC650C
157
158#define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_2_STRIDE 0xFC6510
159
160#define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_2_BASE_OFFSET 0xFC6514
161
162#define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_3_SIZE 0xFC6518
163
164#define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_3_STRIDE 0xFC651C
165
166#define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_3_BASE_OFFSET 0xFC6520
167
168#define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_4_SIZE 0xFC6524
169
170#define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_4_STRIDE 0xFC6528
171
172#define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_4_BASE_OFFSET 0xFC652C
173
174#define mmTPC7_CFG_KERNEL_TENSOR_4_BASE_ADDR_LOW 0xFC6530
175
176#define mmTPC7_CFG_KERNEL_TENSOR_4_BASE_ADDR_HIGH 0xFC6534
177
178#define mmTPC7_CFG_KERNEL_TENSOR_4_PADDING_VALUE 0xFC6538
179
180#define mmTPC7_CFG_KERNEL_TENSOR_4_TENSOR_CONFIG 0xFC653C
181
182#define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_0_SIZE 0xFC6540
183
184#define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_0_STRIDE 0xFC6544
185
186#define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_0_BASE_OFFSET 0xFC6548
187
188#define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_1_SIZE 0xFC654C
189
190#define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_1_STRIDE 0xFC6550
191
192#define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_1_BASE_OFFSET 0xFC6554
193
194#define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_2_SIZE 0xFC6558
195
196#define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_2_STRIDE 0xFC655C
197
198#define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_2_BASE_OFFSET 0xFC6560
199
200#define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_3_SIZE 0xFC6564
201
202#define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_3_STRIDE 0xFC6568
203
204#define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_3_BASE_OFFSET 0xFC656C
205
206#define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_4_SIZE 0xFC6570
207
208#define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_4_STRIDE 0xFC6574
209
210#define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_4_BASE_OFFSET 0xFC6578
211
212#define mmTPC7_CFG_KERNEL_TENSOR_5_BASE_ADDR_LOW 0xFC657C
213
214#define mmTPC7_CFG_KERNEL_TENSOR_5_BASE_ADDR_HIGH 0xFC6580
215
216#define mmTPC7_CFG_KERNEL_TENSOR_5_PADDING_VALUE 0xFC6584
217
218#define mmTPC7_CFG_KERNEL_TENSOR_5_TENSOR_CONFIG 0xFC6588
219
220#define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_0_SIZE 0xFC658C
221
222#define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_0_STRIDE 0xFC6590
223
224#define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_0_BASE_OFFSET 0xFC6594
225
226#define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_1_SIZE 0xFC6598
227
228#define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_1_STRIDE 0xFC659C
229
230#define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_1_BASE_OFFSET 0xFC65A0
231
232#define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_2_SIZE 0xFC65A4
233
234#define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_2_STRIDE 0xFC65A8
235
236#define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_2_BASE_OFFSET 0xFC65AC
237
238#define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_3_SIZE 0xFC65B0
239
240#define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_3_STRIDE 0xFC65B4
241
242#define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_3_BASE_OFFSET 0xFC65B8
243
244#define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_4_SIZE 0xFC65BC
245
246#define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_4_STRIDE 0xFC65C0
247
248#define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_4_BASE_OFFSET 0xFC65C4
249
250#define mmTPC7_CFG_KERNEL_TENSOR_6_BASE_ADDR_LOW 0xFC65C8
251
252#define mmTPC7_CFG_KERNEL_TENSOR_6_BASE_ADDR_HIGH 0xFC65CC
253
254#define mmTPC7_CFG_KERNEL_TENSOR_6_PADDING_VALUE 0xFC65D0
255
256#define mmTPC7_CFG_KERNEL_TENSOR_6_TENSOR_CONFIG 0xFC65D4
257
258#define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_0_SIZE 0xFC65D8
259
260#define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_0_STRIDE 0xFC65DC
261
262#define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_0_BASE_OFFSET 0xFC65E0
263
264#define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_1_SIZE 0xFC65E4
265
266#define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_1_STRIDE 0xFC65E8
267
268#define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_1_BASE_OFFSET 0xFC65EC
269
270#define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_2_SIZE 0xFC65F0
271
272#define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_2_STRIDE 0xFC65F4
273
274#define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_2_BASE_OFFSET 0xFC65F8
275
276#define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_3_SIZE 0xFC65FC
277
278#define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_3_STRIDE 0xFC6600
279
280#define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_3_BASE_OFFSET 0xFC6604
281
282#define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_4_SIZE 0xFC6608
283
284#define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_4_STRIDE 0xFC660C
285
286#define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_4_BASE_OFFSET 0xFC6610
287
288#define mmTPC7_CFG_KERNEL_TENSOR_7_BASE_ADDR_LOW 0xFC6614
289
290#define mmTPC7_CFG_KERNEL_TENSOR_7_BASE_ADDR_HIGH 0xFC6618
291
292#define mmTPC7_CFG_KERNEL_TENSOR_7_PADDING_VALUE 0xFC661C
293
294#define mmTPC7_CFG_KERNEL_TENSOR_7_TENSOR_CONFIG 0xFC6620
295
296#define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_0_SIZE 0xFC6624
297
298#define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_0_STRIDE 0xFC6628
299
300#define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_0_BASE_OFFSET 0xFC662C
301
302#define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_1_SIZE 0xFC6630
303
304#define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_1_STRIDE 0xFC6634
305
306#define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_1_BASE_OFFSET 0xFC6638
307
308#define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_2_SIZE 0xFC663C
309
310#define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_2_STRIDE 0xFC6640
311
312#define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_2_BASE_OFFSET 0xFC6644
313
314#define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_3_SIZE 0xFC6648
315
316#define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_3_STRIDE 0xFC664C
317
318#define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_3_BASE_OFFSET 0xFC6650
319
320#define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_4_SIZE 0xFC6654
321
322#define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_4_STRIDE 0xFC6658
323
324#define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_4_BASE_OFFSET 0xFC665C
325
326#define mmTPC7_CFG_KERNEL_KERNEL_BASE_ADDRESS_LOW 0xFC6660
327
328#define mmTPC7_CFG_KERNEL_KERNEL_BASE_ADDRESS_HIGH 0xFC6664
329
330#define mmTPC7_CFG_KERNEL_TID_BASE_DIM_0 0xFC6668
331
332#define mmTPC7_CFG_KERNEL_TID_SIZE_DIM_0 0xFC666C
333
334#define mmTPC7_CFG_KERNEL_TID_BASE_DIM_1 0xFC6670
335
336#define mmTPC7_CFG_KERNEL_TID_SIZE_DIM_1 0xFC6674
337
338#define mmTPC7_CFG_KERNEL_TID_BASE_DIM_2 0xFC6678
339
340#define mmTPC7_CFG_KERNEL_TID_SIZE_DIM_2 0xFC667C
341
342#define mmTPC7_CFG_KERNEL_TID_BASE_DIM_3 0xFC6680
343
344#define mmTPC7_CFG_KERNEL_TID_SIZE_DIM_3 0xFC6684
345
346#define mmTPC7_CFG_KERNEL_TID_BASE_DIM_4 0xFC6688
347
348#define mmTPC7_CFG_KERNEL_TID_SIZE_DIM_4 0xFC668C
349
350#define mmTPC7_CFG_KERNEL_SRF_0 0xFC6690
351
352#define mmTPC7_CFG_KERNEL_SRF_1 0xFC6694
353
354#define mmTPC7_CFG_KERNEL_SRF_2 0xFC6698
355
356#define mmTPC7_CFG_KERNEL_SRF_3 0xFC669C
357
358#define mmTPC7_CFG_KERNEL_SRF_4 0xFC66A0
359
360#define mmTPC7_CFG_KERNEL_SRF_5 0xFC66A4
361
362#define mmTPC7_CFG_KERNEL_SRF_6 0xFC66A8
363
364#define mmTPC7_CFG_KERNEL_SRF_7 0xFC66AC
365
366#define mmTPC7_CFG_KERNEL_SRF_8 0xFC66B0
367
368#define mmTPC7_CFG_KERNEL_SRF_9 0xFC66B4
369
370#define mmTPC7_CFG_KERNEL_SRF_10 0xFC66B8
371
372#define mmTPC7_CFG_KERNEL_SRF_11 0xFC66BC
373
374#define mmTPC7_CFG_KERNEL_SRF_12 0xFC66C0
375
376#define mmTPC7_CFG_KERNEL_SRF_13 0xFC66C4
377
378#define mmTPC7_CFG_KERNEL_SRF_14 0xFC66C8
379
380#define mmTPC7_CFG_KERNEL_SRF_15 0xFC66CC
381
382#define mmTPC7_CFG_KERNEL_SRF_16 0xFC66D0
383
384#define mmTPC7_CFG_KERNEL_SRF_17 0xFC66D4
385
386#define mmTPC7_CFG_KERNEL_SRF_18 0xFC66D8
387
388#define mmTPC7_CFG_KERNEL_SRF_19 0xFC66DC
389
390#define mmTPC7_CFG_KERNEL_SRF_20 0xFC66E0
391
392#define mmTPC7_CFG_KERNEL_SRF_21 0xFC66E4
393
394#define mmTPC7_CFG_KERNEL_SRF_22 0xFC66E8
395
396#define mmTPC7_CFG_KERNEL_SRF_23 0xFC66EC
397
398#define mmTPC7_CFG_KERNEL_SRF_24 0xFC66F0
399
400#define mmTPC7_CFG_KERNEL_SRF_25 0xFC66F4
401
402#define mmTPC7_CFG_KERNEL_SRF_26 0xFC66F8
403
404#define mmTPC7_CFG_KERNEL_SRF_27 0xFC66FC
405
406#define mmTPC7_CFG_KERNEL_SRF_28 0xFC6700
407
408#define mmTPC7_CFG_KERNEL_SRF_29 0xFC6704
409
410#define mmTPC7_CFG_KERNEL_SRF_30 0xFC6708
411
412#define mmTPC7_CFG_KERNEL_SRF_31 0xFC670C
413
414#define mmTPC7_CFG_KERNEL_KERNEL_CONFIG 0xFC6710
415
416#define mmTPC7_CFG_KERNEL_SYNC_OBJECT_MESSAGE 0xFC6714
417
418#define mmTPC7_CFG_RESERVED_DESC_END 0xFC6738
419
420#define mmTPC7_CFG_ROUND_CSR 0xFC67FC
421
422#define mmTPC7_CFG_TBUF_BASE_ADDR_LOW 0xFC6800
423
424#define mmTPC7_CFG_TBUF_BASE_ADDR_HIGH 0xFC6804
425
426#define mmTPC7_CFG_SEMAPHORE 0xFC6808
427
428#define mmTPC7_CFG_VFLAGS 0xFC680C
429
430#define mmTPC7_CFG_SFLAGS 0xFC6810
431
432#define mmTPC7_CFG_LFSR_POLYNOM 0xFC6818
433
434#define mmTPC7_CFG_STATUS 0xFC681C
435
436#define mmTPC7_CFG_CFG_BASE_ADDRESS_HIGH 0xFC6820
437
438#define mmTPC7_CFG_CFG_SUBTRACT_VALUE 0xFC6824
439
440#define mmTPC7_CFG_SM_BASE_ADDRESS_LOW 0xFC6828
441
442#define mmTPC7_CFG_SM_BASE_ADDRESS_HIGH 0xFC682C
443
444#define mmTPC7_CFG_TPC_CMD 0xFC6830
445
446#define mmTPC7_CFG_TPC_EXECUTE 0xFC6838
447
448#define mmTPC7_CFG_TPC_STALL 0xFC683C
449
450#define mmTPC7_CFG_ICACHE_BASE_ADDERESS_LOW 0xFC6840
451
452#define mmTPC7_CFG_ICACHE_BASE_ADDERESS_HIGH 0xFC6844
453
454#define mmTPC7_CFG_MSS_CONFIG 0xFC6854
455
456#define mmTPC7_CFG_TPC_INTR_CAUSE 0xFC6858
457
458#define mmTPC7_CFG_TPC_INTR_MASK 0xFC685C
459
460#define mmTPC7_CFG_TSB_CONFIG 0xFC6860
461
462#define mmTPC7_CFG_QM_TENSOR_0_BASE_ADDR_LOW 0xFC6A00
463
464#define mmTPC7_CFG_QM_TENSOR_0_BASE_ADDR_HIGH 0xFC6A04
465
466#define mmTPC7_CFG_QM_TENSOR_0_PADDING_VALUE 0xFC6A08
467
468#define mmTPC7_CFG_QM_TENSOR_0_TENSOR_CONFIG 0xFC6A0C
469
470#define mmTPC7_CFG_QM_TENSOR_0_DIM_0_SIZE 0xFC6A10
471
472#define mmTPC7_CFG_QM_TENSOR_0_DIM_0_STRIDE 0xFC6A14
473
474#define mmTPC7_CFG_QM_TENSOR_0_DIM_0_BASE_OFFSET 0xFC6A18
475
476#define mmTPC7_CFG_QM_TENSOR_0_DIM_1_SIZE 0xFC6A1C
477
478#define mmTPC7_CFG_QM_TENSOR_0_DIM_1_STRIDE 0xFC6A20
479
480#define mmTPC7_CFG_QM_TENSOR_0_DIM_1_BASE_OFFSET 0xFC6A24
481
482#define mmTPC7_CFG_QM_TENSOR_0_DIM_2_SIZE 0xFC6A28
483
484#define mmTPC7_CFG_QM_TENSOR_0_DIM_2_STRIDE 0xFC6A2C
485
486#define mmTPC7_CFG_QM_TENSOR_0_DIM_2_BASE_OFFSET 0xFC6A30
487
488#define mmTPC7_CFG_QM_TENSOR_0_DIM_3_SIZE 0xFC6A34
489
490#define mmTPC7_CFG_QM_TENSOR_0_DIM_3_STRIDE 0xFC6A38
491
492#define mmTPC7_CFG_QM_TENSOR_0_DIM_3_BASE_OFFSET 0xFC6A3C
493
494#define mmTPC7_CFG_QM_TENSOR_0_DIM_4_SIZE 0xFC6A40
495
496#define mmTPC7_CFG_QM_TENSOR_0_DIM_4_STRIDE 0xFC6A44
497
498#define mmTPC7_CFG_QM_TENSOR_0_DIM_4_BASE_OFFSET 0xFC6A48
499
500#define mmTPC7_CFG_QM_TENSOR_1_BASE_ADDR_LOW 0xFC6A4C
501
502#define mmTPC7_CFG_QM_TENSOR_1_BASE_ADDR_HIGH 0xFC6A50
503
504#define mmTPC7_CFG_QM_TENSOR_1_PADDING_VALUE 0xFC6A54
505
506#define mmTPC7_CFG_QM_TENSOR_1_TENSOR_CONFIG 0xFC6A58
507
508#define mmTPC7_CFG_QM_TENSOR_1_DIM_0_SIZE 0xFC6A5C
509
510#define mmTPC7_CFG_QM_TENSOR_1_DIM_0_STRIDE 0xFC6A60
511
512#define mmTPC7_CFG_QM_TENSOR_1_DIM_0_BASE_OFFSET 0xFC6A64
513
514#define mmTPC7_CFG_QM_TENSOR_1_DIM_1_SIZE 0xFC6A68
515
516#define mmTPC7_CFG_QM_TENSOR_1_DIM_1_STRIDE 0xFC6A6C
517
518#define mmTPC7_CFG_QM_TENSOR_1_DIM_1_BASE_OFFSET 0xFC6A70
519
520#define mmTPC7_CFG_QM_TENSOR_1_DIM_2_SIZE 0xFC6A74
521
522#define mmTPC7_CFG_QM_TENSOR_1_DIM_2_STRIDE 0xFC6A78
523
524#define mmTPC7_CFG_QM_TENSOR_1_DIM_2_BASE_OFFSET 0xFC6A7C
525
526#define mmTPC7_CFG_QM_TENSOR_1_DIM_3_SIZE 0xFC6A80
527
528#define mmTPC7_CFG_QM_TENSOR_1_DIM_3_STRIDE 0xFC6A84
529
530#define mmTPC7_CFG_QM_TENSOR_1_DIM_3_BASE_OFFSET 0xFC6A88
531
532#define mmTPC7_CFG_QM_TENSOR_1_DIM_4_SIZE 0xFC6A8C
533
534#define mmTPC7_CFG_QM_TENSOR_1_DIM_4_STRIDE 0xFC6A90
535
536#define mmTPC7_CFG_QM_TENSOR_1_DIM_4_BASE_OFFSET 0xFC6A94
537
538#define mmTPC7_CFG_QM_TENSOR_2_BASE_ADDR_LOW 0xFC6A98
539
540#define mmTPC7_CFG_QM_TENSOR_2_BASE_ADDR_HIGH 0xFC6A9C
541
542#define mmTPC7_CFG_QM_TENSOR_2_PADDING_VALUE 0xFC6AA0
543
544#define mmTPC7_CFG_QM_TENSOR_2_TENSOR_CONFIG 0xFC6AA4
545
546#define mmTPC7_CFG_QM_TENSOR_2_DIM_0_SIZE 0xFC6AA8
547
548#define mmTPC7_CFG_QM_TENSOR_2_DIM_0_STRIDE 0xFC6AAC
549
550#define mmTPC7_CFG_QM_TENSOR_2_DIM_0_BASE_OFFSET 0xFC6AB0
551
552#define mmTPC7_CFG_QM_TENSOR_2_DIM_1_SIZE 0xFC6AB4
553
554#define mmTPC7_CFG_QM_TENSOR_2_DIM_1_STRIDE 0xFC6AB8
555
556#define mmTPC7_CFG_QM_TENSOR_2_DIM_1_BASE_OFFSET 0xFC6ABC
557
558#define mmTPC7_CFG_QM_TENSOR_2_DIM_2_SIZE 0xFC6AC0
559
560#define mmTPC7_CFG_QM_TENSOR_2_DIM_2_STRIDE 0xFC6AC4
561
562#define mmTPC7_CFG_QM_TENSOR_2_DIM_2_BASE_OFFSET 0xFC6AC8
563
564#define mmTPC7_CFG_QM_TENSOR_2_DIM_3_SIZE 0xFC6ACC
565
566#define mmTPC7_CFG_QM_TENSOR_2_DIM_3_STRIDE 0xFC6AD0
567
568#define mmTPC7_CFG_QM_TENSOR_2_DIM_3_BASE_OFFSET 0xFC6AD4
569
570#define mmTPC7_CFG_QM_TENSOR_2_DIM_4_SIZE 0xFC6AD8
571
572#define mmTPC7_CFG_QM_TENSOR_2_DIM_4_STRIDE 0xFC6ADC
573
574#define mmTPC7_CFG_QM_TENSOR_2_DIM_4_BASE_OFFSET 0xFC6AE0
575
576#define mmTPC7_CFG_QM_TENSOR_3_BASE_ADDR_LOW 0xFC6AE4
577
578#define mmTPC7_CFG_QM_TENSOR_3_BASE_ADDR_HIGH 0xFC6AE8
579
580#define mmTPC7_CFG_QM_TENSOR_3_PADDING_VALUE 0xFC6AEC
581
582#define mmTPC7_CFG_QM_TENSOR_3_TENSOR_CONFIG 0xFC6AF0
583
584#define mmTPC7_CFG_QM_TENSOR_3_DIM_0_SIZE 0xFC6AF4
585
586#define mmTPC7_CFG_QM_TENSOR_3_DIM_0_STRIDE 0xFC6AF8
587
588#define mmTPC7_CFG_QM_TENSOR_3_DIM_0_BASE_OFFSET 0xFC6AFC
589
590#define mmTPC7_CFG_QM_TENSOR_3_DIM_1_SIZE 0xFC6B00
591
592#define mmTPC7_CFG_QM_TENSOR_3_DIM_1_STRIDE 0xFC6B04
593
594#define mmTPC7_CFG_QM_TENSOR_3_DIM_1_BASE_OFFSET 0xFC6B08
595
596#define mmTPC7_CFG_QM_TENSOR_3_DIM_2_SIZE 0xFC6B0C
597
598#define mmTPC7_CFG_QM_TENSOR_3_DIM_2_STRIDE 0xFC6B10
599
600#define mmTPC7_CFG_QM_TENSOR_3_DIM_2_BASE_OFFSET 0xFC6B14
601
602#define mmTPC7_CFG_QM_TENSOR_3_DIM_3_SIZE 0xFC6B18
603
604#define mmTPC7_CFG_QM_TENSOR_3_DIM_3_STRIDE 0xFC6B1C
605
606#define mmTPC7_CFG_QM_TENSOR_3_DIM_3_BASE_OFFSET 0xFC6B20
607
608#define mmTPC7_CFG_QM_TENSOR_3_DIM_4_SIZE 0xFC6B24
609
610#define mmTPC7_CFG_QM_TENSOR_3_DIM_4_STRIDE 0xFC6B28
611
612#define mmTPC7_CFG_QM_TENSOR_3_DIM_4_BASE_OFFSET 0xFC6B2C
613
614#define mmTPC7_CFG_QM_TENSOR_4_BASE_ADDR_LOW 0xFC6B30
615
616#define mmTPC7_CFG_QM_TENSOR_4_BASE_ADDR_HIGH 0xFC6B34
617
618#define mmTPC7_CFG_QM_TENSOR_4_PADDING_VALUE 0xFC6B38
619
620#define mmTPC7_CFG_QM_TENSOR_4_TENSOR_CONFIG 0xFC6B3C
621
622#define mmTPC7_CFG_QM_TENSOR_4_DIM_0_SIZE 0xFC6B40
623
624#define mmTPC7_CFG_QM_TENSOR_4_DIM_0_STRIDE 0xFC6B44
625
626#define mmTPC7_CFG_QM_TENSOR_4_DIM_0_BASE_OFFSET 0xFC6B48
627
628#define mmTPC7_CFG_QM_TENSOR_4_DIM_1_SIZE 0xFC6B4C
629
630#define mmTPC7_CFG_QM_TENSOR_4_DIM_1_STRIDE 0xFC6B50
631
632#define mmTPC7_CFG_QM_TENSOR_4_DIM_1_BASE_OFFSET 0xFC6B54
633
634#define mmTPC7_CFG_QM_TENSOR_4_DIM_2_SIZE 0xFC6B58
635
636#define mmTPC7_CFG_QM_TENSOR_4_DIM_2_STRIDE 0xFC6B5C
637
638#define mmTPC7_CFG_QM_TENSOR_4_DIM_2_BASE_OFFSET 0xFC6B60
639
640#define mmTPC7_CFG_QM_TENSOR_4_DIM_3_SIZE 0xFC6B64
641
642#define mmTPC7_CFG_QM_TENSOR_4_DIM_3_STRIDE 0xFC6B68
643
644#define mmTPC7_CFG_QM_TENSOR_4_DIM_3_BASE_OFFSET 0xFC6B6C
645
646#define mmTPC7_CFG_QM_TENSOR_4_DIM_4_SIZE 0xFC6B70
647
648#define mmTPC7_CFG_QM_TENSOR_4_DIM_4_STRIDE 0xFC6B74
649
650#define mmTPC7_CFG_QM_TENSOR_4_DIM_4_BASE_OFFSET 0xFC6B78
651
652#define mmTPC7_CFG_QM_TENSOR_5_BASE_ADDR_LOW 0xFC6B7C
653
654#define mmTPC7_CFG_QM_TENSOR_5_BASE_ADDR_HIGH 0xFC6B80
655
656#define mmTPC7_CFG_QM_TENSOR_5_PADDING_VALUE 0xFC6B84
657
658#define mmTPC7_CFG_QM_TENSOR_5_TENSOR_CONFIG 0xFC6B88
659
660#define mmTPC7_CFG_QM_TENSOR_5_DIM_0_SIZE 0xFC6B8C
661
662#define mmTPC7_CFG_QM_TENSOR_5_DIM_0_STRIDE 0xFC6B90
663
664#define mmTPC7_CFG_QM_TENSOR_5_DIM_0_BASE_OFFSET 0xFC6B94
665
666#define mmTPC7_CFG_QM_TENSOR_5_DIM_1_SIZE 0xFC6B98
667
668#define mmTPC7_CFG_QM_TENSOR_5_DIM_1_STRIDE 0xFC6B9C
669
670#define mmTPC7_CFG_QM_TENSOR_5_DIM_1_BASE_OFFSET 0xFC6BA0
671
672#define mmTPC7_CFG_QM_TENSOR_5_DIM_2_SIZE 0xFC6BA4
673
674#define mmTPC7_CFG_QM_TENSOR_5_DIM_2_STRIDE 0xFC6BA8
675
676#define mmTPC7_CFG_QM_TENSOR_5_DIM_2_BASE_OFFSET 0xFC6BAC
677
678#define mmTPC7_CFG_QM_TENSOR_5_DIM_3_SIZE 0xFC6BB0
679
680#define mmTPC7_CFG_QM_TENSOR_5_DIM_3_STRIDE 0xFC6BB4
681
682#define mmTPC7_CFG_QM_TENSOR_5_DIM_3_BASE_OFFSET 0xFC6BB8
683
684#define mmTPC7_CFG_QM_TENSOR_5_DIM_4_SIZE 0xFC6BBC
685
686#define mmTPC7_CFG_QM_TENSOR_5_DIM_4_STRIDE 0xFC6BC0
687
688#define mmTPC7_CFG_QM_TENSOR_5_DIM_4_BASE_OFFSET 0xFC6BC4
689
690#define mmTPC7_CFG_QM_TENSOR_6_BASE_ADDR_LOW 0xFC6BC8
691
692#define mmTPC7_CFG_QM_TENSOR_6_BASE_ADDR_HIGH 0xFC6BCC
693
694#define mmTPC7_CFG_QM_TENSOR_6_PADDING_VALUE 0xFC6BD0
695
696#define mmTPC7_CFG_QM_TENSOR_6_TENSOR_CONFIG 0xFC6BD4
697
698#define mmTPC7_CFG_QM_TENSOR_6_DIM_0_SIZE 0xFC6BD8
699
700#define mmTPC7_CFG_QM_TENSOR_6_DIM_0_STRIDE 0xFC6BDC
701
702#define mmTPC7_CFG_QM_TENSOR_6_DIM_0_BASE_OFFSET 0xFC6BE0
703
704#define mmTPC7_CFG_QM_TENSOR_6_DIM_1_SIZE 0xFC6BE4
705
706#define mmTPC7_CFG_QM_TENSOR_6_DIM_1_STRIDE 0xFC6BE8
707
708#define mmTPC7_CFG_QM_TENSOR_6_DIM_1_BASE_OFFSET 0xFC6BEC
709
710#define mmTPC7_CFG_QM_TENSOR_6_DIM_2_SIZE 0xFC6BF0
711
712#define mmTPC7_CFG_QM_TENSOR_6_DIM_2_STRIDE 0xFC6BF4
713
714#define mmTPC7_CFG_QM_TENSOR_6_DIM_2_BASE_OFFSET 0xFC6BF8
715
716#define mmTPC7_CFG_QM_TENSOR_6_DIM_3_SIZE 0xFC6BFC
717
718#define mmTPC7_CFG_QM_TENSOR_6_DIM_3_STRIDE 0xFC6C00
719
720#define mmTPC7_CFG_QM_TENSOR_6_DIM_3_BASE_OFFSET 0xFC6C04
721
722#define mmTPC7_CFG_QM_TENSOR_6_DIM_4_SIZE 0xFC6C08
723
724#define mmTPC7_CFG_QM_TENSOR_6_DIM_4_STRIDE 0xFC6C0C
725
726#define mmTPC7_CFG_QM_TENSOR_6_DIM_4_BASE_OFFSET 0xFC6C10
727
728#define mmTPC7_CFG_QM_TENSOR_7_BASE_ADDR_LOW 0xFC6C14
729
730#define mmTPC7_CFG_QM_TENSOR_7_BASE_ADDR_HIGH 0xFC6C18
731
732#define mmTPC7_CFG_QM_TENSOR_7_PADDING_VALUE 0xFC6C1C
733
734#define mmTPC7_CFG_QM_TENSOR_7_TENSOR_CONFIG 0xFC6C20
735
736#define mmTPC7_CFG_QM_TENSOR_7_DIM_0_SIZE 0xFC6C24
737
738#define mmTPC7_CFG_QM_TENSOR_7_DIM_0_STRIDE 0xFC6C28
739
740#define mmTPC7_CFG_QM_TENSOR_7_DIM_0_BASE_OFFSET 0xFC6C2C
741
742#define mmTPC7_CFG_QM_TENSOR_7_DIM_1_SIZE 0xFC6C30
743
744#define mmTPC7_CFG_QM_TENSOR_7_DIM_1_STRIDE 0xFC6C34
745
746#define mmTPC7_CFG_QM_TENSOR_7_DIM_1_BASE_OFFSET 0xFC6C38
747
748#define mmTPC7_CFG_QM_TENSOR_7_DIM_2_SIZE 0xFC6C3C
749
750#define mmTPC7_CFG_QM_TENSOR_7_DIM_2_STRIDE 0xFC6C40
751
752#define mmTPC7_CFG_QM_TENSOR_7_DIM_2_BASE_OFFSET 0xFC6C44
753
754#define mmTPC7_CFG_QM_TENSOR_7_DIM_3_SIZE 0xFC6C48
755
756#define mmTPC7_CFG_QM_TENSOR_7_DIM_3_STRIDE 0xFC6C4C
757
758#define mmTPC7_CFG_QM_TENSOR_7_DIM_3_BASE_OFFSET 0xFC6C50
759
760#define mmTPC7_CFG_QM_TENSOR_7_DIM_4_SIZE 0xFC6C54
761
762#define mmTPC7_CFG_QM_TENSOR_7_DIM_4_STRIDE 0xFC6C58
763
764#define mmTPC7_CFG_QM_TENSOR_7_DIM_4_BASE_OFFSET 0xFC6C5C
765
766#define mmTPC7_CFG_QM_KERNEL_BASE_ADDRESS_LOW 0xFC6C60
767
768#define mmTPC7_CFG_QM_KERNEL_BASE_ADDRESS_HIGH 0xFC6C64
769
770#define mmTPC7_CFG_QM_TID_BASE_DIM_0 0xFC6C68
771
772#define mmTPC7_CFG_QM_TID_SIZE_DIM_0 0xFC6C6C
773
774#define mmTPC7_CFG_QM_TID_BASE_DIM_1 0xFC6C70
775
776#define mmTPC7_CFG_QM_TID_SIZE_DIM_1 0xFC6C74
777
778#define mmTPC7_CFG_QM_TID_BASE_DIM_2 0xFC6C78
779
780#define mmTPC7_CFG_QM_TID_SIZE_DIM_2 0xFC6C7C
781
782#define mmTPC7_CFG_QM_TID_BASE_DIM_3 0xFC6C80
783
784#define mmTPC7_CFG_QM_TID_SIZE_DIM_3 0xFC6C84
785
786#define mmTPC7_CFG_QM_TID_BASE_DIM_4 0xFC6C88
787
788#define mmTPC7_CFG_QM_TID_SIZE_DIM_4 0xFC6C8C
789
790#define mmTPC7_CFG_QM_SRF_0 0xFC6C90
791
792#define mmTPC7_CFG_QM_SRF_1 0xFC6C94
793
794#define mmTPC7_CFG_QM_SRF_2 0xFC6C98
795
796#define mmTPC7_CFG_QM_SRF_3 0xFC6C9C
797
798#define mmTPC7_CFG_QM_SRF_4 0xFC6CA0
799
800#define mmTPC7_CFG_QM_SRF_5 0xFC6CA4
801
802#define mmTPC7_CFG_QM_SRF_6 0xFC6CA8
803
804#define mmTPC7_CFG_QM_SRF_7 0xFC6CAC
805
806#define mmTPC7_CFG_QM_SRF_8 0xFC6CB0
807
808#define mmTPC7_CFG_QM_SRF_9 0xFC6CB4
809
810#define mmTPC7_CFG_QM_SRF_10 0xFC6CB8
811
812#define mmTPC7_CFG_QM_SRF_11 0xFC6CBC
813
814#define mmTPC7_CFG_QM_SRF_12 0xFC6CC0
815
816#define mmTPC7_CFG_QM_SRF_13 0xFC6CC4
817
818#define mmTPC7_CFG_QM_SRF_14 0xFC6CC8
819
820#define mmTPC7_CFG_QM_SRF_15 0xFC6CCC
821
822#define mmTPC7_CFG_QM_SRF_16 0xFC6CD0
823
824#define mmTPC7_CFG_QM_SRF_17 0xFC6CD4
825
826#define mmTPC7_CFG_QM_SRF_18 0xFC6CD8
827
828#define mmTPC7_CFG_QM_SRF_19 0xFC6CDC
829
830#define mmTPC7_CFG_QM_SRF_20 0xFC6CE0
831
832#define mmTPC7_CFG_QM_SRF_21 0xFC6CE4
833
834#define mmTPC7_CFG_QM_SRF_22 0xFC6CE8
835
836#define mmTPC7_CFG_QM_SRF_23 0xFC6CEC
837
838#define mmTPC7_CFG_QM_SRF_24 0xFC6CF0
839
840#define mmTPC7_CFG_QM_SRF_25 0xFC6CF4
841
842#define mmTPC7_CFG_QM_SRF_26 0xFC6CF8
843
844#define mmTPC7_CFG_QM_SRF_27 0xFC6CFC
845
846#define mmTPC7_CFG_QM_SRF_28 0xFC6D00
847
848#define mmTPC7_CFG_QM_SRF_29 0xFC6D04
849
850#define mmTPC7_CFG_QM_SRF_30 0xFC6D08
851
852#define mmTPC7_CFG_QM_SRF_31 0xFC6D0C
853
854#define mmTPC7_CFG_QM_KERNEL_CONFIG 0xFC6D10
855
856#define mmTPC7_CFG_QM_SYNC_OBJECT_MESSAGE 0xFC6D14
857
858#define mmTPC7_CFG_ARUSER 0xFC6D18
859
860#define mmTPC7_CFG_AWUSER 0xFC6D1C
861
862#define mmTPC7_CFG_FUNC_MBIST_CNTRL 0xFC6E00
863
864#define mmTPC7_CFG_FUNC_MBIST_PAT 0xFC6E04
865
866#define mmTPC7_CFG_FUNC_MBIST_MEM_0 0xFC6E08
867
868#define mmTPC7_CFG_FUNC_MBIST_MEM_1 0xFC6E0C
869
870#define mmTPC7_CFG_FUNC_MBIST_MEM_2 0xFC6E10
871
872#define mmTPC7_CFG_FUNC_MBIST_MEM_3 0xFC6E14
873
874#define mmTPC7_CFG_FUNC_MBIST_MEM_4 0xFC6E18
875
876#define mmTPC7_CFG_FUNC_MBIST_MEM_5 0xFC6E1C
877
878#define mmTPC7_CFG_FUNC_MBIST_MEM_6 0xFC6E20
879
880#define mmTPC7_CFG_FUNC_MBIST_MEM_7 0xFC6E24
881
882#define mmTPC7_CFG_FUNC_MBIST_MEM_8 0xFC6E28
883
884#define mmTPC7_CFG_FUNC_MBIST_MEM_9 0xFC6E2C
885
886#endif /* ASIC_REG_TPC7_CFG_REGS_H_ */
887

source code of linux/drivers/accel/habanalabs/include/goya/asic_reg/tpc7_cfg_regs.h