1/*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23/* amdgpu_amdkfd.h defines the private interface between amdgpu and amdkfd. */
24
25#ifndef AMDGPU_AMDKFD_H_INCLUDED
26#define AMDGPU_AMDKFD_H_INCLUDED
27
28#include <linux/types.h>
29#include <linux/mm.h>
30#include <linux/kthread.h>
31#include <linux/workqueue.h>
32#include <kgd_kfd_interface.h>
33#include <drm/ttm/ttm_execbuf_util.h>
34#include "amdgpu_sync.h"
35#include "amdgpu_vm.h"
36
37extern uint64_t amdgpu_amdkfd_total_mem_size;
38
39enum TLB_FLUSH_TYPE {
40 TLB_FLUSH_LEGACY = 0,
41 TLB_FLUSH_LIGHTWEIGHT,
42 TLB_FLUSH_HEAVYWEIGHT
43};
44
45struct amdgpu_device;
46
47enum kfd_mem_attachment_type {
48 KFD_MEM_ATT_SHARED, /* Share kgd_mem->bo or another attachment's */
49 KFD_MEM_ATT_USERPTR, /* SG bo to DMA map pages from a userptr bo */
50 KFD_MEM_ATT_DMABUF, /* DMAbuf to DMA map TTM BOs */
51 KFD_MEM_ATT_SG /* Tag to DMA map SG BOs */
52};
53
54struct kfd_mem_attachment {
55 struct list_head list;
56 enum kfd_mem_attachment_type type;
57 bool is_mapped;
58 struct amdgpu_bo_va *bo_va;
59 struct amdgpu_device *adev;
60 uint64_t va;
61 uint64_t pte_flags;
62};
63
64struct kgd_mem {
65 struct mutex lock;
66 struct amdgpu_bo *bo;
67 struct dma_buf *dmabuf;
68 struct list_head attachments;
69 /* protected by amdkfd_process_info.lock */
70 struct ttm_validate_buffer validate_list;
71 struct ttm_validate_buffer resv_list;
72 uint32_t domain;
73 unsigned int mapped_to_gpu_memory;
74 uint64_t va;
75
76 uint32_t alloc_flags;
77
78 atomic_t invalid;
79 struct amdkfd_process_info *process_info;
80
81 struct amdgpu_sync sync;
82
83 bool aql_queue;
84 bool is_imported;
85};
86
87/* KFD Memory Eviction */
88struct amdgpu_amdkfd_fence {
89 struct dma_fence base;
90 struct mm_struct *mm;
91 spinlock_t lock;
92 char timeline_name[TASK_COMM_LEN];
93 struct svm_range_bo *svm_bo;
94};
95
96struct amdgpu_kfd_dev {
97 struct kfd_dev *dev;
98 uint64_t vram_used;
99 bool init_complete;
100 struct work_struct reset_work;
101};
102
103enum kgd_engine_type {
104 KGD_ENGINE_PFP = 1,
105 KGD_ENGINE_ME,
106 KGD_ENGINE_CE,
107 KGD_ENGINE_MEC1,
108 KGD_ENGINE_MEC2,
109 KGD_ENGINE_RLC,
110 KGD_ENGINE_SDMA1,
111 KGD_ENGINE_SDMA2,
112 KGD_ENGINE_MAX
113};
114
115
116struct amdkfd_process_info {
117 /* List head of all VMs that belong to a KFD process */
118 struct list_head vm_list_head;
119 /* List head for all KFD BOs that belong to a KFD process. */
120 struct list_head kfd_bo_list;
121 /* List of userptr BOs that are valid or invalid */
122 struct list_head userptr_valid_list;
123 struct list_head userptr_inval_list;
124 /* Lock to protect kfd_bo_list */
125 struct mutex lock;
126
127 /* Number of VMs */
128 unsigned int n_vms;
129 /* Eviction Fence */
130 struct amdgpu_amdkfd_fence *eviction_fence;
131
132 /* MMU-notifier related fields */
133 atomic_t evicted_bos;
134 struct delayed_work restore_userptr_work;
135 struct pid *pid;
136 bool block_mmu_notifications;
137};
138
139int amdgpu_amdkfd_init(void);
140void amdgpu_amdkfd_fini(void);
141
142void amdgpu_amdkfd_suspend(struct amdgpu_device *adev, bool run_pm);
143int amdgpu_amdkfd_resume_iommu(struct amdgpu_device *adev);
144int amdgpu_amdkfd_resume(struct amdgpu_device *adev, bool run_pm);
145void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev,
146 const void *ih_ring_entry);
147void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev);
148void amdgpu_amdkfd_device_init(struct amdgpu_device *adev);
149void amdgpu_amdkfd_device_fini_sw(struct amdgpu_device *adev);
150int amdgpu_amdkfd_submit_ib(struct amdgpu_device *adev,
151 enum kgd_engine_type engine,
152 uint32_t vmid, uint64_t gpu_addr,
153 uint32_t *ib_cmd, uint32_t ib_len);
154void amdgpu_amdkfd_set_compute_idle(struct amdgpu_device *adev, bool idle);
155bool amdgpu_amdkfd_have_atomics_support(struct amdgpu_device *adev);
156int amdgpu_amdkfd_flush_gpu_tlb_vmid(struct amdgpu_device *adev,
157 uint16_t vmid);
158int amdgpu_amdkfd_flush_gpu_tlb_pasid(struct amdgpu_device *adev,
159 uint16_t pasid, enum TLB_FLUSH_TYPE flush_type);
160
161bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid);
162
163int amdgpu_amdkfd_pre_reset(struct amdgpu_device *adev);
164
165int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev);
166
167void amdgpu_amdkfd_gpu_reset(struct amdgpu_device *adev);
168
169int amdgpu_queue_mask_bit_to_set_resource_bit(struct amdgpu_device *adev,
170 int queue_bit);
171
172struct amdgpu_amdkfd_fence *amdgpu_amdkfd_fence_create(u64 context,
173 struct mm_struct *mm,
174 struct svm_range_bo *svm_bo);
175#if defined(CONFIG_DEBUG_FS)
176int kfd_debugfs_kfd_mem_limits(struct seq_file *m, void *data);
177#endif
178#if IS_ENABLED(CONFIG_HSA_AMD)
179bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm);
180struct amdgpu_amdkfd_fence *to_amdgpu_amdkfd_fence(struct dma_fence *f);
181int amdgpu_amdkfd_remove_fence_on_pt_pd_bos(struct amdgpu_bo *bo);
182int amdgpu_amdkfd_evict_userptr(struct kgd_mem *mem, struct mm_struct *mm);
183#else
184static inline
185bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm)
186{
187 return false;
188}
189
190static inline
191struct amdgpu_amdkfd_fence *to_amdgpu_amdkfd_fence(struct dma_fence *f)
192{
193 return NULL;
194}
195
196static inline
197int amdgpu_amdkfd_remove_fence_on_pt_pd_bos(struct amdgpu_bo *bo)
198{
199 return 0;
200}
201
202static inline
203int amdgpu_amdkfd_evict_userptr(struct kgd_mem *mem, struct mm_struct *mm)
204{
205 return 0;
206}
207#endif
208/* Shared API */
209int amdgpu_amdkfd_alloc_gtt_mem(struct amdgpu_device *adev, size_t size,
210 void **mem_obj, uint64_t *gpu_addr,
211 void **cpu_ptr, bool mqd_gfx9);
212void amdgpu_amdkfd_free_gtt_mem(struct amdgpu_device *adev, void *mem_obj);
213int amdgpu_amdkfd_alloc_gws(struct amdgpu_device *adev, size_t size,
214 void **mem_obj);
215void amdgpu_amdkfd_free_gws(struct amdgpu_device *adev, void *mem_obj);
216int amdgpu_amdkfd_add_gws_to_process(void *info, void *gws, struct kgd_mem **mem);
217int amdgpu_amdkfd_remove_gws_from_process(void *info, void *mem);
218uint32_t amdgpu_amdkfd_get_fw_version(struct amdgpu_device *adev,
219 enum kgd_engine_type type);
220void amdgpu_amdkfd_get_local_mem_info(struct amdgpu_device *adev,
221 struct kfd_local_mem_info *mem_info);
222uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct amdgpu_device *adev);
223
224uint32_t amdgpu_amdkfd_get_max_engine_clock_in_mhz(struct amdgpu_device *adev);
225void amdgpu_amdkfd_get_cu_info(struct amdgpu_device *adev,
226 struct kfd_cu_info *cu_info);
227int amdgpu_amdkfd_get_dmabuf_info(struct amdgpu_device *adev, int dma_buf_fd,
228 struct amdgpu_device **dmabuf_adev,
229 uint64_t *bo_size, void *metadata_buffer,
230 size_t buffer_size, uint32_t *metadata_size,
231 uint32_t *flags);
232uint8_t amdgpu_amdkfd_get_xgmi_hops_count(struct amdgpu_device *dst,
233 struct amdgpu_device *src);
234int amdgpu_amdkfd_get_xgmi_bandwidth_mbytes(struct amdgpu_device *dst,
235 struct amdgpu_device *src,
236 bool is_min);
237int amdgpu_amdkfd_get_pcie_bandwidth_mbytes(struct amdgpu_device *adev, bool is_min);
238
239/* Read user wptr from a specified user address space with page fault
240 * disabled. The memory must be pinned and mapped to the hardware when
241 * this is called in hqd_load functions, so it should never fault in
242 * the first place. This resolves a circular lock dependency involving
243 * four locks, including the DQM lock and mmap_lock.
244 */
245#define read_user_wptr(mmptr, wptr, dst) \
246 ({ \
247 bool valid = false; \
248 if ((mmptr) && (wptr)) { \
249 pagefault_disable(); \
250 if ((mmptr) == current->mm) { \
251 valid = !get_user((dst), (wptr)); \
252 } else if (current->flags & PF_KTHREAD) { \
253 kthread_use_mm(mmptr); \
254 valid = !get_user((dst), (wptr)); \
255 kthread_unuse_mm(mmptr); \
256 } \
257 pagefault_enable(); \
258 } \
259 valid; \
260 })
261
262/* GPUVM API */
263#define drm_priv_to_vm(drm_priv) \
264 (&((struct amdgpu_fpriv *) \
265 ((struct drm_file *)(drm_priv))->driver_priv)->vm)
266
267int amdgpu_amdkfd_gpuvm_acquire_process_vm(struct amdgpu_device *adev,
268 struct file *filp, u32 pasid,
269 void **process_info,
270 struct dma_fence **ef);
271void amdgpu_amdkfd_gpuvm_release_process_vm(struct amdgpu_device *adev,
272 void *drm_priv);
273uint64_t amdgpu_amdkfd_gpuvm_get_process_page_dir(void *drm_priv);
274size_t amdgpu_amdkfd_get_available_memory(struct amdgpu_device *adev);
275int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
276 struct amdgpu_device *adev, uint64_t va, uint64_t size,
277 void *drm_priv, struct kgd_mem **mem,
278 uint64_t *offset, uint32_t flags, bool criu_resume);
279int amdgpu_amdkfd_gpuvm_free_memory_of_gpu(
280 struct amdgpu_device *adev, struct kgd_mem *mem, void *drm_priv,
281 uint64_t *size);
282int amdgpu_amdkfd_gpuvm_map_memory_to_gpu(struct amdgpu_device *adev,
283 struct kgd_mem *mem, void *drm_priv);
284int amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu(
285 struct amdgpu_device *adev, struct kgd_mem *mem, void *drm_priv);
286int amdgpu_amdkfd_gpuvm_sync_memory(
287 struct amdgpu_device *adev, struct kgd_mem *mem, bool intr);
288int amdgpu_amdkfd_gpuvm_map_gtt_bo_to_kernel(struct kgd_mem *mem,
289 void **kptr, uint64_t *size);
290void amdgpu_amdkfd_gpuvm_unmap_gtt_bo_from_kernel(struct kgd_mem *mem);
291
292int amdgpu_amdkfd_map_gtt_bo_to_gart(struct amdgpu_device *adev, struct amdgpu_bo *bo);
293
294int amdgpu_amdkfd_gpuvm_restore_process_bos(void *process_info,
295 struct dma_fence **ef);
296int amdgpu_amdkfd_gpuvm_get_vm_fault_info(struct amdgpu_device *adev,
297 struct kfd_vm_fault_info *info);
298int amdgpu_amdkfd_gpuvm_import_dmabuf(struct amdgpu_device *adev,
299 struct dma_buf *dmabuf,
300 uint64_t va, void *drm_priv,
301 struct kgd_mem **mem, uint64_t *size,
302 uint64_t *mmap_offset);
303int amdgpu_amdkfd_get_tile_config(struct amdgpu_device *adev,
304 struct tile_config *config);
305void amdgpu_amdkfd_ras_poison_consumption_handler(struct amdgpu_device *adev,
306 bool reset);
307bool amdgpu_amdkfd_bo_mapped_to_dev(struct amdgpu_device *adev, struct kgd_mem *mem);
308void amdgpu_amdkfd_block_mmu_notifications(void *p);
309int amdgpu_amdkfd_criu_resume(void *p);
310bool amdgpu_amdkfd_ras_query_utcl2_poison_status(struct amdgpu_device *adev);
311int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device *adev,
312 uint64_t size, u32 alloc_flag);
313void amdgpu_amdkfd_unreserve_mem_limit(struct amdgpu_device *adev,
314 uint64_t size, u32 alloc_flag);
315
316#if IS_ENABLED(CONFIG_HSA_AMD)
317void amdgpu_amdkfd_gpuvm_init_mem_limits(void);
318void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev,
319 struct amdgpu_vm *vm);
320
321/**
322 * @amdgpu_amdkfd_release_notify() - Notify KFD when GEM object is released
323 *
324 * Allows KFD to release its resources associated with the GEM object.
325 */
326void amdgpu_amdkfd_release_notify(struct amdgpu_bo *bo);
327void amdgpu_amdkfd_reserve_system_mem(uint64_t size);
328#else
329static inline
330void amdgpu_amdkfd_gpuvm_init_mem_limits(void)
331{
332}
333
334static inline
335void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev,
336 struct amdgpu_vm *vm)
337{
338}
339
340static inline
341void amdgpu_amdkfd_release_notify(struct amdgpu_bo *bo)
342{
343}
344#endif
345/* KGD2KFD callbacks */
346int kgd2kfd_quiesce_mm(struct mm_struct *mm, uint32_t trigger);
347int kgd2kfd_resume_mm(struct mm_struct *mm);
348int kgd2kfd_schedule_evict_and_restore_process(struct mm_struct *mm,
349 struct dma_fence *fence);
350#if IS_ENABLED(CONFIG_HSA_AMD)
351int kgd2kfd_init(void);
352void kgd2kfd_exit(void);
353struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf);
354bool kgd2kfd_device_init(struct kfd_dev *kfd,
355 struct drm_device *ddev,
356 const struct kgd2kfd_shared_resources *gpu_resources);
357void kgd2kfd_device_exit(struct kfd_dev *kfd);
358void kgd2kfd_suspend(struct kfd_dev *kfd, bool run_pm);
359int kgd2kfd_resume_iommu(struct kfd_dev *kfd);
360int kgd2kfd_resume(struct kfd_dev *kfd, bool run_pm);
361int kgd2kfd_pre_reset(struct kfd_dev *kfd);
362int kgd2kfd_post_reset(struct kfd_dev *kfd);
363void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry);
364void kgd2kfd_set_sram_ecc_flag(struct kfd_dev *kfd);
365void kgd2kfd_smi_event_throttle(struct kfd_dev *kfd, uint64_t throttle_bitmask);
366#else
367static inline int kgd2kfd_init(void)
368{
369 return -ENOENT;
370}
371
372static inline void kgd2kfd_exit(void)
373{
374}
375
376static inline
377struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf)
378{
379 return NULL;
380}
381
382static inline
383bool kgd2kfd_device_init(struct kfd_dev *kfd, struct drm_device *ddev,
384 const struct kgd2kfd_shared_resources *gpu_resources)
385{
386 return false;
387}
388
389static inline void kgd2kfd_device_exit(struct kfd_dev *kfd)
390{
391}
392
393static inline void kgd2kfd_suspend(struct kfd_dev *kfd, bool run_pm)
394{
395}
396
397static int __maybe_unused kgd2kfd_resume_iommu(struct kfd_dev *kfd)
398{
399 return 0;
400}
401
402static inline int kgd2kfd_resume(struct kfd_dev *kfd, bool run_pm)
403{
404 return 0;
405}
406
407static inline int kgd2kfd_pre_reset(struct kfd_dev *kfd)
408{
409 return 0;
410}
411
412static inline int kgd2kfd_post_reset(struct kfd_dev *kfd)
413{
414 return 0;
415}
416
417static inline
418void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry)
419{
420}
421
422static inline
423void kgd2kfd_set_sram_ecc_flag(struct kfd_dev *kfd)
424{
425}
426
427static inline
428void kgd2kfd_smi_event_throttle(struct kfd_dev *kfd, uint64_t throttle_bitmask)
429{
430}
431#endif
432#endif /* AMDGPU_AMDKFD_H_INCLUDED */
433

source code of linux/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h