1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (C) 2018-2025, Advanced Micro Devices, Inc. */
3
4#include <linux/module.h>
5#include <linux/printk.h>
6#include <linux/pci.h>
7#include <linux/irq.h>
8#include <net/addrconf.h>
9#include <rdma/ib_addr.h>
10#include <rdma/ib_mad.h>
11
12#include "ionic_ibdev.h"
13
14#define DRIVER_DESCRIPTION "AMD Pensando RoCE HCA driver"
15#define DEVICE_DESCRIPTION "AMD Pensando RoCE HCA"
16
17MODULE_AUTHOR("Allen Hubbe <allen.hubbe@amd.com>");
18MODULE_DESCRIPTION(DRIVER_DESCRIPTION);
19MODULE_LICENSE("GPL");
20MODULE_IMPORT_NS("NET_IONIC");
21
22static int ionic_query_device(struct ib_device *ibdev,
23 struct ib_device_attr *attr,
24 struct ib_udata *udata)
25{
26 struct ionic_ibdev *dev = to_ionic_ibdev(ibdev);
27 struct net_device *ndev;
28
29 ndev = ib_device_get_netdev(ib_dev: ibdev, port: 1);
30 addrconf_ifid_eui48(eui: (u8 *)&attr->sys_image_guid, dev: ndev);
31 dev_put(dev: ndev);
32 attr->max_mr_size = dev->lif_cfg.npts_per_lif * PAGE_SIZE / 2;
33 attr->page_size_cap = dev->lif_cfg.page_size_supported;
34
35 attr->vendor_id = to_pci_dev(dev->lif_cfg.hwdev)->vendor;
36 attr->vendor_part_id = to_pci_dev(dev->lif_cfg.hwdev)->device;
37
38 attr->hw_ver = ionic_lif_asic_rev(lif: dev->lif_cfg.lif);
39 attr->fw_ver = 0;
40 attr->max_qp = dev->lif_cfg.qp_count;
41 attr->max_qp_wr = IONIC_MAX_DEPTH;
42 attr->device_cap_flags =
43 IB_DEVICE_MEM_WINDOW |
44 IB_DEVICE_MEM_MGT_EXTENSIONS |
45 IB_DEVICE_MEM_WINDOW_TYPE_2B |
46 0;
47 attr->max_send_sge =
48 min(ionic_v1_send_wqe_max_sge(dev->lif_cfg.max_stride, 0, false),
49 IONIC_SPEC_HIGH);
50 attr->max_recv_sge =
51 min(ionic_v1_recv_wqe_max_sge(dev->lif_cfg.max_stride, 0, false),
52 IONIC_SPEC_HIGH);
53 attr->max_sge_rd = attr->max_send_sge;
54 attr->max_cq = dev->lif_cfg.cq_count / dev->lif_cfg.udma_count;
55 attr->max_cqe = IONIC_MAX_CQ_DEPTH - IONIC_CQ_GRACE;
56 attr->max_mr = dev->lif_cfg.nmrs_per_lif;
57 attr->max_pd = IONIC_MAX_PD;
58 attr->max_qp_rd_atom = IONIC_MAX_RD_ATOM;
59 attr->max_ee_rd_atom = 0;
60 attr->max_res_rd_atom = IONIC_MAX_RD_ATOM;
61 attr->max_qp_init_rd_atom = IONIC_MAX_RD_ATOM;
62 attr->max_ee_init_rd_atom = 0;
63 attr->atomic_cap = IB_ATOMIC_GLOB;
64 attr->masked_atomic_cap = IB_ATOMIC_GLOB;
65 attr->max_mw = dev->lif_cfg.nmrs_per_lif;
66 attr->max_mcast_grp = 0;
67 attr->max_mcast_qp_attach = 0;
68 attr->max_ah = dev->lif_cfg.nahs_per_lif;
69 attr->max_fast_reg_page_list_len = dev->lif_cfg.npts_per_lif / 2;
70 attr->max_pkeys = IONIC_PKEY_TBL_LEN;
71
72 return 0;
73}
74
75static int ionic_query_port(struct ib_device *ibdev, u32 port,
76 struct ib_port_attr *attr)
77{
78 struct net_device *ndev;
79
80 if (port != 1)
81 return -EINVAL;
82
83 ndev = ib_device_get_netdev(ib_dev: ibdev, port);
84
85 if (netif_running(dev: ndev) && netif_carrier_ok(dev: ndev)) {
86 attr->state = IB_PORT_ACTIVE;
87 attr->phys_state = IB_PORT_PHYS_STATE_LINK_UP;
88 } else if (netif_running(dev: ndev)) {
89 attr->state = IB_PORT_DOWN;
90 attr->phys_state = IB_PORT_PHYS_STATE_POLLING;
91 } else {
92 attr->state = IB_PORT_DOWN;
93 attr->phys_state = IB_PORT_PHYS_STATE_DISABLED;
94 }
95
96 attr->max_mtu = iboe_get_mtu(mtu: ndev->max_mtu);
97 attr->active_mtu = min(attr->max_mtu, iboe_get_mtu(ndev->mtu));
98 attr->gid_tbl_len = IONIC_GID_TBL_LEN;
99 attr->ip_gids = true;
100 attr->port_cap_flags = 0;
101 attr->max_msg_sz = 0x80000000;
102 attr->pkey_tbl_len = IONIC_PKEY_TBL_LEN;
103 attr->max_vl_num = 1;
104 attr->subnet_prefix = 0xfe80000000000000ull;
105
106 dev_put(dev: ndev);
107
108 return ib_get_eth_speed(dev: ibdev, port_num: port,
109 speed: &attr->active_speed,
110 width: &attr->active_width);
111}
112
113static enum rdma_link_layer ionic_get_link_layer(struct ib_device *ibdev,
114 u32 port)
115{
116 return IB_LINK_LAYER_ETHERNET;
117}
118
119static int ionic_query_pkey(struct ib_device *ibdev, u32 port, u16 index,
120 u16 *pkey)
121{
122 if (port != 1)
123 return -EINVAL;
124
125 if (index != 0)
126 return -EINVAL;
127
128 *pkey = IB_DEFAULT_PKEY_FULL;
129
130 return 0;
131}
132
133static int ionic_modify_device(struct ib_device *ibdev, int mask,
134 struct ib_device_modify *attr)
135{
136 struct ionic_ibdev *dev = to_ionic_ibdev(ibdev);
137
138 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
139 return -EOPNOTSUPP;
140
141 if (mask & IB_DEVICE_MODIFY_NODE_DESC)
142 memcpy(dev->ibdev.node_desc, attr->node_desc,
143 IB_DEVICE_NODE_DESC_MAX);
144
145 return 0;
146}
147
148static int ionic_get_port_immutable(struct ib_device *ibdev, u32 port,
149 struct ib_port_immutable *attr)
150{
151 if (port != 1)
152 return -EINVAL;
153
154 attr->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
155
156 attr->pkey_tbl_len = IONIC_PKEY_TBL_LEN;
157 attr->gid_tbl_len = IONIC_GID_TBL_LEN;
158 attr->max_mad_size = IB_MGMT_MAD_SIZE;
159
160 return 0;
161}
162
163static void ionic_get_dev_fw_str(struct ib_device *ibdev, char *str)
164{
165 struct ionic_ibdev *dev = to_ionic_ibdev(ibdev);
166
167 ionic_lif_fw_version(lif: dev->lif_cfg.lif, str, IB_FW_VERSION_NAME_MAX);
168}
169
170static ssize_t hw_rev_show(struct device *device, struct device_attribute *attr,
171 char *buf)
172{
173 struct ionic_ibdev *dev =
174 rdma_device_to_drv_device(device, struct ionic_ibdev, ibdev);
175
176 return sysfs_emit(buf, fmt: "0x%x\n", ionic_lif_asic_rev(lif: dev->lif_cfg.lif));
177}
178static DEVICE_ATTR_RO(hw_rev);
179
180static ssize_t hca_type_show(struct device *device,
181 struct device_attribute *attr, char *buf)
182{
183 struct ionic_ibdev *dev =
184 rdma_device_to_drv_device(device, struct ionic_ibdev, ibdev);
185
186 return sysfs_emit(buf, fmt: "%s\n", dev->ibdev.node_desc);
187}
188static DEVICE_ATTR_RO(hca_type);
189
190static struct attribute *ionic_rdma_attributes[] = {
191 &dev_attr_hw_rev.attr,
192 &dev_attr_hca_type.attr,
193 NULL
194};
195
196static const struct attribute_group ionic_rdma_attr_group = {
197 .attrs = ionic_rdma_attributes,
198};
199
200static void ionic_disassociate_ucontext(struct ib_ucontext *ibcontext)
201{
202 /*
203 * Dummy define disassociate_ucontext so that it does not
204 * wait for user context before cleaning up hw resources.
205 */
206}
207
208static const struct ib_device_ops ionic_dev_ops = {
209 .owner = THIS_MODULE,
210 .driver_id = RDMA_DRIVER_IONIC,
211 .uverbs_abi_ver = IONIC_ABI_VERSION,
212
213 .alloc_ucontext = ionic_alloc_ucontext,
214 .dealloc_ucontext = ionic_dealloc_ucontext,
215 .mmap = ionic_mmap,
216 .mmap_free = ionic_mmap_free,
217 .alloc_pd = ionic_alloc_pd,
218 .dealloc_pd = ionic_dealloc_pd,
219 .create_ah = ionic_create_ah,
220 .query_ah = ionic_query_ah,
221 .destroy_ah = ionic_destroy_ah,
222 .create_user_ah = ionic_create_ah,
223 .get_dma_mr = ionic_get_dma_mr,
224 .reg_user_mr = ionic_reg_user_mr,
225 .reg_user_mr_dmabuf = ionic_reg_user_mr_dmabuf,
226 .dereg_mr = ionic_dereg_mr,
227 .alloc_mr = ionic_alloc_mr,
228 .map_mr_sg = ionic_map_mr_sg,
229 .alloc_mw = ionic_alloc_mw,
230 .dealloc_mw = ionic_dealloc_mw,
231 .create_cq = ionic_create_cq,
232 .destroy_cq = ionic_destroy_cq,
233 .create_qp = ionic_create_qp,
234 .modify_qp = ionic_modify_qp,
235 .query_qp = ionic_query_qp,
236 .destroy_qp = ionic_destroy_qp,
237
238 .post_send = ionic_post_send,
239 .post_recv = ionic_post_recv,
240 .poll_cq = ionic_poll_cq,
241 .req_notify_cq = ionic_req_notify_cq,
242
243 .query_device = ionic_query_device,
244 .query_port = ionic_query_port,
245 .get_link_layer = ionic_get_link_layer,
246 .query_pkey = ionic_query_pkey,
247 .modify_device = ionic_modify_device,
248 .get_port_immutable = ionic_get_port_immutable,
249 .get_dev_fw_str = ionic_get_dev_fw_str,
250 .device_group = &ionic_rdma_attr_group,
251 .disassociate_ucontext = ionic_disassociate_ucontext,
252
253 INIT_RDMA_OBJ_SIZE(ib_ucontext, ionic_ctx, ibctx),
254 INIT_RDMA_OBJ_SIZE(ib_pd, ionic_pd, ibpd),
255 INIT_RDMA_OBJ_SIZE(ib_ah, ionic_ah, ibah),
256 INIT_RDMA_OBJ_SIZE(ib_cq, ionic_vcq, ibcq),
257 INIT_RDMA_OBJ_SIZE(ib_qp, ionic_qp, ibqp),
258 INIT_RDMA_OBJ_SIZE(ib_mw, ionic_mr, ibmw),
259};
260
261static void ionic_init_resids(struct ionic_ibdev *dev)
262{
263 ionic_resid_init(resid: &dev->inuse_cqid, size: dev->lif_cfg.cq_count);
264 dev->half_cqid_udma_shift =
265 order_base_2(dev->lif_cfg.cq_count / dev->lif_cfg.udma_count);
266 ionic_resid_init(resid: &dev->inuse_pdid, IONIC_MAX_PD);
267 ionic_resid_init(resid: &dev->inuse_ahid, size: dev->lif_cfg.nahs_per_lif);
268 ionic_resid_init(resid: &dev->inuse_mrid, size: dev->lif_cfg.nmrs_per_lif);
269 /* skip reserved lkey */
270 dev->next_mrkey = 1;
271 ionic_resid_init(resid: &dev->inuse_qpid, size: dev->lif_cfg.qp_count);
272 /* skip reserved SMI and GSI qpids */
273 dev->half_qpid_udma_shift =
274 order_base_2(dev->lif_cfg.qp_count / dev->lif_cfg.udma_count);
275 ionic_resid_init(resid: &dev->inuse_dbid, size: dev->lif_cfg.dbid_count);
276}
277
278static void ionic_destroy_resids(struct ionic_ibdev *dev)
279{
280 ionic_resid_destroy(resid: &dev->inuse_cqid);
281 ionic_resid_destroy(resid: &dev->inuse_pdid);
282 ionic_resid_destroy(resid: &dev->inuse_ahid);
283 ionic_resid_destroy(resid: &dev->inuse_mrid);
284 ionic_resid_destroy(resid: &dev->inuse_qpid);
285 ionic_resid_destroy(resid: &dev->inuse_dbid);
286}
287
288static void ionic_destroy_ibdev(struct ionic_ibdev *dev)
289{
290 ionic_kill_rdma_admin(dev, fatal_path: false);
291 ib_unregister_device(device: &dev->ibdev);
292 ionic_stats_cleanup(dev);
293 ionic_destroy_rdma_admin(dev);
294 ionic_destroy_resids(dev);
295 WARN_ON(!xa_empty(&dev->qp_tbl));
296 xa_destroy(&dev->qp_tbl);
297 WARN_ON(!xa_empty(&dev->cq_tbl));
298 xa_destroy(&dev->cq_tbl);
299 ib_dealloc_device(device: &dev->ibdev);
300}
301
302static struct ionic_ibdev *ionic_create_ibdev(struct ionic_aux_dev *ionic_adev)
303{
304 struct ib_device *ibdev;
305 struct ionic_ibdev *dev;
306 struct net_device *ndev;
307 int rc;
308
309 dev = ib_alloc_device(ionic_ibdev, ibdev);
310 if (!dev)
311 return ERR_PTR(error: -EINVAL);
312
313 ionic_fill_lif_cfg(lif: ionic_adev->lif, cfg: &dev->lif_cfg);
314
315 xa_init_flags(xa: &dev->qp_tbl, GFP_ATOMIC);
316 xa_init_flags(xa: &dev->cq_tbl, GFP_ATOMIC);
317
318 ionic_init_resids(dev);
319
320 rc = ionic_rdma_reset_devcmd(dev);
321 if (rc)
322 goto err_reset;
323
324 rc = ionic_create_rdma_admin(dev);
325 if (rc)
326 goto err_admin;
327
328 ibdev = &dev->ibdev;
329 ibdev->dev.parent = dev->lif_cfg.hwdev;
330
331 strscpy(ibdev->name, "ionic_%d", IB_DEVICE_NAME_MAX);
332 strscpy(ibdev->node_desc, DEVICE_DESCRIPTION, IB_DEVICE_NODE_DESC_MAX);
333
334 ibdev->node_type = RDMA_NODE_IB_CA;
335 ibdev->phys_port_cnt = 1;
336
337 /* the first two eq are reserved for async events */
338 ibdev->num_comp_vectors = dev->lif_cfg.eq_count - 2;
339
340 ndev = ionic_lif_netdev(lif: ionic_adev->lif);
341 addrconf_ifid_eui48(eui: (u8 *)&ibdev->node_guid, dev: ndev);
342 rc = ib_device_set_netdev(ib_dev: ibdev, ndev, port: 1);
343 /* ionic_lif_netdev() returns ndev with refcount held */
344 dev_put(dev: ndev);
345 if (rc)
346 goto err_admin;
347
348 ib_set_device_ops(device: &dev->ibdev, ops: &ionic_dev_ops);
349
350 ionic_stats_init(dev);
351
352 rc = ib_register_device(device: ibdev, name: "ionic_%d", dma_device: ibdev->dev.parent);
353 if (rc)
354 goto err_register;
355
356 return dev;
357
358err_register:
359 ionic_stats_cleanup(dev);
360err_admin:
361 ionic_kill_rdma_admin(dev, fatal_path: false);
362 ionic_destroy_rdma_admin(dev);
363err_reset:
364 ionic_destroy_resids(dev);
365 xa_destroy(&dev->qp_tbl);
366 xa_destroy(&dev->cq_tbl);
367 ib_dealloc_device(device: &dev->ibdev);
368
369 return ERR_PTR(error: rc);
370}
371
372static int ionic_aux_probe(struct auxiliary_device *adev,
373 const struct auxiliary_device_id *id)
374{
375 struct ionic_aux_dev *ionic_adev;
376 struct ionic_ibdev *dev;
377
378 ionic_adev = container_of(adev, struct ionic_aux_dev, adev);
379 dev = ionic_create_ibdev(ionic_adev);
380 if (IS_ERR(ptr: dev))
381 return dev_err_probe(dev: &adev->dev, err: PTR_ERR(ptr: dev),
382 fmt: "Failed to register ibdev\n");
383
384 auxiliary_set_drvdata(adev, dev);
385 ibdev_dbg(&dev->ibdev, "registered\n");
386
387 return 0;
388}
389
390static void ionic_aux_remove(struct auxiliary_device *adev)
391{
392 struct ionic_ibdev *dev = auxiliary_get_drvdata(adev);
393
394 dev_dbg(&adev->dev, "unregister ibdev\n");
395 ionic_destroy_ibdev(dev);
396 dev_dbg(&adev->dev, "unregistered\n");
397}
398
399static const struct auxiliary_device_id ionic_aux_id_table[] = {
400 { .name = "ionic.rdma", },
401 {},
402};
403
404MODULE_DEVICE_TABLE(auxiliary, ionic_aux_id_table);
405
406static struct auxiliary_driver ionic_aux_r_driver = {
407 .name = "rdma",
408 .probe = ionic_aux_probe,
409 .remove = ionic_aux_remove,
410 .id_table = ionic_aux_id_table,
411};
412
413static int __init ionic_mod_init(void)
414{
415 int rc;
416
417 ionic_evt_workq = create_workqueue(KBUILD_MODNAME "-evt");
418 if (!ionic_evt_workq)
419 return -ENOMEM;
420
421 rc = auxiliary_driver_register(&ionic_aux_r_driver);
422 if (rc)
423 goto err_aux;
424
425 return 0;
426
427err_aux:
428 destroy_workqueue(wq: ionic_evt_workq);
429
430 return rc;
431}
432
433static void __exit ionic_mod_exit(void)
434{
435 auxiliary_driver_unregister(&ionic_aux_r_driver);
436 destroy_workqueue(wq: ionic_evt_workq);
437}
438
439module_init(ionic_mod_init);
440module_exit(ionic_mod_exit);
441

source code of linux/drivers/infiniband/hw/ionic/ionic_ibdev.c