1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2017 MediaTek, Inc.
4 *
5 * Author: Chen Zhong <chen.zhong@mediatek.com>
6 */
7
8#include <linux/input.h>
9#include <linux/interrupt.h>
10#include <linux/kernel.h>
11#include <linux/mfd/mt6323/registers.h>
12#include <linux/mfd/mt6331/registers.h>
13#include <linux/mfd/mt6357/registers.h>
14#include <linux/mfd/mt6358/registers.h>
15#include <linux/mfd/mt6359/registers.h>
16#include <linux/mfd/mt6397/core.h>
17#include <linux/mfd/mt6397/registers.h>
18#include <linux/module.h>
19#include <linux/of_device.h>
20#include <linux/of.h>
21#include <linux/platform_device.h>
22#include <linux/regmap.h>
23
24#define MTK_PMIC_RST_DU_MASK GENMASK(9, 8)
25#define MTK_PMIC_PWRKEY_RST BIT(6)
26#define MTK_PMIC_HOMEKEY_RST BIT(5)
27
28#define MTK_PMIC_MT6331_RST_DU_MASK GENMASK(13, 12)
29#define MTK_PMIC_MT6331_PWRKEY_RST BIT(9)
30#define MTK_PMIC_MT6331_HOMEKEY_RST BIT(8)
31
32#define MTK_PMIC_PWRKEY_INDEX 0
33#define MTK_PMIC_HOMEKEY_INDEX 1
34#define MTK_PMIC_MAX_KEY_COUNT 2
35
36struct mtk_pmic_keys_regs {
37 u32 deb_reg;
38 u32 deb_mask;
39 u32 intsel_reg;
40 u32 intsel_mask;
41 u32 rst_en_mask;
42};
43
44#define MTK_PMIC_KEYS_REGS(_deb_reg, _deb_mask, \
45 _intsel_reg, _intsel_mask, _rst_mask) \
46{ \
47 .deb_reg = _deb_reg, \
48 .deb_mask = _deb_mask, \
49 .intsel_reg = _intsel_reg, \
50 .intsel_mask = _intsel_mask, \
51 .rst_en_mask = _rst_mask, \
52}
53
54struct mtk_pmic_regs {
55 const struct mtk_pmic_keys_regs keys_regs[MTK_PMIC_MAX_KEY_COUNT];
56 u32 pmic_rst_reg;
57 u32 rst_lprst_mask; /* Long-press reset timeout bitmask */
58 bool key_release_irq;
59};
60
61static const struct mtk_pmic_regs mt6397_regs = {
62 .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
63 MTK_PMIC_KEYS_REGS(MT6397_CHRSTATUS,
64 0x8, MT6397_INT_RSV, 0x10, MTK_PMIC_PWRKEY_RST),
65 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
66 MTK_PMIC_KEYS_REGS(MT6397_OCSTATUS2,
67 0x10, MT6397_INT_RSV, 0x8, MTK_PMIC_HOMEKEY_RST),
68 .pmic_rst_reg = MT6397_TOP_RST_MISC,
69 .rst_lprst_mask = MTK_PMIC_RST_DU_MASK,
70};
71
72static const struct mtk_pmic_regs mt6323_regs = {
73 .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
74 MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS,
75 0x2, MT6323_INT_MISC_CON, 0x10, MTK_PMIC_PWRKEY_RST),
76 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
77 MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS,
78 0x4, MT6323_INT_MISC_CON, 0x8, MTK_PMIC_HOMEKEY_RST),
79 .pmic_rst_reg = MT6323_TOP_RST_MISC,
80 .rst_lprst_mask = MTK_PMIC_RST_DU_MASK,
81};
82
83static const struct mtk_pmic_regs mt6331_regs = {
84 .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
85 MTK_PMIC_KEYS_REGS(MT6331_TOPSTATUS, 0x2,
86 MT6331_INT_MISC_CON, 0x4,
87 MTK_PMIC_MT6331_PWRKEY_RST),
88 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
89 MTK_PMIC_KEYS_REGS(MT6331_TOPSTATUS, 0x4,
90 MT6331_INT_MISC_CON, 0x2,
91 MTK_PMIC_MT6331_HOMEKEY_RST),
92 .pmic_rst_reg = MT6331_TOP_RST_MISC,
93 .rst_lprst_mask = MTK_PMIC_MT6331_RST_DU_MASK,
94};
95
96static const struct mtk_pmic_regs mt6357_regs = {
97 .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
98 MTK_PMIC_KEYS_REGS(MT6357_TOPSTATUS,
99 0x2, MT6357_PSC_TOP_INT_CON0, 0x5,
100 MTK_PMIC_PWRKEY_RST),
101 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
102 MTK_PMIC_KEYS_REGS(MT6357_TOPSTATUS,
103 0x8, MT6357_PSC_TOP_INT_CON0, 0xa,
104 MTK_PMIC_HOMEKEY_INDEX),
105 .pmic_rst_reg = MT6357_TOP_RST_MISC,
106 .rst_lprst_mask = MTK_PMIC_RST_DU_MASK,
107};
108
109static const struct mtk_pmic_regs mt6358_regs = {
110 .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
111 MTK_PMIC_KEYS_REGS(MT6358_TOPSTATUS,
112 0x2, MT6358_PSC_TOP_INT_CON0, 0x5,
113 MTK_PMIC_PWRKEY_RST),
114 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
115 MTK_PMIC_KEYS_REGS(MT6358_TOPSTATUS,
116 0x8, MT6358_PSC_TOP_INT_CON0, 0xa,
117 MTK_PMIC_HOMEKEY_RST),
118 .pmic_rst_reg = MT6358_TOP_RST_MISC,
119 .rst_lprst_mask = MTK_PMIC_RST_DU_MASK,
120 .key_release_irq = true,
121};
122
123static const struct mtk_pmic_regs mt6359_regs = {
124 .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
125 MTK_PMIC_KEYS_REGS(MT6359_TOPSTATUS,
126 0x2, MT6359_PSC_TOP_INT_CON0, 0x5,
127 MTK_PMIC_PWRKEY_RST),
128 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
129 MTK_PMIC_KEYS_REGS(MT6359_TOPSTATUS,
130 0x8, MT6359_PSC_TOP_INT_CON0, 0xa,
131 MTK_PMIC_HOMEKEY_RST),
132 .pmic_rst_reg = MT6359_TOP_RST_MISC,
133 .rst_lprst_mask = MTK_PMIC_RST_DU_MASK,
134 .key_release_irq = true,
135};
136
137struct mtk_pmic_keys_info {
138 struct mtk_pmic_keys *keys;
139 const struct mtk_pmic_keys_regs *regs;
140 unsigned int keycode;
141 int irq;
142 int irq_r; /* optional: release irq if different */
143 bool wakeup:1;
144};
145
146struct mtk_pmic_keys {
147 struct input_dev *input_dev;
148 struct device *dev;
149 struct regmap *regmap;
150 struct mtk_pmic_keys_info keys[MTK_PMIC_MAX_KEY_COUNT];
151};
152
153enum mtk_pmic_keys_lp_mode {
154 LP_DISABLE,
155 LP_ONEKEY,
156 LP_TWOKEY,
157};
158
159static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys,
160 const struct mtk_pmic_regs *regs)
161{
162 const struct mtk_pmic_keys_regs *kregs_home, *kregs_pwr;
163 u32 long_press_mode, long_press_debounce;
164 u32 value, mask;
165 int error;
166
167 kregs_home = &regs->keys_regs[MTK_PMIC_HOMEKEY_INDEX];
168 kregs_pwr = &regs->keys_regs[MTK_PMIC_PWRKEY_INDEX];
169
170 error = of_property_read_u32(np: keys->dev->of_node, propname: "power-off-time-sec",
171 out_value: &long_press_debounce);
172 if (error)
173 long_press_debounce = 0;
174
175 mask = regs->rst_lprst_mask;
176 value = long_press_debounce << (ffs(regs->rst_lprst_mask) - 1);
177
178 error = of_property_read_u32(np: keys->dev->of_node,
179 propname: "mediatek,long-press-mode",
180 out_value: &long_press_mode);
181 if (error)
182 long_press_mode = LP_DISABLE;
183
184 switch (long_press_mode) {
185 case LP_TWOKEY:
186 value |= kregs_home->rst_en_mask;
187 fallthrough;
188
189 case LP_ONEKEY:
190 value |= kregs_pwr->rst_en_mask;
191 fallthrough;
192
193 case LP_DISABLE:
194 mask |= kregs_home->rst_en_mask;
195 mask |= kregs_pwr->rst_en_mask;
196 break;
197
198 default:
199 break;
200 }
201
202 regmap_update_bits(map: keys->regmap, reg: regs->pmic_rst_reg, mask, val: value);
203}
204
205static irqreturn_t mtk_pmic_keys_irq_handler_thread(int irq, void *data)
206{
207 struct mtk_pmic_keys_info *info = data;
208 u32 key_deb, pressed;
209
210 regmap_read(map: info->keys->regmap, reg: info->regs->deb_reg, val: &key_deb);
211
212 key_deb &= info->regs->deb_mask;
213
214 pressed = !key_deb;
215
216 input_report_key(dev: info->keys->input_dev, code: info->keycode, value: pressed);
217 input_sync(dev: info->keys->input_dev);
218
219 dev_dbg(info->keys->dev, "(%s) key =%d using PMIC\n",
220 pressed ? "pressed" : "released", info->keycode);
221
222 return IRQ_HANDLED;
223}
224
225static int mtk_pmic_key_setup(struct mtk_pmic_keys *keys,
226 struct mtk_pmic_keys_info *info)
227{
228 int ret;
229
230 info->keys = keys;
231
232 ret = regmap_update_bits(map: keys->regmap, reg: info->regs->intsel_reg,
233 mask: info->regs->intsel_mask,
234 val: info->regs->intsel_mask);
235 if (ret < 0)
236 return ret;
237
238 ret = devm_request_threaded_irq(dev: keys->dev, irq: info->irq, NULL,
239 thread_fn: mtk_pmic_keys_irq_handler_thread,
240 IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
241 devname: "mtk-pmic-keys", dev_id: info);
242 if (ret) {
243 dev_err(keys->dev, "Failed to request IRQ: %d: %d\n",
244 info->irq, ret);
245 return ret;
246 }
247
248 if (info->irq_r > 0) {
249 ret = devm_request_threaded_irq(dev: keys->dev, irq: info->irq_r, NULL,
250 thread_fn: mtk_pmic_keys_irq_handler_thread,
251 IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
252 devname: "mtk-pmic-keys", dev_id: info);
253 if (ret) {
254 dev_err(keys->dev, "Failed to request IRQ_r: %d: %d\n",
255 info->irq, ret);
256 return ret;
257 }
258 }
259
260 input_set_capability(dev: keys->input_dev, EV_KEY, code: info->keycode);
261
262 return 0;
263}
264
265static int mtk_pmic_keys_suspend(struct device *dev)
266{
267 struct mtk_pmic_keys *keys = dev_get_drvdata(dev);
268 int index;
269
270 for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) {
271 if (keys->keys[index].wakeup) {
272 enable_irq_wake(irq: keys->keys[index].irq);
273 if (keys->keys[index].irq_r > 0)
274 enable_irq_wake(irq: keys->keys[index].irq_r);
275 }
276 }
277
278 return 0;
279}
280
281static int mtk_pmic_keys_resume(struct device *dev)
282{
283 struct mtk_pmic_keys *keys = dev_get_drvdata(dev);
284 int index;
285
286 for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) {
287 if (keys->keys[index].wakeup) {
288 disable_irq_wake(irq: keys->keys[index].irq);
289 if (keys->keys[index].irq_r > 0)
290 disable_irq_wake(irq: keys->keys[index].irq_r);
291 }
292 }
293
294 return 0;
295}
296
297static DEFINE_SIMPLE_DEV_PM_OPS(mtk_pmic_keys_pm_ops, mtk_pmic_keys_suspend,
298 mtk_pmic_keys_resume);
299
300static const struct of_device_id of_mtk_pmic_keys_match_tbl[] = {
301 {
302 .compatible = "mediatek,mt6397-keys",
303 .data = &mt6397_regs,
304 }, {
305 .compatible = "mediatek,mt6323-keys",
306 .data = &mt6323_regs,
307 }, {
308 .compatible = "mediatek,mt6331-keys",
309 .data = &mt6331_regs,
310 }, {
311 .compatible = "mediatek,mt6357-keys",
312 .data = &mt6357_regs,
313 }, {
314 .compatible = "mediatek,mt6358-keys",
315 .data = &mt6358_regs,
316 }, {
317 .compatible = "mediatek,mt6359-keys",
318 .data = &mt6359_regs,
319 }, {
320 /* sentinel */
321 }
322};
323MODULE_DEVICE_TABLE(of, of_mtk_pmic_keys_match_tbl);
324
325static int mtk_pmic_keys_probe(struct platform_device *pdev)
326{
327 int error, index = 0;
328 unsigned int keycount;
329 struct mt6397_chip *pmic_chip = dev_get_drvdata(dev: pdev->dev.parent);
330 struct device_node *node = pdev->dev.of_node;
331 static const char *const irqnames[] = { "powerkey", "homekey" };
332 static const char *const irqnames_r[] = { "powerkey_r", "homekey_r" };
333 struct mtk_pmic_keys *keys;
334 const struct mtk_pmic_regs *mtk_pmic_regs;
335 struct input_dev *input_dev;
336 const struct of_device_id *of_id =
337 of_match_device(matches: of_mtk_pmic_keys_match_tbl, dev: &pdev->dev);
338
339 keys = devm_kzalloc(dev: &pdev->dev, size: sizeof(*keys), GFP_KERNEL);
340 if (!keys)
341 return -ENOMEM;
342
343 keys->dev = &pdev->dev;
344 keys->regmap = pmic_chip->regmap;
345 mtk_pmic_regs = of_id->data;
346
347 keys->input_dev = input_dev = devm_input_allocate_device(keys->dev);
348 if (!input_dev) {
349 dev_err(keys->dev, "input allocate device fail.\n");
350 return -ENOMEM;
351 }
352
353 input_dev->name = "mtk-pmic-keys";
354 input_dev->id.bustype = BUS_HOST;
355 input_dev->id.vendor = 0x0001;
356 input_dev->id.product = 0x0001;
357 input_dev->id.version = 0x0001;
358
359 keycount = of_get_available_child_count(np: node);
360 if (keycount > MTK_PMIC_MAX_KEY_COUNT ||
361 keycount > ARRAY_SIZE(irqnames)) {
362 dev_err(keys->dev, "too many keys defined (%d)\n", keycount);
363 return -EINVAL;
364 }
365
366 for_each_child_of_node_scoped(node, child) {
367 keys->keys[index].regs = &mtk_pmic_regs->keys_regs[index];
368
369 keys->keys[index].irq =
370 platform_get_irq_byname(pdev, irqnames[index]);
371 if (keys->keys[index].irq < 0)
372 return keys->keys[index].irq;
373
374 if (mtk_pmic_regs->key_release_irq) {
375 keys->keys[index].irq_r = platform_get_irq_byname(pdev,
376 irqnames_r[index]);
377
378 if (keys->keys[index].irq_r < 0)
379 return keys->keys[index].irq_r;
380 }
381
382 error = of_property_read_u32(np: child,
383 propname: "linux,keycodes", out_value: &keys->keys[index].keycode);
384 if (error) {
385 dev_err(keys->dev,
386 "failed to read key:%d linux,keycode property: %d\n",
387 index, error);
388 return error;
389 }
390
391 if (of_property_read_bool(np: child, propname: "wakeup-source"))
392 keys->keys[index].wakeup = true;
393
394 error = mtk_pmic_key_setup(keys, info: &keys->keys[index]);
395 if (error)
396 return error;
397
398 index++;
399 }
400
401 error = input_register_device(input_dev);
402 if (error) {
403 dev_err(&pdev->dev,
404 "register input device failed (%d)\n", error);
405 return error;
406 }
407
408 mtk_pmic_keys_lp_reset_setup(keys, regs: mtk_pmic_regs);
409
410 platform_set_drvdata(pdev, data: keys);
411
412 return 0;
413}
414
415static struct platform_driver pmic_keys_pdrv = {
416 .probe = mtk_pmic_keys_probe,
417 .driver = {
418 .name = "mtk-pmic-keys",
419 .of_match_table = of_mtk_pmic_keys_match_tbl,
420 .pm = pm_sleep_ptr(&mtk_pmic_keys_pm_ops),
421 },
422};
423
424module_platform_driver(pmic_keys_pdrv);
425
426MODULE_LICENSE("GPL v2");
427MODULE_AUTHOR("Chen Zhong <chen.zhong@mediatek.com>");
428MODULE_DESCRIPTION("MTK pmic-keys driver v0.1");
429

source code of linux/drivers/input/keyboard/mtk-pmic-keys.c