1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Keyboard class input driver for the NVIDIA Tegra SoC internal matrix
4 * keyboard controller
5 *
6 * Copyright (c) 2009-2011, NVIDIA Corporation.
7 */
8
9#include <linux/kernel.h>
10#include <linux/module.h>
11#include <linux/input.h>
12#include <linux/platform_device.h>
13#include <linux/delay.h>
14#include <linux/io.h>
15#include <linux/interrupt.h>
16#include <linux/of.h>
17#include <linux/property.h>
18#include <linux/clk.h>
19#include <linux/slab.h>
20#include <linux/input/matrix_keypad.h>
21#include <linux/reset.h>
22#include <linux/err.h>
23
24#define KBC_MAX_KPENT 8
25
26/* Maximum row/column supported by Tegra KBC yet is 16x8 */
27#define KBC_MAX_GPIO 24
28/* Maximum keys supported by Tegra KBC yet is 16 x 8*/
29#define KBC_MAX_KEY (16 * 8)
30
31#define KBC_MAX_DEBOUNCE_CNT 0x3ffu
32
33/* KBC row scan time and delay for beginning the row scan. */
34#define KBC_ROW_SCAN_TIME 16
35#define KBC_ROW_SCAN_DLY 5
36
37/* KBC uses a 32KHz clock so a cycle = 1/32Khz */
38#define KBC_CYCLE_MS 32
39
40/* KBC Registers */
41
42/* KBC Control Register */
43#define KBC_CONTROL_0 0x0
44#define KBC_FIFO_TH_CNT_SHIFT(cnt) (cnt << 14)
45#define KBC_DEBOUNCE_CNT_SHIFT(cnt) (cnt << 4)
46#define KBC_CONTROL_FIFO_CNT_INT_EN (1 << 3)
47#define KBC_CONTROL_KEYPRESS_INT_EN (1 << 1)
48#define KBC_CONTROL_KBC_EN (1 << 0)
49
50/* KBC Interrupt Register */
51#define KBC_INT_0 0x4
52#define KBC_INT_FIFO_CNT_INT_STATUS (1 << 2)
53#define KBC_INT_KEYPRESS_INT_STATUS (1 << 0)
54
55#define KBC_ROW_CFG0_0 0x8
56#define KBC_COL_CFG0_0 0x18
57#define KBC_TO_CNT_0 0x24
58#define KBC_INIT_DLY_0 0x28
59#define KBC_RPT_DLY_0 0x2c
60#define KBC_KP_ENT0_0 0x30
61#define KBC_KP_ENT1_0 0x34
62#define KBC_ROW0_MASK_0 0x38
63
64#define KBC_ROW_SHIFT 3
65
66enum tegra_pin_type {
67 PIN_CFG_IGNORE,
68 PIN_CFG_COL,
69 PIN_CFG_ROW,
70};
71
72/* Tegra KBC hw support */
73struct tegra_kbc_hw_support {
74 int max_rows;
75 int max_columns;
76};
77
78struct tegra_kbc_pin_cfg {
79 enum tegra_pin_type type;
80 unsigned char num;
81};
82
83struct tegra_kbc {
84 struct device *dev;
85 unsigned int debounce_cnt;
86 unsigned int repeat_cnt;
87 struct tegra_kbc_pin_cfg pin_cfg[KBC_MAX_GPIO];
88 const struct matrix_keymap_data *keymap_data;
89 bool wakeup;
90 void __iomem *mmio;
91 struct input_dev *idev;
92 int irq;
93 spinlock_t lock;
94 unsigned int repoll_dly;
95 unsigned long cp_dly_jiffies;
96 unsigned int cp_to_wkup_dly;
97 bool use_fn_map;
98 bool use_ghost_filter;
99 bool keypress_caused_wake;
100 unsigned short keycode[KBC_MAX_KEY * 2];
101 unsigned short current_keys[KBC_MAX_KPENT];
102 unsigned int num_pressed_keys;
103 u32 wakeup_key;
104 struct timer_list timer;
105 struct clk *clk;
106 struct reset_control *rst;
107 const struct tegra_kbc_hw_support *hw_support;
108 int max_keys;
109 int num_rows_and_columns;
110};
111
112static void tegra_kbc_report_released_keys(struct input_dev *input,
113 unsigned short old_keycodes[],
114 unsigned int old_num_keys,
115 unsigned short new_keycodes[],
116 unsigned int new_num_keys)
117{
118 unsigned int i, j;
119
120 for (i = 0; i < old_num_keys; i++) {
121 for (j = 0; j < new_num_keys; j++)
122 if (old_keycodes[i] == new_keycodes[j])
123 break;
124
125 if (j == new_num_keys)
126 input_report_key(dev: input, code: old_keycodes[i], value: 0);
127 }
128}
129
130static void tegra_kbc_report_pressed_keys(struct input_dev *input,
131 unsigned char scancodes[],
132 unsigned short keycodes[],
133 unsigned int num_pressed_keys)
134{
135 unsigned int i;
136
137 for (i = 0; i < num_pressed_keys; i++) {
138 input_event(dev: input, EV_MSC, MSC_SCAN, value: scancodes[i]);
139 input_report_key(dev: input, code: keycodes[i], value: 1);
140 }
141}
142
143static void tegra_kbc_report_keys(struct tegra_kbc *kbc)
144{
145 unsigned char scancodes[KBC_MAX_KPENT];
146 unsigned short keycodes[KBC_MAX_KPENT];
147 u32 val = 0;
148 unsigned int i;
149 unsigned int num_down = 0;
150 bool fn_keypress = false;
151 bool key_in_same_row = false;
152 bool key_in_same_col = false;
153
154 for (i = 0; i < KBC_MAX_KPENT; i++) {
155 if ((i % 4) == 0)
156 val = readl(addr: kbc->mmio + KBC_KP_ENT0_0 + i);
157
158 if (val & 0x80) {
159 unsigned int col = val & 0x07;
160 unsigned int row = (val >> 3) & 0x0f;
161 unsigned char scancode =
162 MATRIX_SCAN_CODE(row, col, KBC_ROW_SHIFT);
163
164 scancodes[num_down] = scancode;
165 keycodes[num_down] = kbc->keycode[scancode];
166 /* If driver uses Fn map, do not report the Fn key. */
167 if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map)
168 fn_keypress = true;
169 else
170 num_down++;
171 }
172
173 val >>= 8;
174 }
175
176 /*
177 * Matrix keyboard designs are prone to keyboard ghosting.
178 * Ghosting occurs if there are 3 keys such that -
179 * any 2 of the 3 keys share a row, and any 2 of them share a column.
180 * If so ignore the key presses for this iteration.
181 */
182 if (kbc->use_ghost_filter && num_down >= 3) {
183 for (i = 0; i < num_down; i++) {
184 unsigned int j;
185 u8 curr_col = scancodes[i] & 0x07;
186 u8 curr_row = scancodes[i] >> KBC_ROW_SHIFT;
187
188 /*
189 * Find 2 keys such that one key is in the same row
190 * and the other is in the same column as the i-th key.
191 */
192 for (j = i + 1; j < num_down; j++) {
193 u8 col = scancodes[j] & 0x07;
194 u8 row = scancodes[j] >> KBC_ROW_SHIFT;
195
196 if (col == curr_col)
197 key_in_same_col = true;
198 if (row == curr_row)
199 key_in_same_row = true;
200 }
201 }
202 }
203
204 /*
205 * If the platform uses Fn keymaps, translate keys on a Fn keypress.
206 * Function keycodes are max_keys apart from the plain keycodes.
207 */
208 if (fn_keypress) {
209 for (i = 0; i < num_down; i++) {
210 scancodes[i] += kbc->max_keys;
211 keycodes[i] = kbc->keycode[scancodes[i]];
212 }
213 }
214
215 /* Ignore the key presses for this iteration? */
216 if (key_in_same_col && key_in_same_row)
217 return;
218
219 tegra_kbc_report_released_keys(input: kbc->idev,
220 old_keycodes: kbc->current_keys, old_num_keys: kbc->num_pressed_keys,
221 new_keycodes: keycodes, new_num_keys: num_down);
222 tegra_kbc_report_pressed_keys(input: kbc->idev, scancodes, keycodes, num_pressed_keys: num_down);
223 input_sync(dev: kbc->idev);
224
225 memcpy(kbc->current_keys, keycodes, sizeof(kbc->current_keys));
226 kbc->num_pressed_keys = num_down;
227}
228
229static void tegra_kbc_set_fifo_interrupt(struct tegra_kbc *kbc, bool enable)
230{
231 u32 val;
232
233 val = readl(addr: kbc->mmio + KBC_CONTROL_0);
234 if (enable)
235 val |= KBC_CONTROL_FIFO_CNT_INT_EN;
236 else
237 val &= ~KBC_CONTROL_FIFO_CNT_INT_EN;
238 writel(val, addr: kbc->mmio + KBC_CONTROL_0);
239}
240
241static void tegra_kbc_keypress_timer(struct timer_list *t)
242{
243 struct tegra_kbc *kbc = timer_container_of(kbc, t, timer);
244 u32 val;
245 unsigned int i;
246
247 guard(spinlock_irqsave)(l: &kbc->lock);
248
249 val = (readl(addr: kbc->mmio + KBC_INT_0) >> 4) & 0xf;
250 if (val) {
251 unsigned long dly;
252
253 tegra_kbc_report_keys(kbc);
254
255 /*
256 * If more than one keys are pressed we need not wait
257 * for the repoll delay.
258 */
259 dly = (val == 1) ? kbc->repoll_dly : 1;
260 mod_timer(timer: &kbc->timer, expires: jiffies + msecs_to_jiffies(m: dly));
261 } else {
262 /* Release any pressed keys and exit the polling loop */
263 for (i = 0; i < kbc->num_pressed_keys; i++)
264 input_report_key(dev: kbc->idev, code: kbc->current_keys[i], value: 0);
265 input_sync(dev: kbc->idev);
266
267 kbc->num_pressed_keys = 0;
268
269 /* All keys are released so enable the keypress interrupt */
270 tegra_kbc_set_fifo_interrupt(kbc, enable: true);
271 }
272}
273
274static irqreturn_t tegra_kbc_isr(int irq, void *args)
275{
276 struct tegra_kbc *kbc = args;
277 u32 val;
278
279 guard(spinlock_irqsave)(l: &kbc->lock);
280
281 /*
282 * Quickly bail out & reenable interrupts if the fifo threshold
283 * count interrupt wasn't the interrupt source
284 */
285 val = readl(addr: kbc->mmio + KBC_INT_0);
286 writel(val, addr: kbc->mmio + KBC_INT_0);
287
288 if (val & KBC_INT_FIFO_CNT_INT_STATUS) {
289 /*
290 * Until all keys are released, defer further processing to
291 * the polling loop in tegra_kbc_keypress_timer.
292 */
293 tegra_kbc_set_fifo_interrupt(kbc, enable: false);
294 mod_timer(timer: &kbc->timer, expires: jiffies + kbc->cp_dly_jiffies);
295 } else if (val & KBC_INT_KEYPRESS_INT_STATUS) {
296 /* We can be here only through system resume path */
297 kbc->keypress_caused_wake = true;
298 }
299
300 return IRQ_HANDLED;
301}
302
303static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter)
304{
305 int i;
306 unsigned int rst_val;
307
308 /* Either mask all keys or none. */
309 rst_val = (filter && !kbc->wakeup) ? ~0 : 0;
310
311 for (i = 0; i < kbc->hw_support->max_rows; i++)
312 writel(val: rst_val, addr: kbc->mmio + KBC_ROW0_MASK_0 + i * 4);
313}
314
315static void tegra_kbc_config_pins(struct tegra_kbc *kbc)
316{
317 int i;
318
319 for (i = 0; i < KBC_MAX_GPIO; i++) {
320 u32 r_shft = 5 * (i % 6);
321 u32 c_shft = 4 * (i % 8);
322 u32 r_mask = 0x1f << r_shft;
323 u32 c_mask = 0x0f << c_shft;
324 u32 r_offs = (i / 6) * 4 + KBC_ROW_CFG0_0;
325 u32 c_offs = (i / 8) * 4 + KBC_COL_CFG0_0;
326 u32 row_cfg = readl(addr: kbc->mmio + r_offs);
327 u32 col_cfg = readl(addr: kbc->mmio + c_offs);
328
329 row_cfg &= ~r_mask;
330 col_cfg &= ~c_mask;
331
332 switch (kbc->pin_cfg[i].type) {
333 case PIN_CFG_ROW:
334 row_cfg |= ((kbc->pin_cfg[i].num << 1) | 1) << r_shft;
335 break;
336
337 case PIN_CFG_COL:
338 col_cfg |= ((kbc->pin_cfg[i].num << 1) | 1) << c_shft;
339 break;
340
341 case PIN_CFG_IGNORE:
342 break;
343 }
344
345 writel(val: row_cfg, addr: kbc->mmio + r_offs);
346 writel(val: col_cfg, addr: kbc->mmio + c_offs);
347 }
348}
349
350static int tegra_kbc_start(struct tegra_kbc *kbc)
351{
352 unsigned int debounce_cnt;
353 u32 val = 0;
354 int ret;
355
356 ret = clk_prepare_enable(clk: kbc->clk);
357 if (ret)
358 return ret;
359
360 /* Reset the KBC controller to clear all previous status.*/
361 reset_control_assert(rstc: kbc->rst);
362 udelay(usec: 100);
363 reset_control_deassert(rstc: kbc->rst);
364 udelay(usec: 100);
365
366 tegra_kbc_config_pins(kbc);
367 tegra_kbc_setup_wakekeys(kbc, filter: false);
368
369 writel(val: kbc->repeat_cnt, addr: kbc->mmio + KBC_RPT_DLY_0);
370
371 /* Keyboard debounce count is maximum of 12 bits. */
372 debounce_cnt = min(kbc->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
373 val = KBC_DEBOUNCE_CNT_SHIFT(debounce_cnt);
374 val |= KBC_FIFO_TH_CNT_SHIFT(1); /* set fifo interrupt threshold to 1 */
375 val |= KBC_CONTROL_FIFO_CNT_INT_EN; /* interrupt on FIFO threshold */
376 val |= KBC_CONTROL_KBC_EN; /* enable */
377 writel(val, addr: kbc->mmio + KBC_CONTROL_0);
378
379 /*
380 * Compute the delay(ns) from interrupt mode to continuous polling
381 * mode so the timer routine is scheduled appropriately.
382 */
383 val = readl(addr: kbc->mmio + KBC_INIT_DLY_0);
384 kbc->cp_dly_jiffies = usecs_to_jiffies(u: (val & 0xfffff) * 32);
385
386 kbc->num_pressed_keys = 0;
387
388 /*
389 * Atomically clear out any remaining entries in the key FIFO
390 * and enable keyboard interrupts.
391 */
392 while (1) {
393 val = readl(addr: kbc->mmio + KBC_INT_0);
394 val >>= 4;
395 if (!val)
396 break;
397
398 val = readl(addr: kbc->mmio + KBC_KP_ENT0_0);
399 val = readl(addr: kbc->mmio + KBC_KP_ENT1_0);
400 }
401 writel(val: 0x7, addr: kbc->mmio + KBC_INT_0);
402
403 enable_irq(irq: kbc->irq);
404
405 return 0;
406}
407
408static void tegra_kbc_stop(struct tegra_kbc *kbc)
409{
410 u32 val;
411
412 scoped_guard(spinlock_irqsave, &kbc->lock) {
413 val = readl(addr: kbc->mmio + KBC_CONTROL_0);
414 val &= ~1;
415 writel(val, addr: kbc->mmio + KBC_CONTROL_0);
416 }
417
418 disable_irq(irq: kbc->irq);
419 timer_delete_sync(timer: &kbc->timer);
420
421 clk_disable_unprepare(clk: kbc->clk);
422}
423
424static int tegra_kbc_open(struct input_dev *dev)
425{
426 struct tegra_kbc *kbc = input_get_drvdata(dev);
427
428 return tegra_kbc_start(kbc);
429}
430
431static void tegra_kbc_close(struct input_dev *dev)
432{
433 struct tegra_kbc *kbc = input_get_drvdata(dev);
434
435 return tegra_kbc_stop(kbc);
436}
437
438static bool tegra_kbc_check_pin_cfg(const struct tegra_kbc *kbc,
439 unsigned int *num_rows)
440{
441 int i;
442
443 *num_rows = 0;
444
445 for (i = 0; i < KBC_MAX_GPIO; i++) {
446 const struct tegra_kbc_pin_cfg *pin_cfg = &kbc->pin_cfg[i];
447
448 switch (pin_cfg->type) {
449 case PIN_CFG_ROW:
450 if (pin_cfg->num >= kbc->hw_support->max_rows) {
451 dev_err(kbc->dev,
452 "pin_cfg[%d]: invalid row number %d\n",
453 i, pin_cfg->num);
454 return false;
455 }
456 (*num_rows)++;
457 break;
458
459 case PIN_CFG_COL:
460 if (pin_cfg->num >= kbc->hw_support->max_columns) {
461 dev_err(kbc->dev,
462 "pin_cfg[%d]: invalid column number %d\n",
463 i, pin_cfg->num);
464 return false;
465 }
466 break;
467
468 case PIN_CFG_IGNORE:
469 break;
470
471 default:
472 dev_err(kbc->dev,
473 "pin_cfg[%d]: invalid entry type %d\n",
474 pin_cfg->type, pin_cfg->num);
475 return false;
476 }
477 }
478
479 return true;
480}
481
482static int tegra_kbc_parse_dt(struct tegra_kbc *kbc)
483{
484 struct device_node *np = kbc->dev->of_node;
485 u32 prop;
486 int i;
487 int num_rows;
488 int num_cols;
489 u32 cols_cfg[KBC_MAX_GPIO];
490 u32 rows_cfg[KBC_MAX_GPIO];
491
492 if (!of_property_read_u32(np, propname: "nvidia,debounce-delay-ms", out_value: &prop))
493 kbc->debounce_cnt = prop;
494
495 if (!of_property_read_u32(np, propname: "nvidia,repeat-delay-ms", out_value: &prop))
496 kbc->repeat_cnt = prop;
497
498 kbc->use_ghost_filter = of_property_present(np, propname: "nvidia,needs-ghost-filter");
499
500 if (of_property_read_bool(np, propname: "wakeup-source") ||
501 of_property_read_bool(np, propname: "nvidia,wakeup-source")) /* legacy */
502 kbc->wakeup = true;
503
504 if (!of_property_present(np, propname: "linux,keymap")) {
505 dev_err(kbc->dev, "property linux,keymap not found\n");
506 return -ENOENT;
507 }
508
509 /* Set all pins as non-configured */
510 for (i = 0; i < kbc->num_rows_and_columns; i++)
511 kbc->pin_cfg[i].type = PIN_CFG_IGNORE;
512
513 num_rows = of_property_read_variable_u32_array(np, propname: "nvidia,kbc-row-pins",
514 out_values: rows_cfg, sz_min: 1, KBC_MAX_GPIO);
515 if (num_rows < 0) {
516 dev_err(kbc->dev, "Rows configurations are not proper\n");
517 return num_rows;
518 } else if (num_rows > kbc->hw_support->max_rows) {
519 dev_err(kbc->dev,
520 "Number of rows is more than supported by hardware\n");
521 return -EINVAL;
522 }
523
524 for (i = 0; i < num_rows; i++) {
525 kbc->pin_cfg[rows_cfg[i]].type = PIN_CFG_ROW;
526 kbc->pin_cfg[rows_cfg[i]].num = i;
527 }
528
529 num_cols = of_property_read_variable_u32_array(np, propname: "nvidia,kbc-col-pins",
530 out_values: cols_cfg, sz_min: 1, KBC_MAX_GPIO);
531 if (num_cols < 0) {
532 dev_err(kbc->dev, "Cols configurations are not proper\n");
533 return num_cols;
534 } else if (num_cols > kbc->hw_support->max_columns) {
535 dev_err(kbc->dev,
536 "Number of cols is more than supported by hardware\n");
537 return -EINVAL;
538 }
539
540 for (i = 0; i < num_cols; i++) {
541 kbc->pin_cfg[cols_cfg[i]].type = PIN_CFG_COL;
542 kbc->pin_cfg[cols_cfg[i]].num = i;
543 }
544
545 if (!num_rows || !num_cols || ((num_rows + num_cols) > KBC_MAX_GPIO)) {
546 dev_err(kbc->dev,
547 "keypad rows/columns not properly specified\n");
548 return -EINVAL;
549 }
550
551 return 0;
552}
553
554static const struct tegra_kbc_hw_support tegra20_kbc_hw_support = {
555 .max_rows = 16,
556 .max_columns = 8,
557};
558
559static const struct tegra_kbc_hw_support tegra11_kbc_hw_support = {
560 .max_rows = 11,
561 .max_columns = 8,
562};
563
564static const struct of_device_id tegra_kbc_of_match[] = {
565 { .compatible = "nvidia,tegra114-kbc", .data = &tegra11_kbc_hw_support},
566 { .compatible = "nvidia,tegra30-kbc", .data = &tegra20_kbc_hw_support},
567 { .compatible = "nvidia,tegra20-kbc", .data = &tegra20_kbc_hw_support},
568 { },
569};
570MODULE_DEVICE_TABLE(of, tegra_kbc_of_match);
571
572static int tegra_kbc_probe(struct platform_device *pdev)
573{
574 struct tegra_kbc *kbc;
575 int err;
576 int num_rows = 0;
577 unsigned int debounce_cnt;
578 unsigned int scan_time_rows;
579 unsigned int keymap_rows;
580
581 kbc = devm_kzalloc(dev: &pdev->dev, size: sizeof(*kbc), GFP_KERNEL);
582 if (!kbc) {
583 dev_err(&pdev->dev, "failed to alloc memory for kbc\n");
584 return -ENOMEM;
585 }
586
587 kbc->dev = &pdev->dev;
588 kbc->hw_support = device_get_match_data(dev: &pdev->dev);
589 kbc->max_keys = kbc->hw_support->max_rows *
590 kbc->hw_support->max_columns;
591 kbc->num_rows_and_columns = kbc->hw_support->max_rows +
592 kbc->hw_support->max_columns;
593 keymap_rows = kbc->max_keys;
594 spin_lock_init(&kbc->lock);
595
596 err = tegra_kbc_parse_dt(kbc);
597 if (err)
598 return err;
599
600 if (!tegra_kbc_check_pin_cfg(kbc, num_rows: &num_rows))
601 return -EINVAL;
602
603 kbc->irq = platform_get_irq(pdev, 0);
604 if (kbc->irq < 0)
605 return -ENXIO;
606
607 kbc->idev = devm_input_allocate_device(&pdev->dev);
608 if (!kbc->idev) {
609 dev_err(&pdev->dev, "failed to allocate input device\n");
610 return -ENOMEM;
611 }
612
613 timer_setup(&kbc->timer, tegra_kbc_keypress_timer, 0);
614
615 kbc->mmio = devm_platform_ioremap_resource(pdev, index: 0);
616 if (IS_ERR(ptr: kbc->mmio))
617 return PTR_ERR(ptr: kbc->mmio);
618
619 kbc->clk = devm_clk_get(dev: &pdev->dev, NULL);
620 if (IS_ERR(ptr: kbc->clk)) {
621 dev_err(&pdev->dev, "failed to get keyboard clock\n");
622 return PTR_ERR(ptr: kbc->clk);
623 }
624
625 kbc->rst = devm_reset_control_get(dev: &pdev->dev, id: "kbc");
626 if (IS_ERR(ptr: kbc->rst)) {
627 dev_err(&pdev->dev, "failed to get keyboard reset\n");
628 return PTR_ERR(ptr: kbc->rst);
629 }
630
631 /*
632 * The time delay between two consecutive reads of the FIFO is
633 * the sum of the repeat time and the time taken for scanning
634 * the rows. There is an additional delay before the row scanning
635 * starts. The repoll delay is computed in milliseconds.
636 */
637 debounce_cnt = min(kbc->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
638 scan_time_rows = (KBC_ROW_SCAN_TIME + debounce_cnt) * num_rows;
639 kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + kbc->repeat_cnt;
640 kbc->repoll_dly = DIV_ROUND_UP(kbc->repoll_dly, KBC_CYCLE_MS);
641
642 kbc->idev->name = pdev->name;
643 kbc->idev->id.bustype = BUS_HOST;
644 kbc->idev->dev.parent = &pdev->dev;
645 kbc->idev->open = tegra_kbc_open;
646 kbc->idev->close = tegra_kbc_close;
647
648 if (kbc->keymap_data && kbc->use_fn_map)
649 keymap_rows *= 2;
650
651 err = matrix_keypad_build_keymap(keymap_data: kbc->keymap_data, NULL,
652 rows: keymap_rows,
653 cols: kbc->hw_support->max_columns,
654 keymap: kbc->keycode, input_dev: kbc->idev);
655 if (err) {
656 dev_err(&pdev->dev, "failed to setup keymap\n");
657 return err;
658 }
659
660 __set_bit(EV_REP, kbc->idev->evbit);
661 input_set_capability(dev: kbc->idev, EV_MSC, MSC_SCAN);
662
663 input_set_drvdata(dev: kbc->idev, data: kbc);
664
665 err = devm_request_irq(dev: &pdev->dev, irq: kbc->irq, handler: tegra_kbc_isr,
666 IRQF_TRIGGER_HIGH | IRQF_NO_AUTOEN,
667 devname: pdev->name, dev_id: kbc);
668 if (err) {
669 dev_err(&pdev->dev, "failed to request keyboard IRQ\n");
670 return err;
671 }
672
673 err = input_register_device(kbc->idev);
674 if (err) {
675 dev_err(&pdev->dev, "failed to register input device\n");
676 return err;
677 }
678
679 platform_set_drvdata(pdev, data: kbc);
680 device_init_wakeup(dev: &pdev->dev, enable: kbc->wakeup);
681
682 return 0;
683}
684
685static void tegra_kbc_set_keypress_interrupt(struct tegra_kbc *kbc, bool enable)
686{
687 u32 val;
688
689 val = readl(addr: kbc->mmio + KBC_CONTROL_0);
690 if (enable)
691 val |= KBC_CONTROL_KEYPRESS_INT_EN;
692 else
693 val &= ~KBC_CONTROL_KEYPRESS_INT_EN;
694 writel(val, addr: kbc->mmio + KBC_CONTROL_0);
695}
696
697static int tegra_kbc_suspend(struct device *dev)
698{
699 struct platform_device *pdev = to_platform_device(dev);
700 struct tegra_kbc *kbc = platform_get_drvdata(pdev);
701
702 guard(mutex)(T: &kbc->idev->mutex);
703
704 if (device_may_wakeup(dev: &pdev->dev)) {
705 disable_irq(irq: kbc->irq);
706 timer_delete_sync(timer: &kbc->timer);
707 tegra_kbc_set_fifo_interrupt(kbc, enable: false);
708
709 /* Forcefully clear the interrupt status */
710 writel(val: 0x7, addr: kbc->mmio + KBC_INT_0);
711 /*
712 * Store the previous resident time of continuous polling mode.
713 * Force the keyboard into interrupt mode.
714 */
715 kbc->cp_to_wkup_dly = readl(addr: kbc->mmio + KBC_TO_CNT_0);
716 writel(val: 0, addr: kbc->mmio + KBC_TO_CNT_0);
717
718 tegra_kbc_setup_wakekeys(kbc, filter: true);
719 msleep(msecs: 30);
720
721 kbc->keypress_caused_wake = false;
722 /* Enable keypress interrupt before going into suspend. */
723 tegra_kbc_set_keypress_interrupt(kbc, enable: true);
724 enable_irq(irq: kbc->irq);
725 enable_irq_wake(irq: kbc->irq);
726 } else if (input_device_enabled(dev: kbc->idev)) {
727 tegra_kbc_stop(kbc);
728 }
729
730 return 0;
731}
732
733static int tegra_kbc_resume(struct device *dev)
734{
735 struct platform_device *pdev = to_platform_device(dev);
736 struct tegra_kbc *kbc = platform_get_drvdata(pdev);
737 int err;
738
739 guard(mutex)(T: &kbc->idev->mutex);
740
741 if (device_may_wakeup(dev: &pdev->dev)) {
742 disable_irq_wake(irq: kbc->irq);
743 tegra_kbc_setup_wakekeys(kbc, filter: false);
744 /* We will use fifo interrupts for key detection. */
745 tegra_kbc_set_keypress_interrupt(kbc, enable: false);
746
747 /* Restore the resident time of continuous polling mode. */
748 writel(val: kbc->cp_to_wkup_dly, addr: kbc->mmio + KBC_TO_CNT_0);
749
750 tegra_kbc_set_fifo_interrupt(kbc, enable: true);
751
752 if (kbc->keypress_caused_wake && kbc->wakeup_key) {
753 /*
754 * We can't report events directly from the ISR
755 * because timekeeping is stopped when processing
756 * wakeup request and we get a nasty warning when
757 * we try to call do_gettimeofday() in evdev
758 * handler.
759 */
760 input_report_key(dev: kbc->idev, code: kbc->wakeup_key, value: 1);
761 input_sync(dev: kbc->idev);
762 input_report_key(dev: kbc->idev, code: kbc->wakeup_key, value: 0);
763 input_sync(dev: kbc->idev);
764 }
765 } else if (input_device_enabled(dev: kbc->idev)) {
766 err = tegra_kbc_start(kbc);
767 if (err)
768 return err;
769 }
770
771 return 0;
772}
773
774static DEFINE_SIMPLE_DEV_PM_OPS(tegra_kbc_pm_ops,
775 tegra_kbc_suspend, tegra_kbc_resume);
776
777static struct platform_driver tegra_kbc_driver = {
778 .probe = tegra_kbc_probe,
779 .driver = {
780 .name = "tegra-kbc",
781 .pm = pm_sleep_ptr(&tegra_kbc_pm_ops),
782 .of_match_table = tegra_kbc_of_match,
783 },
784};
785module_platform_driver(tegra_kbc_driver);
786
787MODULE_LICENSE("GPL");
788MODULE_AUTHOR("Rakesh Iyer <riyer@nvidia.com>");
789MODULE_DESCRIPTION("Tegra matrix keyboard controller driver");
790MODULE_ALIAS("platform:tegra-kbc");
791

source code of linux/drivers/input/keyboard/tegra-kbc.c