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| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
|---|---|
| 2 | #ifndef _I8042_SNIRM_H |
| 3 | #define _I8042_SNIRM_H |
| 4 | |
| 5 | #include <asm/sni.h> |
| 6 | |
| 7 | |
| 8 | /* |
| 9 | * Names. |
| 10 | */ |
| 11 | |
| 12 | #define I8042_KBD_PHYS_DESC "onboard/serio0" |
| 13 | #define I8042_AUX_PHYS_DESC "onboard/serio1" |
| 14 | #define I8042_MUX_PHYS_DESC "onboard/serio%d" |
| 15 | |
| 16 | /* |
| 17 | * IRQs. |
| 18 | */ |
| 19 | static int i8042_kbd_irq; |
| 20 | static int i8042_aux_irq; |
| 21 | #define I8042_KBD_IRQ i8042_kbd_irq |
| 22 | #define I8042_AUX_IRQ i8042_aux_irq |
| 23 | |
| 24 | static void __iomem *kbd_iobase; |
| 25 | |
| 26 | #define I8042_COMMAND_REG (kbd_iobase + 0x64UL) |
| 27 | #define I8042_DATA_REG (kbd_iobase + 0x60UL) |
| 28 | |
| 29 | static inline int i8042_read_data(void) |
| 30 | { |
| 31 | return readb(kbd_iobase + 0x60UL); |
| 32 | } |
| 33 | |
| 34 | static inline int i8042_read_status(void) |
| 35 | { |
| 36 | return readb(kbd_iobase + 0x64UL); |
| 37 | } |
| 38 | |
| 39 | static inline void i8042_write_data(int val) |
| 40 | { |
| 41 | writeb(val, kbd_iobase + 0x60UL); |
| 42 | } |
| 43 | |
| 44 | static inline void i8042_write_command(int val) |
| 45 | { |
| 46 | writeb(val, kbd_iobase + 0x64UL); |
| 47 | } |
| 48 | static inline int i8042_platform_init(void) |
| 49 | { |
| 50 | /* RM200 is strange ... */ |
| 51 | if (sni_brd_type == SNI_BRD_RM200) { |
| 52 | kbd_iobase = ioremap(0x16000000, 4); |
| 53 | i8042_kbd_irq = 33; |
| 54 | i8042_aux_irq = 44; |
| 55 | } else { |
| 56 | kbd_iobase = ioremap(0x14000000, 4); |
| 57 | i8042_kbd_irq = 1; |
| 58 | i8042_aux_irq = 12; |
| 59 | } |
| 60 | if (!kbd_iobase) |
| 61 | return -ENOMEM; |
| 62 | |
| 63 | return 0; |
| 64 | } |
| 65 | |
| 66 | static inline void i8042_platform_exit(void) |
| 67 | { |
| 68 | |
| 69 | } |
| 70 | |
| 71 | #endif /* _I8042_SNIRM_H */ |
| 72 |
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