1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* |
3 | * This file is automatically generated --- any changes will be lost. |
4 | */ |
5 | |
6 | #ifndef _SGE_DEFS_H |
7 | #define _SGE_DEFS_H |
8 | |
9 | #define S_EC_CREDITS 0 |
10 | #define M_EC_CREDITS 0x7FFF |
11 | #define V_EC_CREDITS(x) ((x) << S_EC_CREDITS) |
12 | #define G_EC_CREDITS(x) (((x) >> S_EC_CREDITS) & M_EC_CREDITS) |
13 | |
14 | #define S_EC_GTS 15 |
15 | #define V_EC_GTS(x) ((x) << S_EC_GTS) |
16 | #define F_EC_GTS V_EC_GTS(1U) |
17 | |
18 | #define S_EC_INDEX 16 |
19 | #define M_EC_INDEX 0xFFFF |
20 | #define V_EC_INDEX(x) ((x) << S_EC_INDEX) |
21 | #define G_EC_INDEX(x) (((x) >> S_EC_INDEX) & M_EC_INDEX) |
22 | |
23 | #define S_EC_SIZE 0 |
24 | #define M_EC_SIZE 0xFFFF |
25 | #define V_EC_SIZE(x) ((x) << S_EC_SIZE) |
26 | #define G_EC_SIZE(x) (((x) >> S_EC_SIZE) & M_EC_SIZE) |
27 | |
28 | #define S_EC_BASE_LO 16 |
29 | #define M_EC_BASE_LO 0xFFFF |
30 | #define V_EC_BASE_LO(x) ((x) << S_EC_BASE_LO) |
31 | #define G_EC_BASE_LO(x) (((x) >> S_EC_BASE_LO) & M_EC_BASE_LO) |
32 | |
33 | #define S_EC_BASE_HI 0 |
34 | #define M_EC_BASE_HI 0xF |
35 | #define V_EC_BASE_HI(x) ((x) << S_EC_BASE_HI) |
36 | #define G_EC_BASE_HI(x) (((x) >> S_EC_BASE_HI) & M_EC_BASE_HI) |
37 | |
38 | #define S_EC_RESPQ 4 |
39 | #define M_EC_RESPQ 0x7 |
40 | #define V_EC_RESPQ(x) ((x) << S_EC_RESPQ) |
41 | #define G_EC_RESPQ(x) (((x) >> S_EC_RESPQ) & M_EC_RESPQ) |
42 | |
43 | #define S_EC_TYPE 7 |
44 | #define M_EC_TYPE 0x7 |
45 | #define V_EC_TYPE(x) ((x) << S_EC_TYPE) |
46 | #define G_EC_TYPE(x) (((x) >> S_EC_TYPE) & M_EC_TYPE) |
47 | |
48 | #define S_EC_GEN 10 |
49 | #define V_EC_GEN(x) ((x) << S_EC_GEN) |
50 | #define F_EC_GEN V_EC_GEN(1U) |
51 | |
52 | #define S_EC_UP_TOKEN 11 |
53 | #define M_EC_UP_TOKEN 0xFFFFF |
54 | #define V_EC_UP_TOKEN(x) ((x) << S_EC_UP_TOKEN) |
55 | #define G_EC_UP_TOKEN(x) (((x) >> S_EC_UP_TOKEN) & M_EC_UP_TOKEN) |
56 | |
57 | #define S_EC_VALID 31 |
58 | #define V_EC_VALID(x) ((x) << S_EC_VALID) |
59 | #define F_EC_VALID V_EC_VALID(1U) |
60 | |
61 | #define S_RQ_MSI_VEC 20 |
62 | #define M_RQ_MSI_VEC 0x3F |
63 | #define V_RQ_MSI_VEC(x) ((x) << S_RQ_MSI_VEC) |
64 | #define G_RQ_MSI_VEC(x) (((x) >> S_RQ_MSI_VEC) & M_RQ_MSI_VEC) |
65 | |
66 | #define S_RQ_INTR_EN 26 |
67 | #define V_RQ_INTR_EN(x) ((x) << S_RQ_INTR_EN) |
68 | #define F_RQ_INTR_EN V_RQ_INTR_EN(1U) |
69 | |
70 | #define S_RQ_GEN 28 |
71 | #define V_RQ_GEN(x) ((x) << S_RQ_GEN) |
72 | #define F_RQ_GEN V_RQ_GEN(1U) |
73 | |
74 | #define S_CQ_INDEX 0 |
75 | #define M_CQ_INDEX 0xFFFF |
76 | #define V_CQ_INDEX(x) ((x) << S_CQ_INDEX) |
77 | #define G_CQ_INDEX(x) (((x) >> S_CQ_INDEX) & M_CQ_INDEX) |
78 | |
79 | #define S_CQ_SIZE 16 |
80 | #define M_CQ_SIZE 0xFFFF |
81 | #define V_CQ_SIZE(x) ((x) << S_CQ_SIZE) |
82 | #define G_CQ_SIZE(x) (((x) >> S_CQ_SIZE) & M_CQ_SIZE) |
83 | |
84 | #define S_CQ_BASE_HI 0 |
85 | #define M_CQ_BASE_HI 0xFFFFF |
86 | #define V_CQ_BASE_HI(x) ((x) << S_CQ_BASE_HI) |
87 | #define G_CQ_BASE_HI(x) (((x) >> S_CQ_BASE_HI) & M_CQ_BASE_HI) |
88 | |
89 | #define S_CQ_RSPQ 20 |
90 | #define M_CQ_RSPQ 0x3F |
91 | #define V_CQ_RSPQ(x) ((x) << S_CQ_RSPQ) |
92 | #define G_CQ_RSPQ(x) (((x) >> S_CQ_RSPQ) & M_CQ_RSPQ) |
93 | |
94 | #define S_CQ_ASYNC_NOTIF 26 |
95 | #define V_CQ_ASYNC_NOTIF(x) ((x) << S_CQ_ASYNC_NOTIF) |
96 | #define F_CQ_ASYNC_NOTIF V_CQ_ASYNC_NOTIF(1U) |
97 | |
98 | #define S_CQ_ARMED 27 |
99 | #define V_CQ_ARMED(x) ((x) << S_CQ_ARMED) |
100 | #define F_CQ_ARMED V_CQ_ARMED(1U) |
101 | |
102 | #define S_CQ_ASYNC_NOTIF_SOL 28 |
103 | #define V_CQ_ASYNC_NOTIF_SOL(x) ((x) << S_CQ_ASYNC_NOTIF_SOL) |
104 | #define F_CQ_ASYNC_NOTIF_SOL V_CQ_ASYNC_NOTIF_SOL(1U) |
105 | |
106 | #define S_CQ_GEN 29 |
107 | #define V_CQ_GEN(x) ((x) << S_CQ_GEN) |
108 | #define F_CQ_GEN V_CQ_GEN(1U) |
109 | |
110 | #define S_CQ_ERR 30 |
111 | #define V_CQ_ERR(x) ((x) << S_CQ_ERR) |
112 | #define F_CQ_ERR V_CQ_ERR(1U) |
113 | |
114 | #define S_CQ_OVERFLOW_MODE 31 |
115 | #define V_CQ_OVERFLOW_MODE(x) ((x) << S_CQ_OVERFLOW_MODE) |
116 | #define F_CQ_OVERFLOW_MODE V_CQ_OVERFLOW_MODE(1U) |
117 | |
118 | #define S_CQ_CREDITS 0 |
119 | #define M_CQ_CREDITS 0xFFFF |
120 | #define V_CQ_CREDITS(x) ((x) << S_CQ_CREDITS) |
121 | #define G_CQ_CREDITS(x) (((x) >> S_CQ_CREDITS) & M_CQ_CREDITS) |
122 | |
123 | #define S_CQ_CREDIT_THRES 16 |
124 | #define M_CQ_CREDIT_THRES 0x1FFF |
125 | #define V_CQ_CREDIT_THRES(x) ((x) << S_CQ_CREDIT_THRES) |
126 | #define G_CQ_CREDIT_THRES(x) (((x) >> S_CQ_CREDIT_THRES) & M_CQ_CREDIT_THRES) |
127 | |
128 | #define S_FL_BASE_HI 0 |
129 | #define M_FL_BASE_HI 0xFFFFF |
130 | #define V_FL_BASE_HI(x) ((x) << S_FL_BASE_HI) |
131 | #define G_FL_BASE_HI(x) (((x) >> S_FL_BASE_HI) & M_FL_BASE_HI) |
132 | |
133 | #define S_FL_INDEX_LO 20 |
134 | #define M_FL_INDEX_LO 0xFFF |
135 | #define V_FL_INDEX_LO(x) ((x) << S_FL_INDEX_LO) |
136 | #define G_FL_INDEX_LO(x) (((x) >> S_FL_INDEX_LO) & M_FL_INDEX_LO) |
137 | |
138 | #define S_FL_INDEX_HI 0 |
139 | #define M_FL_INDEX_HI 0xF |
140 | #define V_FL_INDEX_HI(x) ((x) << S_FL_INDEX_HI) |
141 | #define G_FL_INDEX_HI(x) (((x) >> S_FL_INDEX_HI) & M_FL_INDEX_HI) |
142 | |
143 | #define S_FL_SIZE 4 |
144 | #define M_FL_SIZE 0xFFFF |
145 | #define V_FL_SIZE(x) ((x) << S_FL_SIZE) |
146 | #define G_FL_SIZE(x) (((x) >> S_FL_SIZE) & M_FL_SIZE) |
147 | |
148 | #define S_FL_GEN 20 |
149 | #define V_FL_GEN(x) ((x) << S_FL_GEN) |
150 | #define F_FL_GEN V_FL_GEN(1U) |
151 | |
152 | #define S_FL_ENTRY_SIZE_LO 21 |
153 | #define M_FL_ENTRY_SIZE_LO 0x7FF |
154 | #define V_FL_ENTRY_SIZE_LO(x) ((x) << S_FL_ENTRY_SIZE_LO) |
155 | #define G_FL_ENTRY_SIZE_LO(x) (((x) >> S_FL_ENTRY_SIZE_LO) & M_FL_ENTRY_SIZE_LO) |
156 | |
157 | #define S_FL_ENTRY_SIZE_HI 0 |
158 | #define M_FL_ENTRY_SIZE_HI 0x1FFFFF |
159 | #define V_FL_ENTRY_SIZE_HI(x) ((x) << S_FL_ENTRY_SIZE_HI) |
160 | #define G_FL_ENTRY_SIZE_HI(x) (((x) >> S_FL_ENTRY_SIZE_HI) & M_FL_ENTRY_SIZE_HI) |
161 | |
162 | #define S_FL_CONG_THRES 21 |
163 | #define M_FL_CONG_THRES 0x3FF |
164 | #define V_FL_CONG_THRES(x) ((x) << S_FL_CONG_THRES) |
165 | #define G_FL_CONG_THRES(x) (((x) >> S_FL_CONG_THRES) & M_FL_CONG_THRES) |
166 | |
167 | #define S_FL_GTS 31 |
168 | #define V_FL_GTS(x) ((x) << S_FL_GTS) |
169 | #define F_FL_GTS V_FL_GTS(1U) |
170 | |
171 | #define S_FLD_GEN1 31 |
172 | #define V_FLD_GEN1(x) ((x) << S_FLD_GEN1) |
173 | #define F_FLD_GEN1 V_FLD_GEN1(1U) |
174 | |
175 | #define S_FLD_GEN2 0 |
176 | #define V_FLD_GEN2(x) ((x) << S_FLD_GEN2) |
177 | #define F_FLD_GEN2 V_FLD_GEN2(1U) |
178 | |
179 | #define S_RSPD_TXQ1_CR 0 |
180 | #define M_RSPD_TXQ1_CR 0x7F |
181 | #define V_RSPD_TXQ1_CR(x) ((x) << S_RSPD_TXQ1_CR) |
182 | #define G_RSPD_TXQ1_CR(x) (((x) >> S_RSPD_TXQ1_CR) & M_RSPD_TXQ1_CR) |
183 | |
184 | #define S_RSPD_TXQ1_GTS 7 |
185 | #define V_RSPD_TXQ1_GTS(x) ((x) << S_RSPD_TXQ1_GTS) |
186 | #define F_RSPD_TXQ1_GTS V_RSPD_TXQ1_GTS(1U) |
187 | |
188 | #define S_RSPD_TXQ2_CR 8 |
189 | #define M_RSPD_TXQ2_CR 0x7F |
190 | #define V_RSPD_TXQ2_CR(x) ((x) << S_RSPD_TXQ2_CR) |
191 | #define G_RSPD_TXQ2_CR(x) (((x) >> S_RSPD_TXQ2_CR) & M_RSPD_TXQ2_CR) |
192 | |
193 | #define S_RSPD_TXQ2_GTS 15 |
194 | #define V_RSPD_TXQ2_GTS(x) ((x) << S_RSPD_TXQ2_GTS) |
195 | #define F_RSPD_TXQ2_GTS V_RSPD_TXQ2_GTS(1U) |
196 | |
197 | #define S_RSPD_TXQ0_CR 16 |
198 | #define M_RSPD_TXQ0_CR 0x7F |
199 | #define V_RSPD_TXQ0_CR(x) ((x) << S_RSPD_TXQ0_CR) |
200 | #define G_RSPD_TXQ0_CR(x) (((x) >> S_RSPD_TXQ0_CR) & M_RSPD_TXQ0_CR) |
201 | |
202 | #define S_RSPD_TXQ0_GTS 23 |
203 | #define V_RSPD_TXQ0_GTS(x) ((x) << S_RSPD_TXQ0_GTS) |
204 | #define F_RSPD_TXQ0_GTS V_RSPD_TXQ0_GTS(1U) |
205 | |
206 | #define S_RSPD_EOP 24 |
207 | #define V_RSPD_EOP(x) ((x) << S_RSPD_EOP) |
208 | #define F_RSPD_EOP V_RSPD_EOP(1U) |
209 | |
210 | #define S_RSPD_SOP 25 |
211 | #define V_RSPD_SOP(x) ((x) << S_RSPD_SOP) |
212 | #define F_RSPD_SOP V_RSPD_SOP(1U) |
213 | |
214 | #define S_RSPD_ASYNC_NOTIF 26 |
215 | #define V_RSPD_ASYNC_NOTIF(x) ((x) << S_RSPD_ASYNC_NOTIF) |
216 | #define F_RSPD_ASYNC_NOTIF V_RSPD_ASYNC_NOTIF(1U) |
217 | |
218 | #define S_RSPD_FL0_GTS 27 |
219 | #define V_RSPD_FL0_GTS(x) ((x) << S_RSPD_FL0_GTS) |
220 | #define F_RSPD_FL0_GTS V_RSPD_FL0_GTS(1U) |
221 | |
222 | #define S_RSPD_FL1_GTS 28 |
223 | #define V_RSPD_FL1_GTS(x) ((x) << S_RSPD_FL1_GTS) |
224 | #define F_RSPD_FL1_GTS V_RSPD_FL1_GTS(1U) |
225 | |
226 | #define S_RSPD_IMM_DATA_VALID 29 |
227 | #define V_RSPD_IMM_DATA_VALID(x) ((x) << S_RSPD_IMM_DATA_VALID) |
228 | #define F_RSPD_IMM_DATA_VALID V_RSPD_IMM_DATA_VALID(1U) |
229 | |
230 | #define S_RSPD_OFFLOAD 30 |
231 | #define V_RSPD_OFFLOAD(x) ((x) << S_RSPD_OFFLOAD) |
232 | #define F_RSPD_OFFLOAD V_RSPD_OFFLOAD(1U) |
233 | |
234 | #define S_RSPD_GEN1 31 |
235 | #define V_RSPD_GEN1(x) ((x) << S_RSPD_GEN1) |
236 | #define F_RSPD_GEN1 V_RSPD_GEN1(1U) |
237 | |
238 | #define S_RSPD_LEN 0 |
239 | #define M_RSPD_LEN 0x7FFFFFFF |
240 | #define V_RSPD_LEN(x) ((x) << S_RSPD_LEN) |
241 | #define G_RSPD_LEN(x) (((x) >> S_RSPD_LEN) & M_RSPD_LEN) |
242 | |
243 | #define S_RSPD_FLQ 31 |
244 | #define V_RSPD_FLQ(x) ((x) << S_RSPD_FLQ) |
245 | #define F_RSPD_FLQ V_RSPD_FLQ(1U) |
246 | |
247 | #define S_RSPD_GEN2 0 |
248 | #define V_RSPD_GEN2(x) ((x) << S_RSPD_GEN2) |
249 | #define F_RSPD_GEN2 V_RSPD_GEN2(1U) |
250 | |
251 | #define S_RSPD_INR_VEC 1 |
252 | #define M_RSPD_INR_VEC 0x7F |
253 | #define V_RSPD_INR_VEC(x) ((x) << S_RSPD_INR_VEC) |
254 | #define G_RSPD_INR_VEC(x) (((x) >> S_RSPD_INR_VEC) & M_RSPD_INR_VEC) |
255 | |
256 | #endif /* _SGE_DEFS_H */ |
257 | |