1 | /* |
2 | * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet |
3 | * driver for Linux. |
4 | * |
5 | * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved. |
6 | * |
7 | * This software is available to you under a choice of one of two |
8 | * licenses. You may choose to be licensed under the terms of the GNU |
9 | * General Public License (GPL) Version 2, available from the file |
10 | * COPYING in the main directory of this source tree, or the |
11 | * OpenIB.org BSD license below: |
12 | * |
13 | * Redistribution and use in source and binary forms, with or |
14 | * without modification, are permitted provided that the following |
15 | * conditions are met: |
16 | * |
17 | * - Redistributions of source code must retain the above |
18 | * copyright notice, this list of conditions and the following |
19 | * disclaimer. |
20 | * |
21 | * - Redistributions in binary form must reproduce the above |
22 | * copyright notice, this list of conditions and the following |
23 | * disclaimer in the documentation and/or other materials |
24 | * provided with the distribution. |
25 | * |
26 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
27 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
28 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
29 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
30 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
31 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
32 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
33 | * SOFTWARE. |
34 | */ |
35 | |
36 | #ifndef __T4VF_COMMON_H__ |
37 | #define __T4VF_COMMON_H__ |
38 | |
39 | #include "../cxgb4/t4_hw.h" |
40 | #include "../cxgb4/t4fw_api.h" |
41 | |
42 | #define CHELSIO_CHIP_CODE(version, revision) (((version) << 4) | (revision)) |
43 | #define CHELSIO_CHIP_VERSION(code) (((code) >> 4) & 0xf) |
44 | #define CHELSIO_CHIP_RELEASE(code) ((code) & 0xf) |
45 | |
46 | /* All T4 and later chips have their PCI-E Device IDs encoded as 0xVFPP where: |
47 | * |
48 | * V = "4" for T4; "5" for T5, etc. or |
49 | * = "a" for T4 FPGA; "b" for T4 FPGA, etc. |
50 | * F = "0" for PF 0..3; "4".."7" for PF4..7; and "8" for VFs |
51 | * PP = adapter product designation |
52 | */ |
53 | #define CHELSIO_T4 0x4 |
54 | #define CHELSIO_T5 0x5 |
55 | #define CHELSIO_T6 0x6 |
56 | |
57 | enum chip_type { |
58 | T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1), |
59 | T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2), |
60 | T4_FIRST_REV = T4_A1, |
61 | T4_LAST_REV = T4_A2, |
62 | |
63 | T5_A0 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0), |
64 | T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 1), |
65 | T5_FIRST_REV = T5_A0, |
66 | T5_LAST_REV = T5_A1, |
67 | }; |
68 | |
69 | /* |
70 | * The "len16" field of a Firmware Command Structure ... |
71 | */ |
72 | #define FW_LEN16(fw_struct) FW_CMD_LEN16_V(sizeof(fw_struct) / 16) |
73 | |
74 | /* |
75 | * Per-VF statistics. |
76 | */ |
77 | struct t4vf_port_stats { |
78 | /* |
79 | * TX statistics. |
80 | */ |
81 | u64 tx_bcast_bytes; /* broadcast */ |
82 | u64 tx_bcast_frames; |
83 | u64 tx_mcast_bytes; /* multicast */ |
84 | u64 tx_mcast_frames; |
85 | u64 tx_ucast_bytes; /* unicast */ |
86 | u64 tx_ucast_frames; |
87 | u64 tx_drop_frames; /* TX dropped frames */ |
88 | u64 tx_offload_bytes; /* offload */ |
89 | u64 tx_offload_frames; |
90 | |
91 | /* |
92 | * RX statistics. |
93 | */ |
94 | u64 rx_bcast_bytes; /* broadcast */ |
95 | u64 rx_bcast_frames; |
96 | u64 rx_mcast_bytes; /* multicast */ |
97 | u64 rx_mcast_frames; |
98 | u64 rx_ucast_bytes; |
99 | u64 rx_ucast_frames; /* unicast */ |
100 | |
101 | u64 rx_err_frames; /* RX error frames */ |
102 | }; |
103 | |
104 | /* |
105 | * Per-"port" (Virtual Interface) link configuration ... |
106 | */ |
107 | typedef u16 fw_port_cap16_t; /* 16-bit Port Capabilities integral value */ |
108 | typedef u32 fw_port_cap32_t; /* 32-bit Port Capabilities integral value */ |
109 | |
110 | enum fw_caps { |
111 | FW_CAPS_UNKNOWN = 0, /* 0'ed out initial state */ |
112 | FW_CAPS16 = 1, /* old Firmware: 16-bit Port Capabilities */ |
113 | FW_CAPS32 = 2, /* new Firmware: 32-bit Port Capabilities */ |
114 | }; |
115 | |
116 | enum cc_pause { |
117 | PAUSE_RX = 1 << 0, |
118 | PAUSE_TX = 1 << 1, |
119 | PAUSE_AUTONEG = 1 << 2 |
120 | }; |
121 | |
122 | enum cc_fec { |
123 | FEC_AUTO = 1 << 0, /* IEEE 802.3 "automatic" */ |
124 | FEC_RS = 1 << 1, /* Reed-Solomon */ |
125 | FEC_BASER_RS = 1 << 2, /* BaseR/Reed-Solomon */ |
126 | }; |
127 | |
128 | struct link_config { |
129 | fw_port_cap32_t pcaps; /* link capabilities */ |
130 | fw_port_cap32_t acaps; /* advertised capabilities */ |
131 | fw_port_cap32_t lpacaps; /* peer advertised capabilities */ |
132 | |
133 | fw_port_cap32_t speed_caps; /* speed(s) user has requested */ |
134 | u32 speed; /* actual link speed */ |
135 | |
136 | enum cc_pause requested_fc; /* flow control user has requested */ |
137 | enum cc_pause fc; /* actual link flow control */ |
138 | enum cc_pause advertised_fc; /* actual advertised flow control */ |
139 | |
140 | enum cc_fec auto_fec; /* Forward Error Correction: */ |
141 | enum cc_fec requested_fec; /* "automatic" (IEEE 802.3), */ |
142 | enum cc_fec fec; /* requested, and actual in use */ |
143 | |
144 | unsigned char autoneg; /* autonegotiating? */ |
145 | |
146 | unsigned char link_ok; /* link up? */ |
147 | unsigned char link_down_rc; /* link down reason */ |
148 | }; |
149 | |
150 | /* Return true if the Link Configuration supports "High Speeds" (those greater |
151 | * than 1Gb/s). |
152 | */ |
153 | static inline bool is_x_10g_port(const struct link_config *lc) |
154 | { |
155 | fw_port_cap32_t speeds, high_speeds; |
156 | |
157 | speeds = FW_PORT_CAP32_SPEED_V(FW_PORT_CAP32_SPEED_G(lc->pcaps)); |
158 | high_speeds = |
159 | speeds & ~(FW_PORT_CAP32_SPEED_100M | FW_PORT_CAP32_SPEED_1G); |
160 | |
161 | return high_speeds != 0; |
162 | } |
163 | |
164 | /* |
165 | * General device parameters ... |
166 | */ |
167 | struct dev_params { |
168 | u32 fwrev; /* firmware version */ |
169 | u32 tprev; /* TP Microcode Version */ |
170 | }; |
171 | |
172 | /* |
173 | * Scatter Gather Engine parameters. These are almost all determined by the |
174 | * Physical Function Driver. We just need to grab them to see within which |
175 | * environment we're playing ... |
176 | */ |
177 | struct sge_params { |
178 | u32 sge_control; /* padding, boundaries, lengths, etc. */ |
179 | u32 sge_control2; /* T5: more of the same */ |
180 | u32 sge_host_page_size; /* PF0-7 page sizes */ |
181 | u32 sge_egress_queues_per_page; /* PF0-7 egress queues/page */ |
182 | u32 sge_ingress_queues_per_page;/* PF0-7 ingress queues/page */ |
183 | u32 sge_vf_hps; /* host page size for our vf */ |
184 | u32 sge_vf_eq_qpp; /* egress queues/page for our VF */ |
185 | u32 sge_vf_iq_qpp; /* ingress queues/page for our VF */ |
186 | u32 sge_fl_buffer_size[16]; /* free list buffer sizes */ |
187 | u32 sge_ingress_rx_threshold; /* RX counter interrupt threshold[4] */ |
188 | u32 sge_congestion_control; /* congestion thresholds, etc. */ |
189 | u32 sge_timer_value_0_and_1; /* interrupt coalescing timer values */ |
190 | u32 sge_timer_value_2_and_3; |
191 | u32 sge_timer_value_4_and_5; |
192 | }; |
193 | |
194 | /* |
195 | * Vital Product Data parameters. |
196 | */ |
197 | struct vpd_params { |
198 | u32 cclk; /* Core Clock (KHz) */ |
199 | }; |
200 | |
201 | /* Stores chip specific parameters */ |
202 | struct arch_specific_params { |
203 | u32 sge_fl_db; |
204 | u16 mps_tcam_size; |
205 | }; |
206 | |
207 | /* |
208 | * Global Receive Side Scaling (RSS) parameters in host-native format. |
209 | */ |
210 | struct { |
211 | unsigned int ; /* RSS mode */ |
212 | union { |
213 | struct { |
214 | unsigned int :1; /* SYN Map Enable */ |
215 | unsigned int :1; /* enable hashing 4-tuple IPv6 SYNs */ |
216 | unsigned int :1; /* enable hashing 2-tuple IPv6 SYNs */ |
217 | unsigned int :1; /* enable hashing 4-tuple IPv4 SYNs */ |
218 | unsigned int :1; /* enable hashing 2-tuple IPv4 SYNs */ |
219 | unsigned int :1; /* Offload Map Enable */ |
220 | unsigned int :1; /* Tunnel Map Enable */ |
221 | unsigned int :1; /* Tunnel All Lookup */ |
222 | unsigned int :1; /* use Toeplitz hash */ |
223 | } ; |
224 | } ; |
225 | }; |
226 | |
227 | /* |
228 | * Virtual Interface RSS Configuration in host-native format. |
229 | */ |
230 | union { |
231 | struct { |
232 | u16 ; /* Ingress Queue ID for !tnlalllookup */ |
233 | unsigned int :1; /* hash 4-tuple IPv6 ingress packets */ |
234 | unsigned int :1; /* hash 2-tuple IPv6 ingress packets */ |
235 | unsigned int :1; /* hash 4-tuple IPv4 ingress packets */ |
236 | unsigned int :1; /* hash 2-tuple IPv4 ingress packets */ |
237 | int ; /* hash 4-tuple UDP ingress packets */ |
238 | } ; |
239 | }; |
240 | |
241 | /* |
242 | * Maximum resources provisioned for a PCI VF. |
243 | */ |
244 | struct vf_resources { |
245 | unsigned int nvi; /* N virtual interfaces */ |
246 | unsigned int neq; /* N egress Qs */ |
247 | unsigned int nethctrl; /* N egress ETH or CTRL Qs */ |
248 | unsigned int niqflint; /* N ingress Qs/w free list(s) & intr */ |
249 | unsigned int niq; /* N ingress Qs */ |
250 | unsigned int tc; /* PCI-E traffic class */ |
251 | unsigned int pmask; /* port access rights mask */ |
252 | unsigned int nexactf; /* N exact MPS filters */ |
253 | unsigned int r_caps; /* read capabilities */ |
254 | unsigned int wx_caps; /* write/execute capabilities */ |
255 | }; |
256 | |
257 | /* |
258 | * Per-"adapter" (Virtual Function) parameters. |
259 | */ |
260 | struct adapter_params { |
261 | struct dev_params dev; /* general device parameters */ |
262 | struct sge_params sge; /* Scatter Gather Engine */ |
263 | struct vpd_params vpd; /* Vital Product Data */ |
264 | struct rss_params ; /* Receive Side Scaling */ |
265 | struct vf_resources vfres; /* Virtual Function Resource limits */ |
266 | struct arch_specific_params arch; /* chip specific params */ |
267 | enum chip_type chip; /* chip code */ |
268 | u8 nports; /* # of Ethernet "ports" */ |
269 | u8 fw_caps_support; /* 32-bit Port Capabilities */ |
270 | }; |
271 | |
272 | /* Firmware Mailbox Command/Reply log. All values are in Host-Endian format. |
273 | * The access and execute times are signed in order to accommodate negative |
274 | * error returns. |
275 | */ |
276 | struct mbox_cmd { |
277 | u64 cmd[MBOX_LEN / 8]; /* a Firmware Mailbox Command/Reply */ |
278 | u64 timestamp; /* OS-dependent timestamp */ |
279 | u32 seqno; /* sequence number */ |
280 | s16 access; /* time (ms) to access mailbox */ |
281 | s16 execute; /* time (ms) to execute */ |
282 | }; |
283 | |
284 | struct mbox_cmd_log { |
285 | unsigned int size; /* number of entries in the log */ |
286 | unsigned int cursor; /* next position in the log to write */ |
287 | u32 seqno; /* next sequence number */ |
288 | /* variable length mailbox command log starts here */ |
289 | }; |
290 | |
291 | /* Given a pointer to a Firmware Mailbox Command Log and a log entry index, |
292 | * return a pointer to the specified entry. |
293 | */ |
294 | static inline struct mbox_cmd *mbox_cmd_log_entry(struct mbox_cmd_log *log, |
295 | unsigned int entry_idx) |
296 | { |
297 | return &((struct mbox_cmd *)&(log)[1])[entry_idx]; |
298 | } |
299 | |
300 | #include "adapter.h" |
301 | |
302 | #ifndef PCI_VENDOR_ID_CHELSIO |
303 | # define PCI_VENDOR_ID_CHELSIO 0x1425 |
304 | #endif |
305 | |
306 | #define for_each_port(adapter, iter) \ |
307 | for (iter = 0; iter < (adapter)->params.nports; iter++) |
308 | |
309 | static inline unsigned int core_ticks_per_usec(const struct adapter *adapter) |
310 | { |
311 | return adapter->params.vpd.cclk / 1000; |
312 | } |
313 | |
314 | static inline unsigned int us_to_core_ticks(const struct adapter *adapter, |
315 | unsigned int us) |
316 | { |
317 | return (us * adapter->params.vpd.cclk) / 1000; |
318 | } |
319 | |
320 | static inline unsigned int core_ticks_to_us(const struct adapter *adapter, |
321 | unsigned int ticks) |
322 | { |
323 | return (ticks * 1000) / adapter->params.vpd.cclk; |
324 | } |
325 | |
326 | int t4vf_wr_mbox_core(struct adapter *, const void *, int, void *, bool); |
327 | |
328 | static inline int t4vf_wr_mbox(struct adapter *adapter, const void *cmd, |
329 | int size, void *rpl) |
330 | { |
331 | return t4vf_wr_mbox_core(adapter, cmd, size, rpl, true); |
332 | } |
333 | |
334 | static inline int t4vf_wr_mbox_ns(struct adapter *adapter, const void *cmd, |
335 | int size, void *rpl) |
336 | { |
337 | return t4vf_wr_mbox_core(adapter, cmd, size, rpl, false); |
338 | } |
339 | |
340 | #define CHELSIO_PCI_ID_VER(dev_id) ((dev_id) >> 12) |
341 | |
342 | static inline int is_t4(enum chip_type chip) |
343 | { |
344 | return CHELSIO_CHIP_VERSION(chip) == CHELSIO_T4; |
345 | } |
346 | |
347 | /** |
348 | * hash_mac_addr - return the hash value of a MAC address |
349 | * @addr: the 48-bit Ethernet MAC address |
350 | * |
351 | * Hashes a MAC address according to the hash function used by hardware |
352 | * inexact (hash) address matching. |
353 | */ |
354 | static inline int hash_mac_addr(const u8 *addr) |
355 | { |
356 | u32 a = ((u32)addr[0] << 16) | ((u32)addr[1] << 8) | addr[2]; |
357 | u32 b = ((u32)addr[3] << 16) | ((u32)addr[4] << 8) | addr[5]; |
358 | |
359 | a ^= b; |
360 | a ^= (a >> 12); |
361 | a ^= (a >> 6); |
362 | return a & 0x3f; |
363 | } |
364 | |
365 | int t4vf_wait_dev_ready(struct adapter *); |
366 | int t4vf_port_init(struct adapter *, int); |
367 | |
368 | int t4vf_fw_reset(struct adapter *); |
369 | int t4vf_set_params(struct adapter *, unsigned int, const u32 *, const u32 *); |
370 | |
371 | int t4vf_fl_pkt_align(struct adapter *adapter); |
372 | enum t4_bar2_qtype { T4_BAR2_QTYPE_EGRESS, T4_BAR2_QTYPE_INGRESS }; |
373 | int t4vf_bar2_sge_qregs(struct adapter *adapter, |
374 | unsigned int qid, |
375 | enum t4_bar2_qtype qtype, |
376 | u64 *pbar2_qoffset, |
377 | unsigned int *pbar2_qid); |
378 | |
379 | unsigned int t4vf_get_pf_from_vf(struct adapter *); |
380 | int t4vf_get_sge_params(struct adapter *); |
381 | int t4vf_get_vpd_params(struct adapter *); |
382 | int t4vf_get_dev_params(struct adapter *); |
383 | int (struct adapter *); |
384 | int t4vf_get_vfres(struct adapter *); |
385 | |
386 | int (struct adapter *, unsigned int, |
387 | union rss_vi_config *); |
388 | int (struct adapter *, unsigned int, |
389 | union rss_vi_config *); |
390 | int (struct adapter *, unsigned int, int, int, |
391 | const u16 *, int); |
392 | |
393 | int t4vf_alloc_vi(struct adapter *, int); |
394 | int t4vf_free_vi(struct adapter *, int); |
395 | int t4vf_enable_vi(struct adapter *adapter, unsigned int viid, bool rx_en, |
396 | bool tx_en); |
397 | int t4vf_enable_pi(struct adapter *adapter, struct port_info *pi, bool rx_en, |
398 | bool tx_en); |
399 | int t4vf_identify_port(struct adapter *, unsigned int, unsigned int); |
400 | |
401 | int t4vf_set_rxmode(struct adapter *, unsigned int, int, int, int, int, int, |
402 | bool); |
403 | int t4vf_alloc_mac_filt(struct adapter *, unsigned int, bool, unsigned int, |
404 | const u8 **, u16 *, u64 *, bool); |
405 | int t4vf_free_mac_filt(struct adapter *, unsigned int, unsigned int naddr, |
406 | const u8 **, bool); |
407 | int t4vf_change_mac(struct adapter *, unsigned int, int, const u8 *, bool); |
408 | int t4vf_set_addr_hash(struct adapter *, unsigned int, bool, u64, bool); |
409 | int t4vf_get_port_stats(struct adapter *, int, struct t4vf_port_stats *); |
410 | |
411 | int t4vf_iq_free(struct adapter *, unsigned int, unsigned int, unsigned int, |
412 | unsigned int); |
413 | int t4vf_eth_eq_free(struct adapter *, unsigned int); |
414 | |
415 | int t4vf_update_port_info(struct port_info *pi); |
416 | int t4vf_handle_fw_rpl(struct adapter *, const __be64 *); |
417 | int t4vf_prep_adapter(struct adapter *); |
418 | int t4vf_get_vf_mac_acl(struct adapter *adapter, unsigned int port, |
419 | unsigned int *naddr, u8 *addr); |
420 | int t4vf_get_vf_vlan_acl(struct adapter *adapter); |
421 | |
422 | #endif /* __T4VF_COMMON_H__ */ |
423 | |