1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* Copyright(c) 1999 - 2018 Intel Corporation. */ |
3 | |
4 | /* PTP 1588 Hardware Clock (PHC) |
5 | * Derived from PTP Hardware Clock driver for Intel 82576 and 82580 (igb) |
6 | * Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com> |
7 | */ |
8 | |
9 | #include "e1000.h" |
10 | |
11 | #ifdef CONFIG_E1000E_HWTS |
12 | #include <linux/clocksource.h> |
13 | #include <linux/ktime.h> |
14 | #include <asm/tsc.h> |
15 | #endif |
16 | |
17 | /** |
18 | * e1000e_phc_adjfine - adjust the frequency of the hardware clock |
19 | * @ptp: ptp clock structure |
20 | * @delta: Desired frequency chance in scaled parts per million |
21 | * |
22 | * Adjust the frequency of the PHC cycle counter by the indicated delta from |
23 | * the base frequency. |
24 | * |
25 | * Scaled parts per million is ppm but with a 16 bit binary fractional field. |
26 | **/ |
27 | static int e1000e_phc_adjfine(struct ptp_clock_info *ptp, long delta) |
28 | { |
29 | struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter, |
30 | ptp_clock_info); |
31 | struct e1000_hw *hw = &adapter->hw; |
32 | unsigned long flags; |
33 | u64 incvalue; |
34 | u32 timinca; |
35 | s32 ret_val; |
36 | |
37 | /* Get the System Time Register SYSTIM base frequency */ |
38 | ret_val = e1000e_get_base_timinca(adapter, timinca: &timinca); |
39 | if (ret_val) |
40 | return ret_val; |
41 | |
42 | spin_lock_irqsave(&adapter->systim_lock, flags); |
43 | |
44 | incvalue = timinca & E1000_TIMINCA_INCVALUE_MASK; |
45 | incvalue = adjust_by_scaled_ppm(base: incvalue, scaled_ppm: delta); |
46 | |
47 | timinca &= ~E1000_TIMINCA_INCVALUE_MASK; |
48 | timinca |= incvalue; |
49 | |
50 | ew32(TIMINCA, timinca); |
51 | |
52 | adapter->ptp_delta = delta; |
53 | |
54 | spin_unlock_irqrestore(lock: &adapter->systim_lock, flags); |
55 | |
56 | return 0; |
57 | } |
58 | |
59 | /** |
60 | * e1000e_phc_adjtime - Shift the time of the hardware clock |
61 | * @ptp: ptp clock structure |
62 | * @delta: Desired change in nanoseconds |
63 | * |
64 | * Adjust the timer by resetting the timecounter structure. |
65 | **/ |
66 | static int e1000e_phc_adjtime(struct ptp_clock_info *ptp, s64 delta) |
67 | { |
68 | struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter, |
69 | ptp_clock_info); |
70 | unsigned long flags; |
71 | |
72 | spin_lock_irqsave(&adapter->systim_lock, flags); |
73 | timecounter_adjtime(tc: &adapter->tc, delta); |
74 | spin_unlock_irqrestore(lock: &adapter->systim_lock, flags); |
75 | |
76 | return 0; |
77 | } |
78 | |
79 | #ifdef CONFIG_E1000E_HWTS |
80 | #define MAX_HW_WAIT_COUNT (3) |
81 | |
82 | /** |
83 | * e1000e_phc_get_syncdevicetime - Callback given to timekeeping code reads system/device registers |
84 | * @device: current device time |
85 | * @system: system counter value read synchronously with device time |
86 | * @ctx: context provided by timekeeping code |
87 | * |
88 | * Read device and system (ART) clock simultaneously and return the corrected |
89 | * clock values in ns. |
90 | **/ |
91 | static int e1000e_phc_get_syncdevicetime(ktime_t *device, |
92 | struct system_counterval_t *system, |
93 | void *ctx) |
94 | { |
95 | struct e1000_adapter *adapter = (struct e1000_adapter *)ctx; |
96 | struct e1000_hw *hw = &adapter->hw; |
97 | unsigned long flags; |
98 | int i; |
99 | u32 tsync_ctrl; |
100 | u64 dev_cycles; |
101 | u64 sys_cycles; |
102 | |
103 | tsync_ctrl = er32(TSYNCTXCTL); |
104 | tsync_ctrl |= E1000_TSYNCTXCTL_START_SYNC | |
105 | E1000_TSYNCTXCTL_MAX_ALLOWED_DLY_MASK; |
106 | ew32(TSYNCTXCTL, tsync_ctrl); |
107 | for (i = 0; i < MAX_HW_WAIT_COUNT; ++i) { |
108 | udelay(1); |
109 | tsync_ctrl = er32(TSYNCTXCTL); |
110 | if (tsync_ctrl & E1000_TSYNCTXCTL_SYNC_COMP) |
111 | break; |
112 | } |
113 | |
114 | if (i == MAX_HW_WAIT_COUNT) |
115 | return -ETIMEDOUT; |
116 | |
117 | dev_cycles = er32(SYSSTMPH); |
118 | dev_cycles <<= 32; |
119 | dev_cycles |= er32(SYSSTMPL); |
120 | spin_lock_irqsave(&adapter->systim_lock, flags); |
121 | *device = ns_to_ktime(ns: timecounter_cyc2time(tc: &adapter->tc, cycle_tstamp: dev_cycles)); |
122 | spin_unlock_irqrestore(lock: &adapter->systim_lock, flags); |
123 | |
124 | sys_cycles = er32(PLTSTMPH); |
125 | sys_cycles <<= 32; |
126 | sys_cycles |= er32(PLTSTMPL); |
127 | *system = convert_art_to_tsc(art: sys_cycles); |
128 | |
129 | return 0; |
130 | } |
131 | |
132 | /** |
133 | * e1000e_phc_getcrosststamp - Reads the current system/device cross timestamp |
134 | * @ptp: ptp clock structure |
135 | * @xtstamp: structure containing timestamp |
136 | * |
137 | * Read device and system (ART) clock simultaneously and return the scaled |
138 | * clock values in ns. |
139 | **/ |
140 | static int e1000e_phc_getcrosststamp(struct ptp_clock_info *ptp, |
141 | struct system_device_crosststamp *xtstamp) |
142 | { |
143 | struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter, |
144 | ptp_clock_info); |
145 | |
146 | return get_device_system_crosststamp(get_time_fn: e1000e_phc_get_syncdevicetime, |
147 | ctx: adapter, NULL, xtstamp); |
148 | } |
149 | #endif/*CONFIG_E1000E_HWTS*/ |
150 | |
151 | /** |
152 | * e1000e_phc_gettimex - Reads the current time from the hardware clock and |
153 | * system clock |
154 | * @ptp: ptp clock structure |
155 | * @ts: timespec structure to hold the current PHC time |
156 | * @sts: structure to hold the current system time |
157 | * |
158 | * Read the timecounter and return the correct value in ns after converting |
159 | * it into a struct timespec. |
160 | **/ |
161 | static int e1000e_phc_gettimex(struct ptp_clock_info *ptp, |
162 | struct timespec64 *ts, |
163 | struct ptp_system_timestamp *sts) |
164 | { |
165 | struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter, |
166 | ptp_clock_info); |
167 | unsigned long flags; |
168 | u64 cycles, ns; |
169 | |
170 | spin_lock_irqsave(&adapter->systim_lock, flags); |
171 | |
172 | /* NOTE: Non-monotonic SYSTIM readings may be returned */ |
173 | cycles = e1000e_read_systim(adapter, sts); |
174 | ns = timecounter_cyc2time(tc: &adapter->tc, cycle_tstamp: cycles); |
175 | |
176 | spin_unlock_irqrestore(lock: &adapter->systim_lock, flags); |
177 | |
178 | *ts = ns_to_timespec64(nsec: ns); |
179 | |
180 | return 0; |
181 | } |
182 | |
183 | /** |
184 | * e1000e_phc_settime - Set the current time on the hardware clock |
185 | * @ptp: ptp clock structure |
186 | * @ts: timespec containing the new time for the cycle counter |
187 | * |
188 | * Reset the timecounter to use a new base value instead of the kernel |
189 | * wall timer value. |
190 | **/ |
191 | static int e1000e_phc_settime(struct ptp_clock_info *ptp, |
192 | const struct timespec64 *ts) |
193 | { |
194 | struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter, |
195 | ptp_clock_info); |
196 | unsigned long flags; |
197 | u64 ns; |
198 | |
199 | ns = timespec64_to_ns(ts); |
200 | |
201 | /* reset the timecounter */ |
202 | spin_lock_irqsave(&adapter->systim_lock, flags); |
203 | timecounter_init(tc: &adapter->tc, cc: &adapter->cc, start_tstamp: ns); |
204 | spin_unlock_irqrestore(lock: &adapter->systim_lock, flags); |
205 | |
206 | return 0; |
207 | } |
208 | |
209 | /** |
210 | * e1000e_phc_enable - enable or disable an ancillary feature |
211 | * @ptp: ptp clock structure |
212 | * @request: Desired resource to enable or disable |
213 | * @on: Caller passes one to enable or zero to disable |
214 | * |
215 | * Enable (or disable) ancillary features of the PHC subsystem. |
216 | * Currently, no ancillary features are supported. |
217 | **/ |
218 | static int e1000e_phc_enable(struct ptp_clock_info __always_unused *ptp, |
219 | struct ptp_clock_request __always_unused *request, |
220 | int __always_unused on) |
221 | { |
222 | return -EOPNOTSUPP; |
223 | } |
224 | |
225 | static void e1000e_systim_overflow_work(struct work_struct *work) |
226 | { |
227 | struct e1000_adapter *adapter = container_of(work, struct e1000_adapter, |
228 | systim_overflow_work.work); |
229 | struct e1000_hw *hw = &adapter->hw; |
230 | struct timespec64 ts; |
231 | u64 ns; |
232 | |
233 | /* Update the timecounter */ |
234 | ns = timecounter_read(tc: &adapter->tc); |
235 | |
236 | ts = ns_to_timespec64(nsec: ns); |
237 | e_dbg("SYSTIM overflow check at %lld.%09lu\n" , |
238 | (long long) ts.tv_sec, ts.tv_nsec); |
239 | |
240 | schedule_delayed_work(dwork: &adapter->systim_overflow_work, |
241 | E1000_SYSTIM_OVERFLOW_PERIOD); |
242 | } |
243 | |
244 | static const struct ptp_clock_info e1000e_ptp_clock_info = { |
245 | .owner = THIS_MODULE, |
246 | .n_alarm = 0, |
247 | .n_ext_ts = 0, |
248 | .n_per_out = 0, |
249 | .n_pins = 0, |
250 | .pps = 0, |
251 | .adjfine = e1000e_phc_adjfine, |
252 | .adjtime = e1000e_phc_adjtime, |
253 | .gettimex64 = e1000e_phc_gettimex, |
254 | .settime64 = e1000e_phc_settime, |
255 | .enable = e1000e_phc_enable, |
256 | }; |
257 | |
258 | /** |
259 | * e1000e_ptp_init - initialize PTP for devices which support it |
260 | * @adapter: board private structure |
261 | * |
262 | * This function performs the required steps for enabling PTP support. |
263 | * If PTP support has already been loaded it simply calls the cyclecounter |
264 | * init routine and exits. |
265 | **/ |
266 | void e1000e_ptp_init(struct e1000_adapter *adapter) |
267 | { |
268 | struct e1000_hw *hw = &adapter->hw; |
269 | |
270 | adapter->ptp_clock = NULL; |
271 | |
272 | if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP)) |
273 | return; |
274 | |
275 | adapter->ptp_clock_info = e1000e_ptp_clock_info; |
276 | |
277 | snprintf(buf: adapter->ptp_clock_info.name, |
278 | size: sizeof(adapter->ptp_clock_info.name), fmt: "%pm" , |
279 | adapter->netdev->perm_addr); |
280 | |
281 | switch (hw->mac.type) { |
282 | case e1000_pch2lan: |
283 | case e1000_pch_lpt: |
284 | case e1000_pch_spt: |
285 | case e1000_pch_cnp: |
286 | case e1000_pch_tgp: |
287 | case e1000_pch_adp: |
288 | case e1000_pch_mtp: |
289 | case e1000_pch_lnp: |
290 | case e1000_pch_ptp: |
291 | case e1000_pch_nvp: |
292 | if ((hw->mac.type < e1000_pch_lpt) || |
293 | (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) { |
294 | adapter->ptp_clock_info.max_adj = 24000000 - 1; |
295 | break; |
296 | } |
297 | fallthrough; |
298 | case e1000_82574: |
299 | case e1000_82583: |
300 | adapter->ptp_clock_info.max_adj = 600000000 - 1; |
301 | break; |
302 | default: |
303 | break; |
304 | } |
305 | |
306 | #ifdef CONFIG_E1000E_HWTS |
307 | /* CPU must have ART and GBe must be from Sunrise Point or greater */ |
308 | if (hw->mac.type >= e1000_pch_spt && boot_cpu_has(X86_FEATURE_ART)) |
309 | adapter->ptp_clock_info.getcrosststamp = |
310 | e1000e_phc_getcrosststamp; |
311 | #endif/*CONFIG_E1000E_HWTS*/ |
312 | |
313 | INIT_DELAYED_WORK(&adapter->systim_overflow_work, |
314 | e1000e_systim_overflow_work); |
315 | |
316 | schedule_delayed_work(dwork: &adapter->systim_overflow_work, |
317 | E1000_SYSTIM_OVERFLOW_PERIOD); |
318 | |
319 | adapter->ptp_clock = ptp_clock_register(info: &adapter->ptp_clock_info, |
320 | parent: &adapter->pdev->dev); |
321 | if (IS_ERR(ptr: adapter->ptp_clock)) { |
322 | adapter->ptp_clock = NULL; |
323 | e_err("ptp_clock_register failed\n" ); |
324 | } else if (adapter->ptp_clock) { |
325 | e_info("registered PHC clock\n" ); |
326 | } |
327 | } |
328 | |
329 | /** |
330 | * e1000e_ptp_remove - disable PTP device and stop the overflow check |
331 | * @adapter: board private structure |
332 | * |
333 | * Stop the PTP support, and cancel the delayed work. |
334 | **/ |
335 | void e1000e_ptp_remove(struct e1000_adapter *adapter) |
336 | { |
337 | if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP)) |
338 | return; |
339 | |
340 | cancel_delayed_work_sync(dwork: &adapter->systim_overflow_work); |
341 | |
342 | if (adapter->ptp_clock) { |
343 | ptp_clock_unregister(ptp: adapter->ptp_clock); |
344 | adapter->ptp_clock = NULL; |
345 | e_info("removed PHC\n" ); |
346 | } |
347 | } |
348 | |