| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* Copyright (c) 2019, Intel Corporation. */ |
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| 3 | |
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| 4 | #ifndef _ICE_BASE_H_ |
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| 5 | #define _ICE_BASE_H_ |
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| 6 | |
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| 7 | #include "ice.h" |
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| 8 | |
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| 9 | int ice_vsi_cfg_rxq(struct ice_rx_ring *ring); |
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| 10 | int __ice_vsi_get_qs(struct ice_qs_cfg *qs_cfg); |
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| 11 | int |
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| 12 | ice_vsi_ctrl_one_rx_ring(struct ice_vsi *vsi, bool ena, u16 rxq_idx, bool wait); |
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| 13 | int ice_vsi_wait_one_rx_ring(struct ice_vsi *vsi, bool ena, u16 rxq_idx); |
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| 14 | int ice_vsi_alloc_q_vectors(struct ice_vsi *vsi); |
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| 15 | void ice_vsi_map_rings_to_vectors(struct ice_vsi *vsi); |
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| 16 | void ice_vsi_free_q_vectors(struct ice_vsi *vsi); |
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| 17 | int |
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| 18 | ice_vsi_cfg_txq(struct ice_vsi *vsi, struct ice_tx_ring *ring, |
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| 19 | struct ice_aqc_add_tx_qgrp *qg_buf); |
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| 20 | void ice_cfg_itr(struct ice_hw *hw, struct ice_q_vector *q_vector); |
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| 21 | void |
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| 22 | ice_cfg_txq_interrupt(struct ice_vsi *vsi, u16 txq, u16 msix_idx, u16 itr_idx); |
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| 23 | void |
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| 24 | ice_cfg_rxq_interrupt(struct ice_vsi *vsi, u16 rxq, u16 msix_idx, u16 itr_idx); |
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| 25 | void ice_trigger_sw_intr(struct ice_hw *hw, struct ice_q_vector *q_vector); |
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| 26 | int |
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| 27 | ice_vsi_stop_tx_ring(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src, |
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| 28 | u16 rel_vmvf_num, struct ice_tx_ring *ring, |
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| 29 | struct ice_txq_meta *txq_meta); |
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| 30 | void |
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| 31 | ice_fill_txq_meta(struct ice_vsi *vsi, struct ice_tx_ring *ring, |
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| 32 | struct ice_txq_meta *txq_meta); |
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| 33 | #endif /* _ICE_BASE_H_ */ |
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| 34 | |
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