1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright (c) 2019, Intel Corporation. */
3
4#ifndef _ICE_FLEX_TYPE_H_
5#define _ICE_FLEX_TYPE_H_
6#include "ice_ddp.h"
7
8/* Packet Type (PTYPE) values */
9#define ICE_PTYPE_MAC_PAY 1
10#define ICE_PTYPE_IPV4_PAY 23
11#define ICE_PTYPE_IPV4_UDP_PAY 24
12#define ICE_PTYPE_IPV4_TCP_PAY 26
13#define ICE_PTYPE_IPV4_SCTP_PAY 27
14#define ICE_PTYPE_IPV6_PAY 89
15#define ICE_PTYPE_IPV6_UDP_PAY 90
16#define ICE_PTYPE_IPV6_TCP_PAY 92
17#define ICE_PTYPE_IPV6_SCTP_PAY 93
18#define ICE_MAC_IPV4_ESP 160
19#define ICE_MAC_IPV6_ESP 161
20#define ICE_MAC_IPV4_AH 162
21#define ICE_MAC_IPV6_AH 163
22#define ICE_MAC_IPV4_NAT_T_ESP 164
23#define ICE_MAC_IPV6_NAT_T_ESP 165
24#define ICE_MAC_IPV4_GTPU 329
25#define ICE_MAC_IPV6_GTPU 330
26#define ICE_MAC_IPV4_GTPU_IPV4_FRAG 331
27#define ICE_MAC_IPV4_GTPU_IPV4_PAY 332
28#define ICE_MAC_IPV4_GTPU_IPV4_UDP_PAY 333
29#define ICE_MAC_IPV4_GTPU_IPV4_TCP 334
30#define ICE_MAC_IPV4_GTPU_IPV4_ICMP 335
31#define ICE_MAC_IPV6_GTPU_IPV4_FRAG 336
32#define ICE_MAC_IPV6_GTPU_IPV4_PAY 337
33#define ICE_MAC_IPV6_GTPU_IPV4_UDP_PAY 338
34#define ICE_MAC_IPV6_GTPU_IPV4_TCP 339
35#define ICE_MAC_IPV6_GTPU_IPV4_ICMP 340
36#define ICE_MAC_IPV4_GTPU_IPV6_FRAG 341
37#define ICE_MAC_IPV4_GTPU_IPV6_PAY 342
38#define ICE_MAC_IPV4_GTPU_IPV6_UDP_PAY 343
39#define ICE_MAC_IPV4_GTPU_IPV6_TCP 344
40#define ICE_MAC_IPV4_GTPU_IPV6_ICMPV6 345
41#define ICE_MAC_IPV6_GTPU_IPV6_FRAG 346
42#define ICE_MAC_IPV6_GTPU_IPV6_PAY 347
43#define ICE_MAC_IPV6_GTPU_IPV6_UDP_PAY 348
44#define ICE_MAC_IPV6_GTPU_IPV6_TCP 349
45#define ICE_MAC_IPV6_GTPU_IPV6_ICMPV6 350
46#define ICE_MAC_IPV4_PFCP_SESSION 352
47#define ICE_MAC_IPV6_PFCP_SESSION 354
48#define ICE_MAC_IPV4_L2TPV3 360
49#define ICE_MAC_IPV6_L2TPV3 361
50
51/* Attributes that can modify PTYPE definitions.
52 *
53 * These values will represent special attributes for PTYPEs, which will
54 * resolve into metadata packet flags definitions that can be used in the TCAM
55 * for identifying a PTYPE with specific characteristics.
56 */
57enum ice_ptype_attrib_type {
58 /* GTP PTYPEs */
59 ICE_PTYPE_ATTR_GTP_PDU_EH,
60 ICE_PTYPE_ATTR_GTP_SESSION,
61 ICE_PTYPE_ATTR_GTP_DOWNLINK,
62 ICE_PTYPE_ATTR_GTP_UPLINK,
63};
64
65struct ice_ptype_attrib_info {
66 u16 flags;
67 u16 mask;
68};
69
70/* TCAM flag definitions */
71#define ICE_GTP_PDU BIT(14)
72#define ICE_GTP_PDU_LINK BIT(13)
73
74/* GTP attributes */
75#define ICE_GTP_PDU_FLAG_MASK (ICE_GTP_PDU)
76#define ICE_GTP_PDU_EH ICE_GTP_PDU
77
78#define ICE_GTP_FLAGS_MASK (ICE_GTP_PDU | ICE_GTP_PDU_LINK)
79#define ICE_GTP_SESSION 0
80#define ICE_GTP_DOWNLINK ICE_GTP_PDU
81#define ICE_GTP_UPLINK (ICE_GTP_PDU | ICE_GTP_PDU_LINK)
82
83struct ice_ptype_attributes {
84 u16 ptype;
85 enum ice_ptype_attrib_type attrib;
86};
87
88/* Tunnel enabling */
89
90enum ice_tunnel_type {
91 TNL_VXLAN = 0,
92 TNL_GENEVE,
93 TNL_GRETAP,
94 TNL_GTPC,
95 TNL_GTPU,
96 __TNL_TYPE_CNT,
97 TNL_LAST = 0xFF,
98 TNL_ALL = 0xFF,
99};
100
101struct ice_tunnel_type_scan {
102 enum ice_tunnel_type type;
103 const char *label_prefix;
104};
105
106struct ice_tunnel_entry {
107 enum ice_tunnel_type type;
108 u16 boost_addr;
109 u16 port;
110 struct ice_boost_tcam_entry *boost_entry;
111 u8 valid;
112};
113
114#define ICE_TUNNEL_MAX_ENTRIES 16
115
116struct ice_tunnel_table {
117 struct ice_tunnel_entry tbl[ICE_TUNNEL_MAX_ENTRIES];
118 u16 count;
119 u16 valid_count[__TNL_TYPE_CNT];
120};
121
122struct ice_dvm_entry {
123 u16 boost_addr;
124 u16 enable;
125 struct ice_boost_tcam_entry *boost_entry;
126};
127
128#define ICE_DVM_MAX_ENTRIES 48
129
130struct ice_dvm_table {
131 struct ice_dvm_entry tbl[ICE_DVM_MAX_ENTRIES];
132 u16 count;
133};
134
135struct ice_pkg_es {
136 __le16 count;
137 __le16 offset;
138 struct ice_fv_word es[];
139};
140
141struct ice_es {
142 u32 sid;
143 u16 count;
144 u16 fvw;
145 u16 *ref_count;
146 u32 *mask_ena;
147 struct list_head prof_map;
148 struct ice_fv_word *t;
149 struct mutex prof_map_lock; /* protect access to profiles list */
150 u8 *written;
151 u8 reverse; /* set to true to reverse FV order */
152};
153
154/* PTYPE Group management */
155
156/* Note: XLT1 table takes 13-bit as input, and results in an 8-bit packet type
157 * group (PTG) ID as output.
158 *
159 * Note: PTG 0 is the default packet type group and it is assumed that all PTYPE
160 * are a part of this group until moved to a new PTG.
161 */
162#define ICE_DEFAULT_PTG 0
163
164struct ice_ptg_entry {
165 struct ice_ptg_ptype *first_ptype;
166 u8 in_use;
167};
168
169struct ice_ptg_ptype {
170 struct ice_ptg_ptype *next_ptype;
171 u8 ptg;
172};
173
174#define ICE_MAX_TCAM_PER_PROFILE 32
175#define ICE_MAX_PTG_PER_PROFILE 32
176
177struct ice_prof_map {
178 struct list_head list;
179 u64 profile_cookie;
180 u64 context;
181 u8 prof_id;
182 u8 ptg_cnt;
183 u8 ptg[ICE_MAX_PTG_PER_PROFILE];
184 struct ice_ptype_attrib_info attr[ICE_MAX_PTG_PER_PROFILE];
185};
186
187#define ICE_INVALID_TCAM 0xFFFF
188
189struct ice_tcam_inf {
190 u16 tcam_idx;
191 struct ice_ptype_attrib_info attr;
192 u8 ptg;
193 u8 prof_id;
194 u8 in_use;
195};
196
197struct ice_vsig_prof {
198 struct list_head list;
199 u64 profile_cookie;
200 u8 prof_id;
201 u8 tcam_count;
202 struct ice_tcam_inf tcam[ICE_MAX_TCAM_PER_PROFILE];
203};
204
205struct ice_vsig_entry {
206 struct list_head prop_lst;
207 struct ice_vsig_vsi *first_vsi;
208 u8 in_use;
209};
210
211struct ice_vsig_vsi {
212 struct ice_vsig_vsi *next_vsi;
213 u32 prop_mask;
214 u16 changed;
215 u16 vsig;
216};
217
218#define ICE_XLT1_CNT 1024
219#define ICE_MAX_PTGS 256
220
221/* XLT1 Table */
222struct ice_xlt1 {
223 struct ice_ptg_entry *ptg_tbl;
224 struct ice_ptg_ptype *ptypes;
225 u8 *t;
226 u32 sid;
227 u16 count;
228};
229
230#define ICE_XLT2_CNT 768
231#define ICE_MAX_VSIGS 768
232
233/* VSIG bit layout:
234 * [0:12]: incremental VSIG index 1 to ICE_MAX_VSIGS
235 * [13:15]: PF number of device
236 */
237#define ICE_VSIG_IDX_M (0x1FFF)
238#define ICE_PF_NUM_S 13
239#define ICE_PF_NUM_M (0x07 << ICE_PF_NUM_S)
240#define ICE_VSIG_VALUE(vsig, pf_id) \
241 ((u16)((((u16)(vsig)) & ICE_VSIG_IDX_M) | \
242 (((u16)(pf_id) << ICE_PF_NUM_S) & ICE_PF_NUM_M)))
243#define ICE_DEFAULT_VSIG 0
244
245/* XLT2 Table */
246struct ice_xlt2 {
247 struct ice_vsig_entry *vsig_tbl;
248 struct ice_vsig_vsi *vsis;
249 u16 *t;
250 u32 sid;
251 u16 count;
252};
253
254/* Profile ID Management */
255struct ice_prof_id_key {
256 __le16 flags;
257 u8 xlt1;
258 __le16 xlt2_cdid;
259} __packed;
260
261/* Keys are made up of two values, each one-half the size of the key.
262 * For TCAM, the entire key is 80 bits wide (or 2, 40-bit wide values)
263 */
264#define ICE_TCAM_KEY_VAL_SZ 5
265#define ICE_TCAM_KEY_SZ (2 * ICE_TCAM_KEY_VAL_SZ)
266
267struct ice_prof_tcam_entry {
268 __le16 addr;
269 u8 key[ICE_TCAM_KEY_SZ];
270 u8 prof_id;
271} __packed;
272
273struct ice_prof_id_section {
274 __le16 count;
275 struct ice_prof_tcam_entry entry[];
276};
277
278struct ice_prof_tcam {
279 u32 sid;
280 u16 count;
281 u16 max_prof_id;
282 struct ice_prof_tcam_entry *t;
283 u8 cdid_bits; /* # CDID bits to use in key, 0, 2, 4, or 8 */
284};
285
286struct ice_prof_redir {
287 u8 *t;
288 u32 sid;
289 u16 count;
290};
291
292struct ice_mask {
293 u16 mask; /* 16-bit mask */
294 u16 idx; /* index */
295 u16 ref; /* reference count */
296 u8 in_use; /* non-zero if used */
297};
298
299struct ice_masks {
300 struct mutex lock; /* lock to protect this structure */
301 u16 first; /* first mask owned by the PF */
302 u16 count; /* number of masks owned by the PF */
303#define ICE_PROF_MASK_COUNT 32
304 struct ice_mask masks[ICE_PROF_MASK_COUNT];
305};
306
307/* Tables per block */
308struct ice_blk_info {
309 struct ice_xlt1 xlt1;
310 struct ice_xlt2 xlt2;
311 struct ice_prof_tcam prof;
312 struct ice_prof_redir prof_redir;
313 struct ice_es es;
314 struct ice_masks masks;
315 u8 overwrite; /* set to true to allow overwrite of table entries */
316 u8 is_list_init;
317};
318
319enum ice_chg_type {
320 ICE_TCAM_NONE = 0,
321 ICE_PTG_ES_ADD,
322 ICE_TCAM_ADD,
323 ICE_VSIG_ADD,
324 ICE_VSIG_REM,
325 ICE_VSI_MOVE,
326};
327
328struct ice_chs_chg {
329 struct list_head list_entry;
330 enum ice_chg_type type;
331
332 u8 add_ptg;
333 u8 add_vsig;
334 u8 add_tcam_idx;
335 u8 add_prof;
336 u16 ptype;
337 u8 ptg;
338 u8 prof_id;
339 u16 vsi;
340 u16 vsig;
341 u16 orig_vsig;
342 u16 tcam_idx;
343 struct ice_ptype_attrib_info attr;
344};
345
346#define ICE_FLOW_PTYPE_MAX ICE_XLT1_CNT
347
348enum ice_prof_type {
349 ICE_PROF_NON_TUN = 0x1,
350 ICE_PROF_TUN_UDP = 0x2,
351 ICE_PROF_TUN_GRE = 0x4,
352 ICE_PROF_TUN_GTPU = 0x8,
353 ICE_PROF_TUN_GTPC = 0x10,
354 ICE_PROF_TUN_ALL = 0x1E,
355 ICE_PROF_ALL = 0xFF,
356};
357
358/* Number of bits/bytes contained in meta init entry. Note, this should be a
359 * multiple of 32 bits.
360 */
361#define ICE_META_INIT_BITS 192
362#define ICE_META_INIT_DW_CNT (ICE_META_INIT_BITS / (sizeof(__le32) * \
363 BITS_PER_BYTE))
364
365/* The meta init Flag field starts at this bit */
366#define ICE_META_FLAGS_ST 123
367
368/* The entry and bit to check for Double VLAN Mode (DVM) support */
369#define ICE_META_VLAN_MODE_ENTRY 0
370#define ICE_META_FLAG_VLAN_MODE 60
371#define ICE_META_VLAN_MODE_BIT (ICE_META_FLAGS_ST + \
372 ICE_META_FLAG_VLAN_MODE)
373
374struct ice_meta_init_entry {
375 __le32 bm[ICE_META_INIT_DW_CNT];
376};
377
378struct ice_meta_init_section {
379 __le16 count;
380 __le16 offset;
381 struct ice_meta_init_entry entry;
382};
383#endif /* _ICE_FLEX_TYPE_H_ */
384

source code of linux/drivers/net/ethernet/intel/ice/ice_flex_type.h