1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* Copyright(c) 2009 - 2018 Intel Corporation. */ |
3 | |
4 | #ifndef _E1000_VF_H_ |
5 | #define _E1000_VF_H_ |
6 | |
7 | #include <linux/pci.h> |
8 | #include <linux/delay.h> |
9 | #include <linux/interrupt.h> |
10 | #include <linux/if_ether.h> |
11 | |
12 | #include "regs.h" |
13 | #include "defines.h" |
14 | |
15 | struct e1000_hw; |
16 | |
17 | #define E1000_DEV_ID_82576_VF 0x10CA |
18 | #define E1000_DEV_ID_I350_VF 0x1520 |
19 | #define E1000_REVISION_0 0 |
20 | #define E1000_REVISION_1 1 |
21 | #define E1000_REVISION_2 2 |
22 | #define E1000_REVISION_3 3 |
23 | #define E1000_REVISION_4 4 |
24 | |
25 | #define E1000_FUNC_0 0 |
26 | #define E1000_FUNC_1 1 |
27 | |
28 | /* Receive Address Register Count |
29 | * Number of high/low register pairs in the RAR. The RAR (Receive Address |
30 | * Registers) holds the directed and multicast addresses that we monitor. |
31 | * These entries are also used for MAC-based filtering. |
32 | */ |
33 | #define E1000_RAR_ENTRIES_VF 1 |
34 | |
35 | /* Receive Descriptor - Advanced */ |
36 | union e1000_adv_rx_desc { |
37 | struct { |
38 | __le64 pkt_addr; /* Packet buffer address */ |
39 | __le64 hdr_addr; /* Header buffer address */ |
40 | } read; |
41 | struct { |
42 | struct { |
43 | union { |
44 | __le32 data; |
45 | struct { |
46 | __le16 pkt_info; /* RSS/Packet type */ |
47 | /* Split Header, hdr buffer length */ |
48 | __le16 hdr_info; |
49 | } ; |
50 | } lo_dword; |
51 | union { |
52 | __le32 ; /* RSS Hash */ |
53 | struct { |
54 | __le16 ip_id; /* IP id */ |
55 | __le16 csum; /* Packet Checksum */ |
56 | } csum_ip; |
57 | } hi_dword; |
58 | } lower; |
59 | struct { |
60 | __le32 status_error; /* ext status/error */ |
61 | __le16 length; /* Packet length */ |
62 | __le16 vlan; /* VLAN tag */ |
63 | } upper; |
64 | } wb; /* writeback */ |
65 | }; |
66 | |
67 | #define E1000_RXDADV_HDRBUFLEN_MASK 0x7FE0 |
68 | #define E1000_RXDADV_HDRBUFLEN_SHIFT 5 |
69 | |
70 | /* Transmit Descriptor - Advanced */ |
71 | union e1000_adv_tx_desc { |
72 | struct { |
73 | __le64 buffer_addr; /* Address of descriptor's data buf */ |
74 | __le32 cmd_type_len; |
75 | __le32 olinfo_status; |
76 | } read; |
77 | struct { |
78 | __le64 rsvd; /* Reserved */ |
79 | __le32 nxtseq_seed; |
80 | __le32 status; |
81 | } wb; |
82 | }; |
83 | |
84 | /* Adv Transmit Descriptor Config Masks */ |
85 | #define E1000_ADVTXD_DTYP_CTXT 0x00200000 /* Advanced Context Descriptor */ |
86 | #define E1000_ADVTXD_DTYP_DATA 0x00300000 /* Advanced Data Descriptor */ |
87 | #define E1000_ADVTXD_DCMD_EOP 0x01000000 /* End of Packet */ |
88 | #define E1000_ADVTXD_DCMD_IFCS 0x02000000 /* Insert FCS (Ethernet CRC) */ |
89 | #define E1000_ADVTXD_DCMD_RS 0x08000000 /* Report Status */ |
90 | #define E1000_ADVTXD_DCMD_DEXT 0x20000000 /* Descriptor extension (1=Adv) */ |
91 | #define E1000_ADVTXD_DCMD_VLE 0x40000000 /* VLAN pkt enable */ |
92 | #define E1000_ADVTXD_DCMD_TSE 0x80000000 /* TCP Seg enable */ |
93 | #define E1000_ADVTXD_PAYLEN_SHIFT 14 /* Adv desc PAYLEN shift */ |
94 | |
95 | /* Context descriptors */ |
96 | struct e1000_adv_tx_context_desc { |
97 | __le32 vlan_macip_lens; |
98 | __le32 seqnum_seed; |
99 | __le32 type_tucmd_mlhl; |
100 | __le32 mss_l4len_idx; |
101 | }; |
102 | |
103 | #define E1000_ADVTXD_MACLEN_SHIFT 9 /* Adv ctxt desc mac len shift */ |
104 | #define E1000_ADVTXD_TUCMD_IPV4 0x00000400 /* IP Packet Type: 1=IPv4 */ |
105 | #define E1000_ADVTXD_TUCMD_L4T_TCP 0x00000800 /* L4 Packet TYPE of TCP */ |
106 | #define E1000_ADVTXD_TUCMD_L4T_SCTP 0x00001000 /* L4 packet TYPE of SCTP */ |
107 | #define E1000_ADVTXD_L4LEN_SHIFT 8 /* Adv ctxt L4LEN shift */ |
108 | #define E1000_ADVTXD_MSS_SHIFT 16 /* Adv ctxt MSS shift */ |
109 | |
110 | enum e1000_mac_type { |
111 | e1000_undefined = 0, |
112 | e1000_vfadapt, |
113 | e1000_vfadapt_i350, |
114 | e1000_num_macs /* List is 1-based, so subtract 1 for true count. */ |
115 | }; |
116 | |
117 | struct e1000_vf_stats { |
118 | u64 base_gprc; |
119 | u64 base_gptc; |
120 | u64 base_gorc; |
121 | u64 base_gotc; |
122 | u64 base_mprc; |
123 | u64 base_gotlbc; |
124 | u64 base_gptlbc; |
125 | u64 base_gorlbc; |
126 | u64 base_gprlbc; |
127 | |
128 | u32 last_gprc; |
129 | u32 last_gptc; |
130 | u32 last_gorc; |
131 | u32 last_gotc; |
132 | u32 last_mprc; |
133 | u32 last_gotlbc; |
134 | u32 last_gptlbc; |
135 | u32 last_gorlbc; |
136 | u32 last_gprlbc; |
137 | |
138 | u64 gprc; |
139 | u64 gptc; |
140 | u64 gorc; |
141 | u64 gotc; |
142 | u64 mprc; |
143 | u64 gotlbc; |
144 | u64 gptlbc; |
145 | u64 gorlbc; |
146 | u64 gprlbc; |
147 | }; |
148 | |
149 | #include "mbx.h" |
150 | |
151 | struct e1000_mac_operations { |
152 | /* Function pointers for the MAC. */ |
153 | s32 (*init_params)(struct e1000_hw *); |
154 | s32 (*check_for_link)(struct e1000_hw *); |
155 | void (*clear_vfta)(struct e1000_hw *); |
156 | s32 (*get_bus_info)(struct e1000_hw *); |
157 | s32 (*get_link_up_info)(struct e1000_hw *, u16 *, u16 *); |
158 | void (*update_mc_addr_list)(struct e1000_hw *, u8 *, u32, u32, u32); |
159 | s32 (*set_uc_addr)(struct e1000_hw *, u32, u8 *); |
160 | s32 (*reset_hw)(struct e1000_hw *); |
161 | s32 (*init_hw)(struct e1000_hw *); |
162 | s32 (*setup_link)(struct e1000_hw *); |
163 | void (*write_vfta)(struct e1000_hw *, u32, u32); |
164 | void (*mta_set)(struct e1000_hw *, u32); |
165 | void (*rar_set)(struct e1000_hw *, u8*, u32); |
166 | s32 (*read_mac_addr)(struct e1000_hw *); |
167 | s32 (*set_vfta)(struct e1000_hw *, u16, bool); |
168 | }; |
169 | |
170 | struct e1000_mac_info { |
171 | struct e1000_mac_operations ops; |
172 | u8 addr[6]; |
173 | u8 perm_addr[6]; |
174 | |
175 | enum e1000_mac_type type; |
176 | |
177 | u16 mta_reg_count; |
178 | u16 rar_entry_count; |
179 | |
180 | bool get_link_status; |
181 | }; |
182 | |
183 | struct e1000_mbx_operations { |
184 | s32 (*init_params)(struct e1000_hw *hw); |
185 | s32 (*read)(struct e1000_hw *, u32 *, u16); |
186 | s32 (*write)(struct e1000_hw *, u32 *, u16); |
187 | s32 (*read_posted)(struct e1000_hw *, u32 *, u16); |
188 | s32 (*write_posted)(struct e1000_hw *, u32 *, u16); |
189 | s32 (*check_for_msg)(struct e1000_hw *); |
190 | s32 (*check_for_ack)(struct e1000_hw *); |
191 | s32 (*check_for_rst)(struct e1000_hw *); |
192 | }; |
193 | |
194 | struct e1000_mbx_stats { |
195 | u32 msgs_tx; |
196 | u32 msgs_rx; |
197 | |
198 | u32 acks; |
199 | u32 reqs; |
200 | u32 rsts; |
201 | }; |
202 | |
203 | struct e1000_mbx_info { |
204 | struct e1000_mbx_operations ops; |
205 | struct e1000_mbx_stats stats; |
206 | u32 timeout; |
207 | u32 usec_delay; |
208 | u16 size; |
209 | }; |
210 | |
211 | struct e1000_dev_spec_vf { |
212 | u32 vf_number; |
213 | u32 v2p_mailbox; |
214 | }; |
215 | |
216 | struct e1000_hw { |
217 | void *back; |
218 | |
219 | u8 __iomem *hw_addr; |
220 | u8 __iomem *flash_address; |
221 | unsigned long io_base; |
222 | |
223 | struct e1000_mac_info mac; |
224 | struct e1000_mbx_info mbx; |
225 | spinlock_t mbx_lock; /* serializes mailbox ops */ |
226 | |
227 | union { |
228 | struct e1000_dev_spec_vf vf; |
229 | } dev_spec; |
230 | |
231 | u16 device_id; |
232 | u16 subsystem_vendor_id; |
233 | u16 subsystem_device_id; |
234 | u16 vendor_id; |
235 | |
236 | u8 revision_id; |
237 | }; |
238 | |
239 | /* These functions must be implemented by drivers */ |
240 | void e1000_rlpml_set_vf(struct e1000_hw *, u16); |
241 | void e1000_init_function_pointers_vf(struct e1000_hw *hw); |
242 | |
243 | #endif /* _E1000_VF_H_ */ |
244 | |