1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | |
3 | /* |
4 | * This file provides wrappers with sanitizer instrumentation for bit |
5 | * locking operations. |
6 | * |
7 | * To use this functionality, an arch's bitops.h file needs to define each of |
8 | * the below bit operations with an arch_ prefix (e.g. arch_set_bit(), |
9 | * arch___set_bit(), etc.). |
10 | */ |
11 | #ifndef _ASM_GENERIC_BITOPS_INSTRUMENTED_LOCK_H |
12 | #define _ASM_GENERIC_BITOPS_INSTRUMENTED_LOCK_H |
13 | |
14 | #include <linux/instrumented.h> |
15 | |
16 | /** |
17 | * clear_bit_unlock - Clear a bit in memory, for unlock |
18 | * @nr: the bit to set |
19 | * @addr: the address to start counting from |
20 | * |
21 | * This operation is atomic and provides release barrier semantics. |
22 | */ |
23 | static inline void clear_bit_unlock(long nr, volatile unsigned long *addr) |
24 | { |
25 | kcsan_release(); |
26 | instrument_atomic_write(v: addr + BIT_WORD(nr), size: sizeof(long)); |
27 | arch_clear_bit_unlock(nr, addr); |
28 | } |
29 | |
30 | /** |
31 | * __clear_bit_unlock - Clears a bit in memory |
32 | * @nr: Bit to clear |
33 | * @addr: Address to start counting from |
34 | * |
35 | * This is a non-atomic operation but implies a release barrier before the |
36 | * memory operation. It can be used for an unlock if no other CPUs can |
37 | * concurrently modify other bits in the word. |
38 | */ |
39 | static inline void __clear_bit_unlock(long nr, volatile unsigned long *addr) |
40 | { |
41 | kcsan_release(); |
42 | instrument_write(v: addr + BIT_WORD(nr), size: sizeof(long)); |
43 | arch___clear_bit_unlock(nr, addr); |
44 | } |
45 | |
46 | /** |
47 | * test_and_set_bit_lock - Set a bit and return its old value, for lock |
48 | * @nr: Bit to set |
49 | * @addr: Address to count from |
50 | * |
51 | * This operation is atomic and provides acquire barrier semantics if |
52 | * the returned value is 0. |
53 | * It can be used to implement bit locks. |
54 | */ |
55 | static inline bool test_and_set_bit_lock(long nr, volatile unsigned long *addr) |
56 | { |
57 | instrument_atomic_read_write(v: addr + BIT_WORD(nr), size: sizeof(long)); |
58 | return arch_test_and_set_bit_lock(nr, addr); |
59 | } |
60 | |
61 | /** |
62 | * xor_unlock_is_negative_byte - XOR a single byte in memory and test if |
63 | * it is negative, for unlock. |
64 | * @mask: Change the bits which are set in this mask. |
65 | * @addr: The address of the word containing the byte to change. |
66 | * |
67 | * Changes some of bits 0-6 in the word pointed to by @addr. |
68 | * This operation is atomic and provides release barrier semantics. |
69 | * Used to optimise some folio operations which are commonly paired |
70 | * with an unlock or end of writeback. Bit 7 is used as PG_waiters to |
71 | * indicate whether anybody is waiting for the unlock. |
72 | * |
73 | * Return: Whether the top bit of the byte is set. |
74 | */ |
75 | static inline bool xor_unlock_is_negative_byte(unsigned long mask, |
76 | volatile unsigned long *addr) |
77 | { |
78 | kcsan_release(); |
79 | instrument_atomic_write(v: addr, size: sizeof(long)); |
80 | return arch_xor_unlock_is_negative_byte(mask, addr); |
81 | } |
82 | #endif /* _ASM_GENERIC_BITOPS_INSTRUMENTED_LOCK_H */ |
83 | |