1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | #ifndef _LINUX_CACHEINFO_H |
3 | #define _LINUX_CACHEINFO_H |
4 | |
5 | #include <linux/bitops.h> |
6 | #include <linux/cpumask.h> |
7 | #include <linux/smp.h> |
8 | |
9 | struct device_node; |
10 | struct attribute; |
11 | |
12 | enum cache_type { |
13 | CACHE_TYPE_NOCACHE = 0, |
14 | CACHE_TYPE_INST = BIT(0), |
15 | CACHE_TYPE_DATA = BIT(1), |
16 | CACHE_TYPE_SEPARATE = CACHE_TYPE_INST | CACHE_TYPE_DATA, |
17 | CACHE_TYPE_UNIFIED = BIT(2), |
18 | }; |
19 | |
20 | extern unsigned int coherency_max_size; |
21 | |
22 | /** |
23 | * struct cacheinfo - represent a cache leaf node |
24 | * @id: This cache's id. It is unique among caches with the same (type, level). |
25 | * @type: type of the cache - data, inst or unified |
26 | * @level: represents the hierarchy in the multi-level cache |
27 | * @coherency_line_size: size of each cache line usually representing |
28 | * the minimum amount of data that gets transferred from memory |
29 | * @number_of_sets: total number of sets, a set is a collection of cache |
30 | * lines sharing the same index |
31 | * @ways_of_associativity: number of ways in which a particular memory |
32 | * block can be placed in the cache |
33 | * @physical_line_partition: number of physical cache lines sharing the |
34 | * same cachetag |
35 | * @size: Total size of the cache |
36 | * @shared_cpu_map: logical cpumask representing all the cpus sharing |
37 | * this cache node |
38 | * @attributes: bitfield representing various cache attributes |
39 | * @fw_token: Unique value used to determine if different cacheinfo |
40 | * structures represent a single hardware cache instance. |
41 | * @disable_sysfs: indicates whether this node is visible to the user via |
42 | * sysfs or not |
43 | * @priv: pointer to any private data structure specific to particular |
44 | * cache design |
45 | * |
46 | * While @of_node, @disable_sysfs and @priv are used for internal book |
47 | * keeping, the remaining members form the core properties of the cache |
48 | */ |
49 | struct cacheinfo { |
50 | unsigned int id; |
51 | enum cache_type type; |
52 | unsigned int level; |
53 | unsigned int coherency_line_size; |
54 | unsigned int number_of_sets; |
55 | unsigned int ways_of_associativity; |
56 | unsigned int physical_line_partition; |
57 | unsigned int size; |
58 | cpumask_t shared_cpu_map; |
59 | unsigned int attributes; |
60 | #define CACHE_WRITE_THROUGH BIT(0) |
61 | #define CACHE_WRITE_BACK BIT(1) |
62 | #define CACHE_WRITE_POLICY_MASK \ |
63 | (CACHE_WRITE_THROUGH | CACHE_WRITE_BACK) |
64 | #define CACHE_READ_ALLOCATE BIT(2) |
65 | #define CACHE_WRITE_ALLOCATE BIT(3) |
66 | #define CACHE_ALLOCATE_POLICY_MASK \ |
67 | (CACHE_READ_ALLOCATE | CACHE_WRITE_ALLOCATE) |
68 | #define CACHE_ID BIT(4) |
69 | void *fw_token; |
70 | bool disable_sysfs; |
71 | void *priv; |
72 | }; |
73 | |
74 | struct cpu_cacheinfo { |
75 | struct cacheinfo *info_list; |
76 | unsigned int per_cpu_data_slice_size; |
77 | unsigned int num_levels; |
78 | unsigned int num_leaves; |
79 | bool cpu_map_populated; |
80 | bool early_ci_levels; |
81 | }; |
82 | |
83 | struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu); |
84 | int early_cache_level(unsigned int cpu); |
85 | int init_cache_level(unsigned int cpu); |
86 | int init_of_cache_level(unsigned int cpu); |
87 | int populate_cache_leaves(unsigned int cpu); |
88 | int cache_setup_acpi(unsigned int cpu); |
89 | bool last_level_cache_is_valid(unsigned int cpu); |
90 | bool last_level_cache_is_shared(unsigned int cpu_x, unsigned int cpu_y); |
91 | int fetch_cache_info(unsigned int cpu); |
92 | int detect_cache_attributes(unsigned int cpu); |
93 | #ifndef CONFIG_ACPI_PPTT |
94 | /* |
95 | * acpi_get_cache_info() is only called on ACPI enabled |
96 | * platforms using the PPTT for topology. This means that if |
97 | * the platform supports other firmware configuration methods |
98 | * we need to stub out the call when ACPI is disabled. |
99 | * ACPI enabled platforms not using PPTT won't be making calls |
100 | * to this function so we need not worry about them. |
101 | */ |
102 | static inline |
103 | int acpi_get_cache_info(unsigned int cpu, |
104 | unsigned int *levels, unsigned int *split_levels) |
105 | { |
106 | return -ENOENT; |
107 | } |
108 | #else |
109 | int acpi_get_cache_info(unsigned int cpu, |
110 | unsigned int *levels, unsigned int *split_levels); |
111 | #endif |
112 | |
113 | const struct attribute_group *cache_get_priv_group(struct cacheinfo *this_leaf); |
114 | |
115 | /* |
116 | * Get the id of the cache associated with @cpu at level @level. |
117 | * cpuhp lock must be held. |
118 | */ |
119 | static inline int get_cpu_cacheinfo_id(int cpu, int level) |
120 | { |
121 | struct cpu_cacheinfo *ci = get_cpu_cacheinfo(cpu); |
122 | int i; |
123 | |
124 | for (i = 0; i < ci->num_leaves; i++) { |
125 | if (ci->info_list[i].level == level) { |
126 | if (ci->info_list[i].attributes & CACHE_ID) |
127 | return ci->info_list[i].id; |
128 | return -1; |
129 | } |
130 | } |
131 | |
132 | return -1; |
133 | } |
134 | |
135 | #ifdef CONFIG_ARM64 |
136 | #define use_arch_cache_info() (true) |
137 | #else |
138 | #define use_arch_cache_info() (false) |
139 | #endif |
140 | |
141 | #endif /* _LINUX_CACHEINFO_H */ |
142 | |