1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | #ifndef __LIS3LV02D_H_ |
3 | #define __LIS3LV02D_H_ |
4 | |
5 | /** |
6 | * struct lis3lv02d_platform_data - lis3 chip family platform data |
7 | * @click_flags: Click detection unit configuration |
8 | * @click_thresh_x: Click detection unit x axis threshold |
9 | * @click_thresh_y: Click detection unit y axis threshold |
10 | * @click_thresh_z: Click detection unit z axis threshold |
11 | * @click_time_limit: Click detection unit time parameter |
12 | * @click_latency: Click detection unit latency parameter |
13 | * @click_window: Click detection unit window parameter |
14 | * @irq_cfg: On chip irq source and type configuration (click / |
15 | * data available / wake up, open drain, polarity) |
16 | * @irq_flags1: Additional irq triggering flags for irq channel 0 |
17 | * @irq_flags2: Additional irq triggering flags for irq channel 1 |
18 | * @duration1: Wake up unit 1 duration parameter |
19 | * @duration2: Wake up unit 2 duration parameter |
20 | * @wakeup_flags: Wake up unit 1 flags |
21 | * @wakeup_thresh: Wake up unit 1 threshold value |
22 | * @wakeup_flags2: Wake up unit 2 flags |
23 | * @wakeup_thresh2: Wake up unit 2 threshold value |
24 | * @hipass_ctrl: High pass filter control (enable / disable, cut off |
25 | * frequency) |
26 | * @axis_x: Sensor orientation remapping for x-axis |
27 | * @axis_y: Sensor orientation remapping for y-axis |
28 | * @axis_z: Sensor orientation remapping for z-axis |
29 | * @driver_features: Enable bits for different features. Disabled by default |
30 | * @default_rate: Default sampling rate. 0 means reset default |
31 | * @setup_resources: Interrupt line setup call back function |
32 | * @release_resources: Interrupt line release call back function |
33 | * @st_min_limits[3]: Selftest acceptance minimum values |
34 | * @st_max_limits[3]: Selftest acceptance maximum values |
35 | * @irq2: Irq line 2 number |
36 | * |
37 | * Platform data is used to setup the sensor chip. Meaning of the different |
38 | * chip features can be found from the data sheet. It is publicly available |
39 | * at www.st.com web pages. Currently the platform data is used |
40 | * only for the 8 bit device. The 8 bit device has two wake up / free fall |
41 | * detection units and click detection unit. There are plenty of ways to |
42 | * configure the chip which makes is quite hard to explain deeper meaning of |
43 | * the fields here. Behaviour of the detection blocks varies heavily depending |
44 | * on the configuration. For example, interrupt detection block can use high |
45 | * pass filtered data which makes it react to the changes in the acceleration. |
46 | * Irq_flags can be used to enable interrupt detection on the both edges. |
47 | * With proper chip configuration this produces interrupt when some trigger |
48 | * starts and when it goes away. |
49 | */ |
50 | |
51 | struct lis3lv02d_platform_data { |
52 | /* please note: the 'click' feature is only supported for |
53 | * LIS[32]02DL variants of the chip and will be ignored for |
54 | * others */ |
55 | #define LIS3_CLICK_SINGLE_X (1 << 0) |
56 | #define LIS3_CLICK_DOUBLE_X (1 << 1) |
57 | #define LIS3_CLICK_SINGLE_Y (1 << 2) |
58 | #define LIS3_CLICK_DOUBLE_Y (1 << 3) |
59 | #define LIS3_CLICK_SINGLE_Z (1 << 4) |
60 | #define LIS3_CLICK_DOUBLE_Z (1 << 5) |
61 | unsigned char click_flags; |
62 | unsigned char click_thresh_x; |
63 | unsigned char click_thresh_y; |
64 | unsigned char click_thresh_z; |
65 | unsigned char click_time_limit; |
66 | unsigned char click_latency; |
67 | unsigned char click_window; |
68 | |
69 | #define LIS3_IRQ1_DISABLE (0 << 0) |
70 | #define LIS3_IRQ1_FF_WU_1 (1 << 0) |
71 | #define LIS3_IRQ1_FF_WU_2 (2 << 0) |
72 | #define LIS3_IRQ1_FF_WU_12 (3 << 0) |
73 | #define LIS3_IRQ1_DATA_READY (4 << 0) |
74 | #define LIS3_IRQ1_CLICK (7 << 0) |
75 | #define LIS3_IRQ1_MASK (7 << 0) |
76 | #define LIS3_IRQ2_DISABLE (0 << 3) |
77 | #define LIS3_IRQ2_FF_WU_1 (1 << 3) |
78 | #define LIS3_IRQ2_FF_WU_2 (2 << 3) |
79 | #define LIS3_IRQ2_FF_WU_12 (3 << 3) |
80 | #define LIS3_IRQ2_DATA_READY (4 << 3) |
81 | #define LIS3_IRQ2_CLICK (7 << 3) |
82 | #define LIS3_IRQ2_MASK (7 << 3) |
83 | #define LIS3_IRQ_OPEN_DRAIN (1 << 6) |
84 | #define LIS3_IRQ_ACTIVE_LOW (1 << 7) |
85 | unsigned char irq_cfg; |
86 | unsigned char irq_flags1; /* Additional irq edge / level flags */ |
87 | unsigned char irq_flags2; /* Additional irq edge / level flags */ |
88 | unsigned char duration1; |
89 | unsigned char duration2; |
90 | #define LIS3_WAKEUP_X_LO (1 << 0) |
91 | #define LIS3_WAKEUP_X_HI (1 << 1) |
92 | #define LIS3_WAKEUP_Y_LO (1 << 2) |
93 | #define LIS3_WAKEUP_Y_HI (1 << 3) |
94 | #define LIS3_WAKEUP_Z_LO (1 << 4) |
95 | #define LIS3_WAKEUP_Z_HI (1 << 5) |
96 | unsigned char wakeup_flags; |
97 | unsigned char wakeup_thresh; |
98 | unsigned char wakeup_flags2; |
99 | unsigned char wakeup_thresh2; |
100 | #define LIS3_HIPASS_CUTFF_8HZ 0 |
101 | #define LIS3_HIPASS_CUTFF_4HZ 1 |
102 | #define LIS3_HIPASS_CUTFF_2HZ 2 |
103 | #define LIS3_HIPASS_CUTFF_1HZ 3 |
104 | #define LIS3_HIPASS1_DISABLE (1 << 2) |
105 | #define LIS3_HIPASS2_DISABLE (1 << 3) |
106 | unsigned char hipass_ctrl; |
107 | #define LIS3_NO_MAP 0 |
108 | #define LIS3_DEV_X 1 |
109 | #define LIS3_DEV_Y 2 |
110 | #define LIS3_DEV_Z 3 |
111 | #define LIS3_INV_DEV_X -1 |
112 | #define LIS3_INV_DEV_Y -2 |
113 | #define LIS3_INV_DEV_Z -3 |
114 | s8 axis_x; |
115 | s8 axis_y; |
116 | s8 axis_z; |
117 | #define LIS3_USE_BLOCK_READ 0x02 |
118 | u16 driver_features; |
119 | int default_rate; |
120 | int (*setup_resources)(void); |
121 | int (*release_resources)(void); |
122 | /* Limits for selftest are specified in chip data sheet */ |
123 | s16 st_min_limits[3]; /* min pass limit x, y, z */ |
124 | s16 st_max_limits[3]; /* max pass limit x, y, z */ |
125 | int irq2; |
126 | }; |
127 | |
128 | #endif /* __LIS3LV02D_H_ */ |
129 | |