| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
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| 2 | /* |
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| 3 | * include/linux/micrel_phy.h |
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| 4 | * |
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| 5 | * Micrel PHY IDs |
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| 6 | */ |
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| 7 | |
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| 8 | #ifndef _MICREL_PHY_H |
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| 9 | #define _MICREL_PHY_H |
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| 10 | |
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| 11 | #define MICREL_OUI 0x0885 |
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| 12 | |
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| 13 | #define MICREL_PHY_ID_MASK 0x00fffff0 |
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| 14 | |
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| 15 | #define PHY_ID_KSZ8873MLL 0x000e7237 |
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| 16 | #define PHY_ID_KSZ9021 0x00221610 |
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| 17 | #define PHY_ID_KSZ9021RLRN 0x00221611 |
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| 18 | #define PHY_ID_KS8737 0x00221720 |
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| 19 | #define PHY_ID_KSZ8021 0x00221555 |
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| 20 | #define PHY_ID_KSZ8031 0x00221556 |
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| 21 | #define PHY_ID_KSZ8041 0x00221510 |
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| 22 | /* undocumented */ |
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| 23 | #define PHY_ID_KSZ8041RNLI 0x00221537 |
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| 24 | #define PHY_ID_KSZ8051 0x00221550 |
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| 25 | /* same id: ks8001 Rev. A/B, and ks8721 Rev 3. */ |
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| 26 | #define PHY_ID_KSZ8001 0x0022161A |
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| 27 | /* same id: KS8081, KS8091 */ |
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| 28 | #define PHY_ID_KSZ8081 0x00221560 |
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| 29 | #define PHY_ID_KSZ8061 0x00221570 |
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| 30 | #define PHY_ID_KSZ9031 0x00221620 |
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| 31 | #define PHY_ID_KSZ9131 0x00221640 |
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| 32 | #define PHY_ID_LAN8814 0x00221660 |
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| 33 | #define PHY_ID_LAN8804 0x00221670 |
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| 34 | #define PHY_ID_LAN8841 0x00221650 |
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| 35 | |
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| 36 | #define PHY_ID_KSZ886X 0x00221430 |
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| 37 | #define PHY_ID_KSZ8863 0x00221435 |
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| 38 | |
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| 39 | #define PHY_ID_KSZ87XX 0x00221550 |
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| 40 | |
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| 41 | #define PHY_ID_KSZ9477 0x00221631 |
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| 42 | |
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| 43 | /* struct phy_device dev_flags definitions */ |
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| 44 | #define MICREL_PHY_50MHZ_CLK BIT(0) |
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| 45 | #define MICREL_PHY_FXEN BIT(1) |
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| 46 | #define MICREL_KSZ8_P1_ERRATA BIT(2) |
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| 47 | #define MICREL_NO_EEE BIT(3) |
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| 48 | |
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| 49 | #define MICREL_KSZ9021_EXTREG_CTRL 0xB |
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| 50 | #define MICREL_KSZ9021_EXTREG_DATA_WRITE 0xC |
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| 51 | #define MICREL_KSZ9021_RGMII_CLK_CTRL_PAD_SCEW 0x104 |
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| 52 | #define MICREL_KSZ9021_RGMII_RX_DATA_PAD_SCEW 0x105 |
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| 53 | |
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| 54 | /* Device specific MII_BMCR (Reg 0) bits */ |
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| 55 | /* 1 = HP Auto MDI/MDI-X mode, 0 = Microchip Auto MDI/MDI-X mode */ |
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| 56 | #define KSZ886X_BMCR_HP_MDIX BIT(5) |
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| 57 | /* 1 = Force MDI (transmit on RXP/RXM pins), 0 = Normal operation |
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| 58 | * (transmit on TXP/TXM pins) |
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| 59 | */ |
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| 60 | #define KSZ886X_BMCR_FORCE_MDI BIT(4) |
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| 61 | /* 1 = Disable auto MDI-X */ |
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| 62 | #define KSZ886X_BMCR_DISABLE_AUTO_MDIX BIT(3) |
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| 63 | #define KSZ886X_BMCR_DISABLE_FAR_END_FAULT BIT(2) |
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| 64 | #define KSZ886X_BMCR_DISABLE_TRANSMIT BIT(1) |
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| 65 | #define KSZ886X_BMCR_DISABLE_LED BIT(0) |
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| 66 | |
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| 67 | /* PHY Special Control/Status Register (Reg 31) */ |
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| 68 | #define KSZ886X_CTRL_MDIX_STAT BIT(4) |
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| 69 | #define KSZ886X_CTRL_FORCE_LINK BIT(3) |
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| 70 | #define KSZ886X_CTRL_PWRSAVE BIT(2) |
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| 71 | #define KSZ886X_CTRL_REMOTE_LOOPBACK BIT(1) |
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| 72 | |
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| 73 | #endif /* _MICREL_PHY_H */ |
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| 74 | |
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