1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Framework and drivers for configuring and reading different PHYs
4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 */
10
11#ifndef __PHY_H
12#define __PHY_H
13
14#include <linux/compiler.h>
15#include <linux/spinlock.h>
16#include <linux/ethtool.h>
17#include <linux/linkmode.h>
18#include <linux/netlink.h>
19#include <linux/mdio.h>
20#include <linux/mii.h>
21#include <linux/mii_timestamper.h>
22#include <linux/module.h>
23#include <linux/timer.h>
24#include <linux/workqueue.h>
25#include <linux/mod_devicetable.h>
26#include <linux/u64_stats_sync.h>
27#include <linux/irqreturn.h>
28#include <linux/iopoll.h>
29#include <linux/refcount.h>
30
31#include <linux/atomic.h>
32
33#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
34 SUPPORTED_TP | \
35 SUPPORTED_MII)
36
37#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
38 SUPPORTED_10baseT_Full)
39
40#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
41 SUPPORTED_100baseT_Full)
42
43#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
44 SUPPORTED_1000baseT_Full)
45
46extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
47extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
48extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
49extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
50extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
51extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
52extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
53extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
54
55#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
56#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
57#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
58#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
59#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
60#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
61#define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
62#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
63
64extern const int phy_basic_ports_array[3];
65extern const int phy_fibre_port_array[1];
66extern const int phy_all_ports_features_array[7];
67extern const int phy_10_100_features_array[4];
68extern const int phy_basic_t1_features_array[3];
69extern const int phy_gbit_features_array[2];
70extern const int phy_10gbit_features_array[1];
71
72/*
73 * Set phydev->irq to PHY_POLL if interrupts are not supported,
74 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if
75 * the attached MAC driver handles the interrupt
76 */
77#define PHY_POLL -1
78#define PHY_MAC_INTERRUPT -2
79
80#define PHY_IS_INTERNAL 0x00000001
81#define PHY_RST_AFTER_CLK_EN 0x00000002
82#define PHY_POLL_CABLE_TEST 0x00000004
83#define MDIO_DEVICE_IS_PHY 0x80000000
84
85/**
86 * enum phy_interface_t - Interface Mode definitions
87 *
88 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
89 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined
90 * @PHY_INTERFACE_MODE_MII: Media-independent interface
91 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface
92 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
93 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface
94 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface
95 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface
96 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role
97 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
98 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay
99 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay
100 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay
101 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI
102 * @PHY_INTERFACE_MODE_SMII: Serial MII
103 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
104 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
105 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
106 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
107 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
108 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX
109 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
110 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
111 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR
112 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
113 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface
114 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR
115 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR
116 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII
117 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
118 * @PHY_INTERFACE_MODE_MAX: Book keeping
119 *
120 * Describes the interface between the MAC and PHY.
121 */
122typedef enum {
123 PHY_INTERFACE_MODE_NA,
124 PHY_INTERFACE_MODE_INTERNAL,
125 PHY_INTERFACE_MODE_MII,
126 PHY_INTERFACE_MODE_GMII,
127 PHY_INTERFACE_MODE_SGMII,
128 PHY_INTERFACE_MODE_TBI,
129 PHY_INTERFACE_MODE_REVMII,
130 PHY_INTERFACE_MODE_RMII,
131 PHY_INTERFACE_MODE_REVRMII,
132 PHY_INTERFACE_MODE_RGMII,
133 PHY_INTERFACE_MODE_RGMII_ID,
134 PHY_INTERFACE_MODE_RGMII_RXID,
135 PHY_INTERFACE_MODE_RGMII_TXID,
136 PHY_INTERFACE_MODE_RTBI,
137 PHY_INTERFACE_MODE_SMII,
138 PHY_INTERFACE_MODE_XGMII,
139 PHY_INTERFACE_MODE_XLGMII,
140 PHY_INTERFACE_MODE_MOCA,
141 PHY_INTERFACE_MODE_QSGMII,
142 PHY_INTERFACE_MODE_TRGMII,
143 PHY_INTERFACE_MODE_100BASEX,
144 PHY_INTERFACE_MODE_1000BASEX,
145 PHY_INTERFACE_MODE_2500BASEX,
146 PHY_INTERFACE_MODE_5GBASER,
147 PHY_INTERFACE_MODE_RXAUI,
148 PHY_INTERFACE_MODE_XAUI,
149 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
150 PHY_INTERFACE_MODE_10GBASER,
151 PHY_INTERFACE_MODE_25GBASER,
152 PHY_INTERFACE_MODE_USXGMII,
153 /* 10GBASE-KR - with Clause 73 AN */
154 PHY_INTERFACE_MODE_10GKR,
155 PHY_INTERFACE_MODE_MAX,
156} phy_interface_t;
157
158/* PHY interface mode bitmap handling */
159#define DECLARE_PHY_INTERFACE_MASK(name) \
160 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX)
161
162static inline void phy_interface_zero(unsigned long *intf)
163{
164 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX);
165}
166
167static inline bool phy_interface_empty(const unsigned long *intf)
168{
169 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX);
170}
171
172static inline void phy_interface_and(unsigned long *dst, const unsigned long *a,
173 const unsigned long *b)
174{
175 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX);
176}
177
178static inline void phy_interface_or(unsigned long *dst, const unsigned long *a,
179 const unsigned long *b)
180{
181 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX);
182}
183
184static inline void phy_interface_set_rgmii(unsigned long *intf)
185{
186 __set_bit(PHY_INTERFACE_MODE_RGMII, intf);
187 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf);
188 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf);
189 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf);
190}
191
192/*
193 * phy_supported_speeds - return all speeds currently supported by a PHY device
194 */
195unsigned int phy_supported_speeds(struct phy_device *phy,
196 unsigned int *speeds,
197 unsigned int size);
198
199/**
200 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
201 * @interface: enum phy_interface_t value
202 *
203 * Description: maps enum &phy_interface_t defined in this file
204 * into the device tree binding of 'phy-mode', so that Ethernet
205 * device driver can get PHY interface from device tree.
206 */
207static inline const char *phy_modes(phy_interface_t interface)
208{
209 switch (interface) {
210 case PHY_INTERFACE_MODE_NA:
211 return "";
212 case PHY_INTERFACE_MODE_INTERNAL:
213 return "internal";
214 case PHY_INTERFACE_MODE_MII:
215 return "mii";
216 case PHY_INTERFACE_MODE_GMII:
217 return "gmii";
218 case PHY_INTERFACE_MODE_SGMII:
219 return "sgmii";
220 case PHY_INTERFACE_MODE_TBI:
221 return "tbi";
222 case PHY_INTERFACE_MODE_REVMII:
223 return "rev-mii";
224 case PHY_INTERFACE_MODE_RMII:
225 return "rmii";
226 case PHY_INTERFACE_MODE_REVRMII:
227 return "rev-rmii";
228 case PHY_INTERFACE_MODE_RGMII:
229 return "rgmii";
230 case PHY_INTERFACE_MODE_RGMII_ID:
231 return "rgmii-id";
232 case PHY_INTERFACE_MODE_RGMII_RXID:
233 return "rgmii-rxid";
234 case PHY_INTERFACE_MODE_RGMII_TXID:
235 return "rgmii-txid";
236 case PHY_INTERFACE_MODE_RTBI:
237 return "rtbi";
238 case PHY_INTERFACE_MODE_SMII:
239 return "smii";
240 case PHY_INTERFACE_MODE_XGMII:
241 return "xgmii";
242 case PHY_INTERFACE_MODE_XLGMII:
243 return "xlgmii";
244 case PHY_INTERFACE_MODE_MOCA:
245 return "moca";
246 case PHY_INTERFACE_MODE_QSGMII:
247 return "qsgmii";
248 case PHY_INTERFACE_MODE_TRGMII:
249 return "trgmii";
250 case PHY_INTERFACE_MODE_1000BASEX:
251 return "1000base-x";
252 case PHY_INTERFACE_MODE_2500BASEX:
253 return "2500base-x";
254 case PHY_INTERFACE_MODE_5GBASER:
255 return "5gbase-r";
256 case PHY_INTERFACE_MODE_RXAUI:
257 return "rxaui";
258 case PHY_INTERFACE_MODE_XAUI:
259 return "xaui";
260 case PHY_INTERFACE_MODE_10GBASER:
261 return "10gbase-r";
262 case PHY_INTERFACE_MODE_25GBASER:
263 return "25gbase-r";
264 case PHY_INTERFACE_MODE_USXGMII:
265 return "usxgmii";
266 case PHY_INTERFACE_MODE_10GKR:
267 return "10gbase-kr";
268 case PHY_INTERFACE_MODE_100BASEX:
269 return "100base-x";
270 default:
271 return "unknown";
272 }
273}
274
275
276#define PHY_INIT_TIMEOUT 100000
277#define PHY_FORCE_TIMEOUT 10
278
279#define PHY_MAX_ADDR 32
280
281/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
282#define PHY_ID_FMT "%s:%02x"
283
284#define MII_BUS_ID_SIZE 61
285
286struct device;
287struct phylink;
288struct sfp_bus;
289struct sfp_upstream_ops;
290struct sk_buff;
291
292/**
293 * struct mdio_bus_stats - Statistics counters for MDIO busses
294 * @transfers: Total number of transfers, i.e. @writes + @reads
295 * @errors: Number of MDIO transfers that returned an error
296 * @writes: Number of write transfers
297 * @reads: Number of read transfers
298 * @syncp: Synchronisation for incrementing statistics
299 */
300struct mdio_bus_stats {
301 u64_stats_t transfers;
302 u64_stats_t errors;
303 u64_stats_t writes;
304 u64_stats_t reads;
305 /* Must be last, add new statistics above */
306 struct u64_stats_sync syncp;
307};
308
309/**
310 * struct phy_package_shared - Shared information in PHY packages
311 * @addr: Common PHY address used to combine PHYs in one package
312 * @refcnt: Number of PHYs connected to this shared data
313 * @flags: Initialization of PHY package
314 * @priv_size: Size of the shared private data @priv
315 * @priv: Driver private data shared across a PHY package
316 *
317 * Represents a shared structure between different phydev's in the same
318 * package, for example a quad PHY. See phy_package_join() and
319 * phy_package_leave().
320 */
321struct phy_package_shared {
322 int addr;
323 refcount_t refcnt;
324 unsigned long flags;
325 size_t priv_size;
326
327 /* private data pointer */
328 /* note that this pointer is shared between different phydevs and
329 * the user has to take care of appropriate locking. It is allocated
330 * and freed automatically by phy_package_join() and
331 * phy_package_leave().
332 */
333 void *priv;
334};
335
336/* used as bit number in atomic bitops */
337#define PHY_SHARED_F_INIT_DONE 0
338#define PHY_SHARED_F_PROBE_DONE 1
339
340/**
341 * struct mii_bus - Represents an MDIO bus
342 *
343 * @owner: Who owns this device
344 * @name: User friendly name for this MDIO device, or driver name
345 * @id: Unique identifier for this bus, typical from bus hierarchy
346 * @priv: Driver private data
347 *
348 * The Bus class for PHYs. Devices which provide access to
349 * PHYs should register using this structure
350 */
351struct mii_bus {
352 struct module *owner;
353 const char *name;
354 char id[MII_BUS_ID_SIZE];
355 void *priv;
356 /** @read: Perform a read transfer on the bus */
357 int (*read)(struct mii_bus *bus, int addr, int regnum);
358 /** @write: Perform a write transfer on the bus */
359 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
360 /** @reset: Perform a reset of the bus */
361 int (*reset)(struct mii_bus *bus);
362
363 /** @stats: Statistic counters per device on the bus */
364 struct mdio_bus_stats stats[PHY_MAX_ADDR];
365
366 /**
367 * @mdio_lock: A lock to ensure that only one thing can read/write
368 * the MDIO bus at a time
369 */
370 struct mutex mdio_lock;
371
372 /** @parent: Parent device of this bus */
373 struct device *parent;
374 /** @state: State of bus structure */
375 enum {
376 MDIOBUS_ALLOCATED = 1,
377 MDIOBUS_REGISTERED,
378 MDIOBUS_UNREGISTERED,
379 MDIOBUS_RELEASED,
380 } state;
381
382 /** @dev: Kernel device representation */
383 struct device dev;
384
385 /** @mdio_map: list of all MDIO devices on bus */
386 struct mdio_device *mdio_map[PHY_MAX_ADDR];
387
388 /** @phy_mask: PHY addresses to be ignored when probing */
389 u32 phy_mask;
390
391 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */
392 u32 phy_ignore_ta_mask;
393
394 /**
395 * @irq: An array of interrupts, each PHY's interrupt at the index
396 * matching its address
397 */
398 int irq[PHY_MAX_ADDR];
399
400 /** @reset_delay_us: GPIO reset pulse width in microseconds */
401 int reset_delay_us;
402 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */
403 int reset_post_delay_us;
404 /** @reset_gpiod: Reset GPIO descriptor pointer */
405 struct gpio_desc *reset_gpiod;
406
407 /** @probe_capabilities: bus capabilities, used for probing */
408 enum {
409 MDIOBUS_NO_CAP = 0,
410 MDIOBUS_C22,
411 MDIOBUS_C45,
412 MDIOBUS_C22_C45,
413 } probe_capabilities;
414
415 /** @shared_lock: protect access to the shared element */
416 struct mutex shared_lock;
417
418 /** @shared: shared state across different PHYs */
419 struct phy_package_shared *shared[PHY_MAX_ADDR];
420};
421#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
422
423struct mii_bus *mdiobus_alloc_size(size_t size);
424
425/**
426 * mdiobus_alloc - Allocate an MDIO bus structure
427 *
428 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready
429 * for the driver to register the bus.
430 */
431static inline struct mii_bus *mdiobus_alloc(void)
432{
433 return mdiobus_alloc_size(0);
434}
435
436int __mdiobus_register(struct mii_bus *bus, struct module *owner);
437int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus,
438 struct module *owner);
439#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
440#define devm_mdiobus_register(dev, bus) \
441 __devm_mdiobus_register(dev, bus, THIS_MODULE)
442
443void mdiobus_unregister(struct mii_bus *bus);
444void mdiobus_free(struct mii_bus *bus);
445struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
446static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
447{
448 return devm_mdiobus_alloc_size(dev, 0);
449}
450
451struct mii_bus *mdio_find_bus(const char *mdio_name);
452struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
453
454#define PHY_INTERRUPT_DISABLED false
455#define PHY_INTERRUPT_ENABLED true
456
457/**
458 * enum phy_state - PHY state machine states:
459 *
460 * @PHY_DOWN: PHY device and driver are not ready for anything. probe
461 * should be called if and only if the PHY is in this state,
462 * given that the PHY device exists.
463 * - PHY driver probe function will set the state to @PHY_READY
464 *
465 * @PHY_READY: PHY is ready to send and receive packets, but the
466 * controller is not. By default, PHYs which do not implement
467 * probe will be set to this state by phy_probe().
468 * - start will set the state to UP
469 *
470 * @PHY_UP: The PHY and attached device are ready to do work.
471 * Interrupts should be started here.
472 * - timer moves to @PHY_NOLINK or @PHY_RUNNING
473 *
474 * @PHY_NOLINK: PHY is up, but not currently plugged in.
475 * - irq or timer will set @PHY_RUNNING if link comes back
476 * - phy_stop moves to @PHY_HALTED
477 *
478 * @PHY_RUNNING: PHY is currently up, running, and possibly sending
479 * and/or receiving packets
480 * - irq or timer will set @PHY_NOLINK if link goes down
481 * - phy_stop moves to @PHY_HALTED
482 *
483 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending
484 * is not expected to work, carrier will be indicated as down. PHY will be
485 * poll once per second, or on interrupt for it current state.
486 * Once complete, move to UP to restart the PHY.
487 * - phy_stop aborts the running test and moves to @PHY_HALTED
488 *
489 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or
490 * PHY is in an error state.
491 * - phy_start moves to @PHY_UP
492 */
493enum phy_state {
494 PHY_DOWN = 0,
495 PHY_READY,
496 PHY_HALTED,
497 PHY_UP,
498 PHY_RUNNING,
499 PHY_NOLINK,
500 PHY_CABLETEST,
501};
502
503#define MDIO_MMD_NUM 32
504
505/**
506 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
507 * @devices_in_package: IEEE 802.3 devices in package register value.
508 * @mmds_present: bit vector of MMDs present.
509 * @device_ids: The device identifer for each present device.
510 */
511struct phy_c45_device_ids {
512 u32 devices_in_package;
513 u32 mmds_present;
514 u32 device_ids[MDIO_MMD_NUM];
515};
516
517struct macsec_context;
518struct macsec_ops;
519
520/**
521 * struct phy_device - An instance of a PHY
522 *
523 * @mdio: MDIO bus this PHY is on
524 * @drv: Pointer to the driver for this PHY instance
525 * @phy_id: UID for this device found during discovery
526 * @c45_ids: 802.3-c45 Device Identifiers if is_c45.
527 * @is_c45: Set to true if this PHY uses clause 45 addressing.
528 * @is_internal: Set to true if this PHY is internal to a MAC.
529 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc.
530 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps
531 * @has_fixups: Set to true if this PHY has fixups/quirks.
532 * @suspended: Set to true if this PHY has been suspended successfully.
533 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus.
534 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
535 * @loopback_enabled: Set true if this PHY has been loopbacked successfully.
536 * @downshifted_rate: Set true if link speed has been downshifted.
537 * @is_on_sfp_module: Set true if PHY is located on an SFP module.
538 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY
539 * @state: State of the PHY for management purposes
540 * @dev_flags: Device-specific flags used by the PHY driver.
541 *
542 * - Bits [15:0] are free to use by the PHY driver to communicate
543 * driver specific behavior.
544 * - Bits [23:16] are currently reserved for future use.
545 * - Bits [31:24] are reserved for defining generic
546 * PHY driver behavior.
547 * @irq: IRQ number of the PHY's interrupt (-1 if none)
548 * @phy_timer: The timer for handling the state machine
549 * @phylink: Pointer to phylink instance for this PHY
550 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached
551 * @sfp_bus: SFP bus attached to this PHY's fiber port
552 * @attached_dev: The attached enet driver's device instance ptr
553 * @adjust_link: Callback for the enet controller to respond to changes: in the
554 * link state.
555 * @phy_link_change: Callback for phylink for notification of link change
556 * @macsec_ops: MACsec offloading ops.
557 *
558 * @speed: Current link speed
559 * @duplex: Current duplex
560 * @port: Current port
561 * @pause: Current pause
562 * @asym_pause: Current asymmetric pause
563 * @supported: Combined MAC/PHY supported linkmodes
564 * @advertising: Currently advertised linkmodes
565 * @adv_old: Saved advertised while power saving for WoL
566 * @lp_advertising: Current link partner advertised linkmodes
567 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited
568 * @autoneg: Flag autoneg being used
569 * @link: Current link state
570 * @autoneg_complete: Flag auto negotiation of the link has completed
571 * @mdix: Current crossover
572 * @mdix_ctrl: User setting of crossover
573 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register
574 * @interrupts: Flag interrupts have been enabled
575 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt
576 * handling shall be postponed until PHY has resumed
577 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended,
578 * requiring a rerun of the interrupt handler after resume
579 * @interface: enum phy_interface_t value
580 * @skb: Netlink message for cable diagnostics
581 * @nest: Netlink nest used for cable diagnostics
582 * @ehdr: nNtlink header for cable diagnostics
583 * @phy_led_triggers: Array of LED triggers
584 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers
585 * @led_link_trigger: LED trigger for link up/down
586 * @last_triggered: last LED trigger for link speed
587 * @master_slave_set: User requested master/slave configuration
588 * @master_slave_get: Current master/slave advertisement
589 * @master_slave_state: Current master/slave configuration
590 * @mii_ts: Pointer to time stamper callbacks
591 * @lock: Mutex for serialization access to PHY
592 * @state_queue: Work queue for state machine
593 * @shared: Pointer to private data shared by phys in one package
594 * @priv: Pointer to driver private data
595 *
596 * interrupts currently only supports enabled or disabled,
597 * but could be changed in the future to support enabling
598 * and disabling specific interrupts
599 *
600 * Contains some infrastructure for polling and interrupt
601 * handling, as well as handling shifts in PHY hardware state
602 */
603struct phy_device {
604 struct mdio_device mdio;
605
606 /* Information about the PHY type */
607 /* And management functions */
608 struct phy_driver *drv;
609
610 u32 phy_id;
611
612 struct phy_c45_device_ids c45_ids;
613 unsigned is_c45:1;
614 unsigned is_internal:1;
615 unsigned is_pseudo_fixed_link:1;
616 unsigned is_gigabit_capable:1;
617 unsigned has_fixups:1;
618 unsigned suspended:1;
619 unsigned suspended_by_mdio_bus:1;
620 unsigned sysfs_links:1;
621 unsigned loopback_enabled:1;
622 unsigned downshifted_rate:1;
623 unsigned is_on_sfp_module:1;
624 unsigned mac_managed_pm:1;
625
626 unsigned autoneg:1;
627 /* The most recently read link state */
628 unsigned link:1;
629 unsigned autoneg_complete:1;
630
631 /* Interrupts are enabled */
632 unsigned interrupts:1;
633 unsigned irq_suspended:1;
634 unsigned irq_rerun:1;
635
636 enum phy_state state;
637
638 u32 dev_flags;
639
640 phy_interface_t interface;
641
642 /*
643 * forced speed & duplex (no autoneg)
644 * partner speed & duplex & pause (autoneg)
645 */
646 int speed;
647 int duplex;
648 int port;
649 int pause;
650 int asym_pause;
651 u8 master_slave_get;
652 u8 master_slave_set;
653 u8 master_slave_state;
654
655 /* Union of PHY and Attached devices' supported link modes */
656 /* See ethtool.h for more info */
657 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
658 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
659 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
660 /* used with phy_speed_down */
661 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
662
663 /* Energy efficient ethernet modes which should be prohibited */
664 u32 eee_broken_modes;
665
666#ifdef CONFIG_LED_TRIGGER_PHY
667 struct phy_led_trigger *phy_led_triggers;
668 unsigned int phy_num_led_triggers;
669 struct phy_led_trigger *last_triggered;
670
671 struct phy_led_trigger *led_link_trigger;
672#endif
673
674 /*
675 * Interrupt number for this PHY
676 * -1 means no interrupt
677 */
678 int irq;
679
680 /* private data pointer */
681 /* For use by PHYs to maintain extra state */
682 void *priv;
683
684 /* shared data pointer */
685 /* For use by PHYs inside the same package that need a shared state. */
686 struct phy_package_shared *shared;
687
688 /* Reporting cable test results */
689 struct sk_buff *skb;
690 void *ehdr;
691 struct nlattr *nest;
692
693 /* Interrupt and Polling infrastructure */
694 struct delayed_work state_queue;
695
696 struct mutex lock;
697
698 /* This may be modified under the rtnl lock */
699 bool sfp_bus_attached;
700 struct sfp_bus *sfp_bus;
701 struct phylink *phylink;
702 struct net_device *attached_dev;
703 struct mii_timestamper *mii_ts;
704
705 u8 mdix;
706 u8 mdix_ctrl;
707
708 int pma_extable;
709
710 void (*phy_link_change)(struct phy_device *phydev, bool up);
711 void (*adjust_link)(struct net_device *dev);
712
713#if IS_ENABLED(CONFIG_MACSEC)
714 /* MACsec management functions */
715 const struct macsec_ops *macsec_ops;
716#endif
717};
718
719static inline struct phy_device *to_phy_device(const struct device *dev)
720{
721 return container_of(to_mdio_device(dev), struct phy_device, mdio);
722}
723
724/**
725 * struct phy_tdr_config - Configuration of a TDR raw test
726 *
727 * @first: Distance for first data collection point
728 * @last: Distance for last data collection point
729 * @step: Step between data collection points
730 * @pair: Bitmap of cable pairs to collect data for
731 *
732 * A structure containing possible configuration parameters
733 * for a TDR cable test. The driver does not need to implement
734 * all the parameters, but should report what is actually used.
735 * All distances are in centimeters.
736 */
737struct phy_tdr_config {
738 u32 first;
739 u32 last;
740 u32 step;
741 s8 pair;
742};
743#define PHY_PAIR_ALL -1
744
745/**
746 * struct phy_driver - Driver structure for a particular PHY type
747 *
748 * @mdiodrv: Data common to all MDIO devices
749 * @phy_id: The result of reading the UID registers of this PHY
750 * type, and ANDing them with the phy_id_mask. This driver
751 * only works for PHYs with IDs which match this field
752 * @name: The friendly name of this PHY type
753 * @phy_id_mask: Defines the important bits of the phy_id
754 * @features: A mandatory list of features (speed, duplex, etc)
755 * supported by this PHY
756 * @flags: A bitfield defining certain other features this PHY
757 * supports (like interrupts)
758 * @driver_data: Static driver data
759 *
760 * All functions are optional. If config_aneg or read_status
761 * are not implemented, the phy core uses the genphy versions.
762 * Note that none of these functions should be called from
763 * interrupt time. The goal is for the bus read/write functions
764 * to be able to block when the bus transaction is happening,
765 * and be freed up by an interrupt (The MPC85xx has this ability,
766 * though it is not currently supported in the driver).
767 */
768struct phy_driver {
769 struct mdio_driver_common mdiodrv;
770 u32 phy_id;
771 char *name;
772 u32 phy_id_mask;
773 const unsigned long * const features;
774 u32 flags;
775 const void *driver_data;
776
777 /**
778 * @soft_reset: Called to issue a PHY software reset
779 */
780 int (*soft_reset)(struct phy_device *phydev);
781
782 /**
783 * @config_init: Called to initialize the PHY,
784 * including after a reset
785 */
786 int (*config_init)(struct phy_device *phydev);
787
788 /**
789 * @probe: Called during discovery. Used to set
790 * up device-specific structures, if any
791 */
792 int (*probe)(struct phy_device *phydev);
793
794 /**
795 * @get_features: Probe the hardware to determine what
796 * abilities it has. Should only set phydev->supported.
797 */
798 int (*get_features)(struct phy_device *phydev);
799
800 /* PHY Power Management */
801 /** @suspend: Suspend the hardware, saving state if needed */
802 int (*suspend)(struct phy_device *phydev);
803 /** @resume: Resume the hardware, restoring state if needed */
804 int (*resume)(struct phy_device *phydev);
805
806 /**
807 * @config_aneg: Configures the advertisement and resets
808 * autonegotiation if phydev->autoneg is on,
809 * forces the speed to the current settings in phydev
810 * if phydev->autoneg is off
811 */
812 int (*config_aneg)(struct phy_device *phydev);
813
814 /** @aneg_done: Determines the auto negotiation result */
815 int (*aneg_done)(struct phy_device *phydev);
816
817 /** @read_status: Determines the negotiated speed and duplex */
818 int (*read_status)(struct phy_device *phydev);
819
820 /**
821 * @config_intr: Enables or disables interrupts.
822 * It should also clear any pending interrupts prior to enabling the
823 * IRQs and after disabling them.
824 */
825 int (*config_intr)(struct phy_device *phydev);
826
827 /** @handle_interrupt: Override default interrupt handling */
828 irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
829
830 /** @remove: Clears up any memory if needed */
831 void (*remove)(struct phy_device *phydev);
832
833 /**
834 * @match_phy_device: Returns true if this is a suitable
835 * driver for the given phydev. If NULL, matching is based on
836 * phy_id and phy_id_mask.
837 */
838 int (*match_phy_device)(struct phy_device *phydev);
839
840 /**
841 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY
842 * register changes to enable Wake on LAN, so set_wol is
843 * provided to be called in the ethernet driver's set_wol
844 * function.
845 */
846 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
847
848 /**
849 * @get_wol: See set_wol, but for checking whether Wake on LAN
850 * is enabled.
851 */
852 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
853
854 /**
855 * @link_change_notify: Called to inform a PHY device driver
856 * when the core is about to change the link state. This
857 * callback is supposed to be used as fixup hook for drivers
858 * that need to take action when the link state
859 * changes. Drivers are by no means allowed to mess with the
860 * PHY device structure in their implementations.
861 */
862 void (*link_change_notify)(struct phy_device *dev);
863
864 /**
865 * @read_mmd: PHY specific driver override for reading a MMD
866 * register. This function is optional for PHY specific
867 * drivers. When not provided, the default MMD read function
868 * will be used by phy_read_mmd(), which will use either a
869 * direct read for Clause 45 PHYs or an indirect read for
870 * Clause 22 PHYs. devnum is the MMD device number within the
871 * PHY device, regnum is the register within the selected MMD
872 * device.
873 */
874 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
875
876 /**
877 * @write_mmd: PHY specific driver override for writing a MMD
878 * register. This function is optional for PHY specific
879 * drivers. When not provided, the default MMD write function
880 * will be used by phy_write_mmd(), which will use either a
881 * direct write for Clause 45 PHYs, or an indirect write for
882 * Clause 22 PHYs. devnum is the MMD device number within the
883 * PHY device, regnum is the register within the selected MMD
884 * device. val is the value to be written.
885 */
886 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
887 u16 val);
888
889 /** @read_page: Return the current PHY register page number */
890 int (*read_page)(struct phy_device *dev);
891 /** @write_page: Set the current PHY register page number */
892 int (*write_page)(struct phy_device *dev, int page);
893
894 /**
895 * @module_info: Get the size and type of the eeprom contained
896 * within a plug-in module
897 */
898 int (*module_info)(struct phy_device *dev,
899 struct ethtool_modinfo *modinfo);
900
901 /**
902 * @module_eeprom: Get the eeprom information from the plug-in
903 * module
904 */
905 int (*module_eeprom)(struct phy_device *dev,
906 struct ethtool_eeprom *ee, u8 *data);
907
908 /** @cable_test_start: Start a cable test */
909 int (*cable_test_start)(struct phy_device *dev);
910
911 /** @cable_test_tdr_start: Start a raw TDR cable test */
912 int (*cable_test_tdr_start)(struct phy_device *dev,
913 const struct phy_tdr_config *config);
914
915 /**
916 * @cable_test_get_status: Once per second, or on interrupt,
917 * request the status of the test.
918 */
919 int (*cable_test_get_status)(struct phy_device *dev, bool *finished);
920
921 /* Get statistics from the PHY using ethtool */
922 /** @get_sset_count: Number of statistic counters */
923 int (*get_sset_count)(struct phy_device *dev);
924 /** @get_strings: Names of the statistic counters */
925 void (*get_strings)(struct phy_device *dev, u8 *data);
926 /** @get_stats: Return the statistic counter values */
927 void (*get_stats)(struct phy_device *dev,
928 struct ethtool_stats *stats, u64 *data);
929
930 /* Get and Set PHY tunables */
931 /** @get_tunable: Return the value of a tunable */
932 int (*get_tunable)(struct phy_device *dev,
933 struct ethtool_tunable *tuna, void *data);
934 /** @set_tunable: Set the value of a tunable */
935 int (*set_tunable)(struct phy_device *dev,
936 struct ethtool_tunable *tuna,
937 const void *data);
938 /** @set_loopback: Set the loopback mood of the PHY */
939 int (*set_loopback)(struct phy_device *dev, bool enable);
940 /** @get_sqi: Get the signal quality indication */
941 int (*get_sqi)(struct phy_device *dev);
942 /** @get_sqi_max: Get the maximum signal quality indication */
943 int (*get_sqi_max)(struct phy_device *dev);
944};
945#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
946 struct phy_driver, mdiodrv)
947
948#define PHY_ANY_ID "MATCH ANY PHY"
949#define PHY_ANY_UID 0xffffffff
950
951#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
952#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
953#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
954
955/* A Structure for boards to register fixups with the PHY Lib */
956struct phy_fixup {
957 struct list_head list;
958 char bus_id[MII_BUS_ID_SIZE + 3];
959 u32 phy_uid;
960 u32 phy_uid_mask;
961 int (*run)(struct phy_device *phydev);
962};
963
964const char *phy_speed_to_str(int speed);
965const char *phy_duplex_to_str(unsigned int duplex);
966
967/* A structure for mapping a particular speed and duplex
968 * combination to a particular SUPPORTED and ADVERTISED value
969 */
970struct phy_setting {
971 u32 speed;
972 u8 duplex;
973 u8 bit;
974};
975
976const struct phy_setting *
977phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
978 bool exact);
979size_t phy_speeds(unsigned int *speeds, size_t size,
980 unsigned long *mask);
981void of_set_phy_supported(struct phy_device *phydev);
982void of_set_phy_eee_broken(struct phy_device *phydev);
983int phy_speed_down_core(struct phy_device *phydev);
984
985/**
986 * phy_is_started - Convenience function to check whether PHY is started
987 * @phydev: The phy_device struct
988 */
989static inline bool phy_is_started(struct phy_device *phydev)
990{
991 return phydev->state >= PHY_UP;
992}
993
994void phy_resolve_aneg_pause(struct phy_device *phydev);
995void phy_resolve_aneg_linkmode(struct phy_device *phydev);
996void phy_check_downshift(struct phy_device *phydev);
997
998/**
999 * phy_read - Convenience function for reading a given PHY register
1000 * @phydev: the phy_device struct
1001 * @regnum: register number to read
1002 *
1003 * NOTE: MUST NOT be called from interrupt context,
1004 * because the bus read/write functions may wait for an interrupt
1005 * to conclude the operation.
1006 */
1007static inline int phy_read(struct phy_device *phydev, u32 regnum)
1008{
1009 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1010}
1011
1012#define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
1013 timeout_us, sleep_before_read) \
1014({ \
1015 int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \
1016 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
1017 if (val < 0) \
1018 __ret = val; \
1019 if (__ret) \
1020 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1021 __ret; \
1022})
1023
1024
1025/**
1026 * __phy_read - convenience function for reading a given PHY register
1027 * @phydev: the phy_device struct
1028 * @regnum: register number to read
1029 *
1030 * The caller must have taken the MDIO bus lock.
1031 */
1032static inline int __phy_read(struct phy_device *phydev, u32 regnum)
1033{
1034 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1035}
1036
1037/**
1038 * phy_write - Convenience function for writing a given PHY register
1039 * @phydev: the phy_device struct
1040 * @regnum: register number to write
1041 * @val: value to write to @regnum
1042 *
1043 * NOTE: MUST NOT be called from interrupt context,
1044 * because the bus read/write functions may wait for an interrupt
1045 * to conclude the operation.
1046 */
1047static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1048{
1049 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
1050}
1051
1052/**
1053 * __phy_write - Convenience function for writing a given PHY register
1054 * @phydev: the phy_device struct
1055 * @regnum: register number to write
1056 * @val: value to write to @regnum
1057 *
1058 * The caller must have taken the MDIO bus lock.
1059 */
1060static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1061{
1062 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
1063 val);
1064}
1065
1066/**
1067 * __phy_modify_changed() - Convenience function for modifying a PHY register
1068 * @phydev: a pointer to a &struct phy_device
1069 * @regnum: register number
1070 * @mask: bit mask of bits to clear
1071 * @set: bit mask of bits to set
1072 *
1073 * Unlocked helper function which allows a PHY register to be modified as
1074 * new register value = (old register value & ~mask) | set
1075 *
1076 * Returns negative errno, 0 if there was no change, and 1 in case of change
1077 */
1078static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum,
1079 u16 mask, u16 set)
1080{
1081 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr,
1082 regnum, mask, set);
1083}
1084
1085/*
1086 * phy_read_mmd - Convenience function for reading a register
1087 * from an MMD on a given PHY.
1088 */
1089int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1090
1091/**
1092 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
1093 * condition is met or a timeout occurs
1094 *
1095 * @phydev: The phy_device struct
1096 * @devaddr: The MMD to read from
1097 * @regnum: The register on the MMD to read
1098 * @val: Variable to read the register into
1099 * @cond: Break condition (usually involving @val)
1100 * @sleep_us: Maximum time to sleep between reads in us (0
1101 * tight-loops). Should be less than ~20ms since usleep_range
1102 * is used (see Documentation/timers/timers-howto.rst).
1103 * @timeout_us: Timeout in us, 0 means never timeout
1104 * @sleep_before_read: if it is true, sleep @sleep_us before read.
1105 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
1106 * case, the last read value at @args is stored in @val. Must not
1107 * be called from atomic context if sleep_us or timeout_us are used.
1108 */
1109#define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
1110 sleep_us, timeout_us, sleep_before_read) \
1111({ \
1112 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \
1113 sleep_us, timeout_us, sleep_before_read, \
1114 phydev, devaddr, regnum); \
1115 if (val < 0) \
1116 __ret = val; \
1117 if (__ret) \
1118 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1119 __ret; \
1120})
1121
1122/*
1123 * __phy_read_mmd - Convenience function for reading a register
1124 * from an MMD on a given PHY.
1125 */
1126int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1127
1128/*
1129 * phy_write_mmd - Convenience function for writing a register
1130 * on an MMD on a given PHY.
1131 */
1132int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1133
1134/*
1135 * __phy_write_mmd - Convenience function for writing a register
1136 * on an MMD on a given PHY.
1137 */
1138int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1139
1140int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1141 u16 set);
1142int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1143 u16 set);
1144int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1145int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1146
1147int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1148 u16 mask, u16 set);
1149int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1150 u16 mask, u16 set);
1151int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1152 u16 mask, u16 set);
1153int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1154 u16 mask, u16 set);
1155
1156/**
1157 * __phy_set_bits - Convenience function for setting bits in a PHY register
1158 * @phydev: the phy_device struct
1159 * @regnum: register number to write
1160 * @val: bits to set
1161 *
1162 * The caller must have taken the MDIO bus lock.
1163 */
1164static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1165{
1166 return __phy_modify(phydev, regnum, 0, val);
1167}
1168
1169/**
1170 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
1171 * @phydev: the phy_device struct
1172 * @regnum: register number to write
1173 * @val: bits to clear
1174 *
1175 * The caller must have taken the MDIO bus lock.
1176 */
1177static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
1178 u16 val)
1179{
1180 return __phy_modify(phydev, regnum, val, 0);
1181}
1182
1183/**
1184 * phy_set_bits - Convenience function for setting bits in a PHY register
1185 * @phydev: the phy_device struct
1186 * @regnum: register number to write
1187 * @val: bits to set
1188 */
1189static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1190{
1191 return phy_modify(phydev, regnum, 0, val);
1192}
1193
1194/**
1195 * phy_clear_bits - Convenience function for clearing bits in a PHY register
1196 * @phydev: the phy_device struct
1197 * @regnum: register number to write
1198 * @val: bits to clear
1199 */
1200static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
1201{
1202 return phy_modify(phydev, regnum, val, 0);
1203}
1204
1205/**
1206 * __phy_set_bits_mmd - Convenience function for setting bits in a register
1207 * on MMD
1208 * @phydev: the phy_device struct
1209 * @devad: the MMD containing register to modify
1210 * @regnum: register number to modify
1211 * @val: bits to set
1212 *
1213 * The caller must have taken the MDIO bus lock.
1214 */
1215static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
1216 u32 regnum, u16 val)
1217{
1218 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
1219}
1220
1221/**
1222 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
1223 * on MMD
1224 * @phydev: the phy_device struct
1225 * @devad: the MMD containing register to modify
1226 * @regnum: register number to modify
1227 * @val: bits to clear
1228 *
1229 * The caller must have taken the MDIO bus lock.
1230 */
1231static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1232 u32 regnum, u16 val)
1233{
1234 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
1235}
1236
1237/**
1238 * phy_set_bits_mmd - Convenience function for setting bits in a register
1239 * on MMD
1240 * @phydev: the phy_device struct
1241 * @devad: the MMD containing register to modify
1242 * @regnum: register number to modify
1243 * @val: bits to set
1244 */
1245static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
1246 u32 regnum, u16 val)
1247{
1248 return phy_modify_mmd(phydev, devad, regnum, 0, val);
1249}
1250
1251/**
1252 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
1253 * on MMD
1254 * @phydev: the phy_device struct
1255 * @devad: the MMD containing register to modify
1256 * @regnum: register number to modify
1257 * @val: bits to clear
1258 */
1259static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1260 u32 regnum, u16 val)
1261{
1262 return phy_modify_mmd(phydev, devad, regnum, val, 0);
1263}
1264
1265/**
1266 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
1267 * @phydev: the phy_device struct
1268 *
1269 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
1270 * PHY_MAC_INTERRUPT
1271 */
1272static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
1273{
1274 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT;
1275}
1276
1277/**
1278 * phy_polling_mode - Convenience function for testing whether polling is
1279 * used to detect PHY status changes
1280 * @phydev: the phy_device struct
1281 */
1282static inline bool phy_polling_mode(struct phy_device *phydev)
1283{
1284 if (phydev->state == PHY_CABLETEST)
1285 if (phydev->drv->flags & PHY_POLL_CABLE_TEST)
1286 return true;
1287
1288 return phydev->irq == PHY_POLL;
1289}
1290
1291/**
1292 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
1293 * @phydev: the phy_device struct
1294 */
1295static inline bool phy_has_hwtstamp(struct phy_device *phydev)
1296{
1297 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
1298}
1299
1300/**
1301 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
1302 * @phydev: the phy_device struct
1303 */
1304static inline bool phy_has_rxtstamp(struct phy_device *phydev)
1305{
1306 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
1307}
1308
1309/**
1310 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
1311 * PTP hardware clock capabilities.
1312 * @phydev: the phy_device struct
1313 */
1314static inline bool phy_has_tsinfo(struct phy_device *phydev)
1315{
1316 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
1317}
1318
1319/**
1320 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
1321 * @phydev: the phy_device struct
1322 */
1323static inline bool phy_has_txtstamp(struct phy_device *phydev)
1324{
1325 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
1326}
1327
1328static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr)
1329{
1330 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr);
1331}
1332
1333static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
1334 int type)
1335{
1336 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
1337}
1338
1339static inline int phy_ts_info(struct phy_device *phydev,
1340 struct ethtool_ts_info *tsinfo)
1341{
1342 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
1343}
1344
1345static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
1346 int type)
1347{
1348 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
1349}
1350
1351/**
1352 * phy_is_internal - Convenience function for testing if a PHY is internal
1353 * @phydev: the phy_device struct
1354 */
1355static inline bool phy_is_internal(struct phy_device *phydev)
1356{
1357 return phydev->is_internal;
1358}
1359
1360/**
1361 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module
1362 * @phydev: the phy_device struct
1363 */
1364static inline bool phy_on_sfp(struct phy_device *phydev)
1365{
1366 return phydev->is_on_sfp_module;
1367}
1368
1369/**
1370 * phy_interface_mode_is_rgmii - Convenience function for testing if a
1371 * PHY interface mode is RGMII (all variants)
1372 * @mode: the &phy_interface_t enum
1373 */
1374static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
1375{
1376 return mode >= PHY_INTERFACE_MODE_RGMII &&
1377 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
1378};
1379
1380/**
1381 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z
1382 * negotiation
1383 * @mode: one of &enum phy_interface_t
1384 *
1385 * Returns true if the PHY interface mode uses the 16-bit negotiation
1386 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
1387 */
1388static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
1389{
1390 return mode == PHY_INTERFACE_MODE_1000BASEX ||
1391 mode == PHY_INTERFACE_MODE_2500BASEX;
1392}
1393
1394/**
1395 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
1396 * is RGMII (all variants)
1397 * @phydev: the phy_device struct
1398 */
1399static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
1400{
1401 return phy_interface_mode_is_rgmii(phydev->interface);
1402};
1403
1404/**
1405 * phy_is_pseudo_fixed_link - Convenience function for testing if this
1406 * PHY is the CPU port facing side of an Ethernet switch, or similar.
1407 * @phydev: the phy_device struct
1408 */
1409static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
1410{
1411 return phydev->is_pseudo_fixed_link;
1412}
1413
1414int phy_save_page(struct phy_device *phydev);
1415int phy_select_page(struct phy_device *phydev, int page);
1416int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
1417int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
1418int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
1419int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1420 u16 mask, u16 set);
1421int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1422 u16 mask, u16 set);
1423
1424struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
1425 bool is_c45,
1426 struct phy_c45_device_ids *c45_ids);
1427#if IS_ENABLED(CONFIG_PHYLIB)
1428int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id);
1429struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode);
1430struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode);
1431struct phy_device *device_phy_find_device(struct device *dev);
1432struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode);
1433struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
1434int phy_device_register(struct phy_device *phy);
1435void phy_device_free(struct phy_device *phydev);
1436#else
1437static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id)
1438{
1439 return 0;
1440}
1441static inline
1442struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode)
1443{
1444 return 0;
1445}
1446
1447static inline
1448struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode)
1449{
1450 return NULL;
1451}
1452
1453static inline struct phy_device *device_phy_find_device(struct device *dev)
1454{
1455 return NULL;
1456}
1457
1458static inline
1459struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode)
1460{
1461 return NULL;
1462}
1463
1464static inline
1465struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1466{
1467 return NULL;
1468}
1469
1470static inline int phy_device_register(struct phy_device *phy)
1471{
1472 return 0;
1473}
1474
1475static inline void phy_device_free(struct phy_device *phydev) { }
1476#endif /* CONFIG_PHYLIB */
1477void phy_device_remove(struct phy_device *phydev);
1478int phy_get_c45_ids(struct phy_device *phydev);
1479int phy_init_hw(struct phy_device *phydev);
1480int phy_suspend(struct phy_device *phydev);
1481int phy_resume(struct phy_device *phydev);
1482int __phy_resume(struct phy_device *phydev);
1483int phy_loopback(struct phy_device *phydev, bool enable);
1484void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
1485void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
1486int phy_sfp_probe(struct phy_device *phydev,
1487 const struct sfp_upstream_ops *ops);
1488struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1489 phy_interface_t interface);
1490struct phy_device *phy_find_first(struct mii_bus *bus);
1491int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1492 u32 flags, phy_interface_t interface);
1493int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1494 void (*handler)(struct net_device *),
1495 phy_interface_t interface);
1496struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1497 void (*handler)(struct net_device *),
1498 phy_interface_t interface);
1499void phy_disconnect(struct phy_device *phydev);
1500void phy_detach(struct phy_device *phydev);
1501void phy_start(struct phy_device *phydev);
1502void phy_stop(struct phy_device *phydev);
1503int phy_config_aneg(struct phy_device *phydev);
1504int phy_start_aneg(struct phy_device *phydev);
1505int phy_aneg_done(struct phy_device *phydev);
1506int phy_speed_down(struct phy_device *phydev, bool sync);
1507int phy_speed_up(struct phy_device *phydev);
1508
1509int phy_restart_aneg(struct phy_device *phydev);
1510int phy_reset_after_clk_enable(struct phy_device *phydev);
1511
1512#if IS_ENABLED(CONFIG_PHYLIB)
1513int phy_start_cable_test(struct phy_device *phydev,
1514 struct netlink_ext_ack *extack);
1515int phy_start_cable_test_tdr(struct phy_device *phydev,
1516 struct netlink_ext_ack *extack,
1517 const struct phy_tdr_config *config);
1518#else
1519static inline
1520int phy_start_cable_test(struct phy_device *phydev,
1521 struct netlink_ext_ack *extack)
1522{
1523 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1524 return -EOPNOTSUPP;
1525}
1526static inline
1527int phy_start_cable_test_tdr(struct phy_device *phydev,
1528 struct netlink_ext_ack *extack,
1529 const struct phy_tdr_config *config)
1530{
1531 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1532 return -EOPNOTSUPP;
1533}
1534#endif
1535
1536int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result);
1537int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair,
1538 u16 cm);
1539
1540static inline void phy_device_reset(struct phy_device *phydev, int value)
1541{
1542 mdio_device_reset(&phydev->mdio, value);
1543}
1544
1545#define phydev_err(_phydev, format, args...) \
1546 dev_err(&_phydev->mdio.dev, format, ##args)
1547
1548#define phydev_err_probe(_phydev, err, format, args...) \
1549 dev_err_probe(&_phydev->mdio.dev, err, format, ##args)
1550
1551#define phydev_info(_phydev, format, args...) \
1552 dev_info(&_phydev->mdio.dev, format, ##args)
1553
1554#define phydev_warn(_phydev, format, args...) \
1555 dev_warn(&_phydev->mdio.dev, format, ##args)
1556
1557#define phydev_dbg(_phydev, format, args...) \
1558 dev_dbg(&_phydev->mdio.dev, format, ##args)
1559
1560static inline const char *phydev_name(const struct phy_device *phydev)
1561{
1562 return dev_name(&phydev->mdio.dev);
1563}
1564
1565static inline void phy_lock_mdio_bus(struct phy_device *phydev)
1566{
1567 mutex_lock(&phydev->mdio.bus->mdio_lock);
1568}
1569
1570static inline void phy_unlock_mdio_bus(struct phy_device *phydev)
1571{
1572 mutex_unlock(&phydev->mdio.bus->mdio_lock);
1573}
1574
1575void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1576 __printf(2, 3);
1577char *phy_attached_info_irq(struct phy_device *phydev)
1578 __malloc;
1579void phy_attached_info(struct phy_device *phydev);
1580
1581/* Clause 22 PHY */
1582int genphy_read_abilities(struct phy_device *phydev);
1583int genphy_setup_forced(struct phy_device *phydev);
1584int genphy_restart_aneg(struct phy_device *phydev);
1585int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1586int genphy_config_eee_advert(struct phy_device *phydev);
1587int __genphy_config_aneg(struct phy_device *phydev, bool changed);
1588int genphy_aneg_done(struct phy_device *phydev);
1589int genphy_update_link(struct phy_device *phydev);
1590int genphy_read_lpa(struct phy_device *phydev);
1591int genphy_read_status_fixed(struct phy_device *phydev);
1592int genphy_read_status(struct phy_device *phydev);
1593int genphy_read_master_slave(struct phy_device *phydev);
1594int genphy_suspend(struct phy_device *phydev);
1595int genphy_resume(struct phy_device *phydev);
1596int genphy_loopback(struct phy_device *phydev, bool enable);
1597int genphy_soft_reset(struct phy_device *phydev);
1598irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev);
1599
1600static inline int genphy_config_aneg(struct phy_device *phydev)
1601{
1602 return __genphy_config_aneg(phydev, false);
1603}
1604
1605static inline int genphy_no_config_intr(struct phy_device *phydev)
1606{
1607 return 0;
1608}
1609int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1610 u16 regnum);
1611int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1612 u16 regnum, u16 val);
1613
1614/* Clause 37 */
1615int genphy_c37_config_aneg(struct phy_device *phydev);
1616int genphy_c37_read_status(struct phy_device *phydev);
1617
1618/* Clause 45 PHY */
1619int genphy_c45_restart_aneg(struct phy_device *phydev);
1620int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1621int genphy_c45_aneg_done(struct phy_device *phydev);
1622int genphy_c45_read_link(struct phy_device *phydev);
1623int genphy_c45_read_lpa(struct phy_device *phydev);
1624int genphy_c45_read_pma(struct phy_device *phydev);
1625int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1626int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev);
1627int genphy_c45_an_config_aneg(struct phy_device *phydev);
1628int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1629int genphy_c45_read_mdix(struct phy_device *phydev);
1630int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1631int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev);
1632int genphy_c45_read_status(struct phy_device *phydev);
1633int genphy_c45_baset1_read_status(struct phy_device *phydev);
1634int genphy_c45_config_aneg(struct phy_device *phydev);
1635int genphy_c45_loopback(struct phy_device *phydev, bool enable);
1636int genphy_c45_pma_resume(struct phy_device *phydev);
1637int genphy_c45_pma_suspend(struct phy_device *phydev);
1638int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable);
1639
1640/* Generic C45 PHY driver */
1641extern struct phy_driver genphy_c45_driver;
1642
1643/* The gen10g_* functions are the old Clause 45 stub */
1644int gen10g_config_aneg(struct phy_device *phydev);
1645
1646static inline int phy_read_status(struct phy_device *phydev)
1647{
1648 if (!phydev->drv)
1649 return -EIO;
1650
1651 if (phydev->drv->read_status)
1652 return phydev->drv->read_status(phydev);
1653 else
1654 return genphy_read_status(phydev);
1655}
1656
1657void phy_driver_unregister(struct phy_driver *drv);
1658void phy_drivers_unregister(struct phy_driver *drv, int n);
1659int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1660int phy_drivers_register(struct phy_driver *new_driver, int n,
1661 struct module *owner);
1662void phy_error(struct phy_device *phydev);
1663void phy_state_machine(struct work_struct *work);
1664void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
1665void phy_trigger_machine(struct phy_device *phydev);
1666void phy_mac_interrupt(struct phy_device *phydev);
1667void phy_start_machine(struct phy_device *phydev);
1668void phy_stop_machine(struct phy_device *phydev);
1669void phy_ethtool_ksettings_get(struct phy_device *phydev,
1670 struct ethtool_link_ksettings *cmd);
1671int phy_ethtool_ksettings_set(struct phy_device *phydev,
1672 const struct ethtool_link_ksettings *cmd);
1673int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
1674int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
1675int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
1676int phy_disable_interrupts(struct phy_device *phydev);
1677void phy_request_interrupt(struct phy_device *phydev);
1678void phy_free_interrupt(struct phy_device *phydev);
1679void phy_print_status(struct phy_device *phydev);
1680void phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
1681void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
1682void phy_advertise_supported(struct phy_device *phydev);
1683void phy_support_sym_pause(struct phy_device *phydev);
1684void phy_support_asym_pause(struct phy_device *phydev);
1685void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1686 bool autoneg);
1687void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
1688bool phy_validate_pause(struct phy_device *phydev,
1689 struct ethtool_pauseparam *pp);
1690void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause);
1691
1692s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
1693 const int *delay_values, int size, bool is_rx);
1694
1695void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv,
1696 bool *tx_pause, bool *rx_pause);
1697
1698int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
1699 int (*run)(struct phy_device *));
1700int phy_register_fixup_for_id(const char *bus_id,
1701 int (*run)(struct phy_device *));
1702int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
1703 int (*run)(struct phy_device *));
1704
1705int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1706int phy_unregister_fixup_for_id(const char *bus_id);
1707int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1708
1709int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1710int phy_get_eee_err(struct phy_device *phydev);
1711int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1712int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
1713int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
1714void phy_ethtool_get_wol(struct phy_device *phydev,
1715 struct ethtool_wolinfo *wol);
1716int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1717 struct ethtool_link_ksettings *cmd);
1718int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1719 const struct ethtool_link_ksettings *cmd);
1720int phy_ethtool_nway_reset(struct net_device *ndev);
1721int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size);
1722void phy_package_leave(struct phy_device *phydev);
1723int devm_phy_package_join(struct device *dev, struct phy_device *phydev,
1724 int addr, size_t priv_size);
1725
1726#if IS_ENABLED(CONFIG_PHYLIB)
1727int __init mdio_bus_init(void);
1728void mdio_bus_exit(void);
1729#endif
1730
1731int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data);
1732int phy_ethtool_get_sset_count(struct phy_device *phydev);
1733int phy_ethtool_get_stats(struct phy_device *phydev,
1734 struct ethtool_stats *stats, u64 *data);
1735
1736static inline int phy_package_read(struct phy_device *phydev, u32 regnum)
1737{
1738 struct phy_package_shared *shared = phydev->shared;
1739
1740 if (!shared)
1741 return -EIO;
1742
1743 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1744}
1745
1746static inline int __phy_package_read(struct phy_device *phydev, u32 regnum)
1747{
1748 struct phy_package_shared *shared = phydev->shared;
1749
1750 if (!shared)
1751 return -EIO;
1752
1753 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1754}
1755
1756static inline int phy_package_write(struct phy_device *phydev,
1757 u32 regnum, u16 val)
1758{
1759 struct phy_package_shared *shared = phydev->shared;
1760
1761 if (!shared)
1762 return -EIO;
1763
1764 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1765}
1766
1767static inline int __phy_package_write(struct phy_device *phydev,
1768 u32 regnum, u16 val)
1769{
1770 struct phy_package_shared *shared = phydev->shared;
1771
1772 if (!shared)
1773 return -EIO;
1774
1775 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1776}
1777
1778static inline bool __phy_package_set_once(struct phy_device *phydev,
1779 unsigned int b)
1780{
1781 struct phy_package_shared *shared = phydev->shared;
1782
1783 if (!shared)
1784 return false;
1785
1786 return !test_and_set_bit(b, &shared->flags);
1787}
1788
1789static inline bool phy_package_init_once(struct phy_device *phydev)
1790{
1791 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE);
1792}
1793
1794static inline bool phy_package_probe_once(struct phy_device *phydev)
1795{
1796 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE);
1797}
1798
1799extern struct bus_type mdio_bus_type;
1800
1801struct mdio_board_info {
1802 const char *bus_id;
1803 char modalias[MDIO_NAME_SIZE];
1804 int mdio_addr;
1805 const void *platform_data;
1806};
1807
1808#if IS_ENABLED(CONFIG_MDIO_DEVICE)
1809int mdiobus_register_board_info(const struct mdio_board_info *info,
1810 unsigned int n);
1811#else
1812static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1813 unsigned int n)
1814{
1815 return 0;
1816}
1817#endif
1818
1819
1820/**
1821 * phy_module_driver() - Helper macro for registering PHY drivers
1822 * @__phy_drivers: array of PHY drivers to register
1823 * @__count: Numbers of members in array
1824 *
1825 * Helper macro for PHY drivers which do not do anything special in module
1826 * init/exit. Each module may only use this macro once, and calling it
1827 * replaces module_init() and module_exit().
1828 */
1829#define phy_module_driver(__phy_drivers, __count) \
1830static int __init phy_module_init(void) \
1831{ \
1832 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
1833} \
1834module_init(phy_module_init); \
1835static void __exit phy_module_exit(void) \
1836{ \
1837 phy_drivers_unregister(__phy_drivers, __count); \
1838} \
1839module_exit(phy_module_exit)
1840
1841#define module_phy_driver(__phy_drivers) \
1842 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1843
1844bool phy_driver_is_genphy(struct phy_device *phydev);
1845bool phy_driver_is_genphy_10g(struct phy_device *phydev);
1846
1847#endif /* __PHY_H */
1848

source code of linux/include/linux/phy.h