1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | #ifndef _LINUX_SERIAL_BCM63XX_H |
3 | #define _LINUX_SERIAL_BCM63XX_H |
4 | |
5 | /* UART Control Register */ |
6 | #define UART_CTL_REG 0x0 |
7 | #define UART_CTL_RXTMOUTCNT_SHIFT 0 |
8 | #define UART_CTL_RXTMOUTCNT_MASK (0x1f << UART_CTL_RXTMOUTCNT_SHIFT) |
9 | #define UART_CTL_RSTTXDN_SHIFT 5 |
10 | #define UART_CTL_RSTTXDN_MASK (1 << UART_CTL_RSTTXDN_SHIFT) |
11 | #define UART_CTL_RSTRXFIFO_SHIFT 6 |
12 | #define UART_CTL_RSTRXFIFO_MASK (1 << UART_CTL_RSTRXFIFO_SHIFT) |
13 | #define UART_CTL_RSTTXFIFO_SHIFT 7 |
14 | #define UART_CTL_RSTTXFIFO_MASK (1 << UART_CTL_RSTTXFIFO_SHIFT) |
15 | #define UART_CTL_STOPBITS_SHIFT 8 |
16 | #define UART_CTL_STOPBITS_MASK (0xf << UART_CTL_STOPBITS_SHIFT) |
17 | #define UART_CTL_STOPBITS_1 (0x7 << UART_CTL_STOPBITS_SHIFT) |
18 | #define UART_CTL_STOPBITS_2 (0xf << UART_CTL_STOPBITS_SHIFT) |
19 | #define UART_CTL_BITSPERSYM_SHIFT 12 |
20 | #define UART_CTL_BITSPERSYM_MASK (0x3 << UART_CTL_BITSPERSYM_SHIFT) |
21 | #define UART_CTL_XMITBRK_SHIFT 14 |
22 | #define UART_CTL_XMITBRK_MASK (1 << UART_CTL_XMITBRK_SHIFT) |
23 | #define UART_CTL_RSVD_SHIFT 15 |
24 | #define UART_CTL_RSVD_MASK (1 << UART_CTL_RSVD_SHIFT) |
25 | #define UART_CTL_RXPAREVEN_SHIFT 16 |
26 | #define UART_CTL_RXPAREVEN_MASK (1 << UART_CTL_RXPAREVEN_SHIFT) |
27 | #define UART_CTL_RXPAREN_SHIFT 17 |
28 | #define UART_CTL_RXPAREN_MASK (1 << UART_CTL_RXPAREN_SHIFT) |
29 | #define UART_CTL_TXPAREVEN_SHIFT 18 |
30 | #define UART_CTL_TXPAREVEN_MASK (1 << UART_CTL_TXPAREVEN_SHIFT) |
31 | #define UART_CTL_TXPAREN_SHIFT 18 |
32 | #define UART_CTL_TXPAREN_MASK (1 << UART_CTL_TXPAREN_SHIFT) |
33 | #define UART_CTL_LOOPBACK_SHIFT 20 |
34 | #define UART_CTL_LOOPBACK_MASK (1 << UART_CTL_LOOPBACK_SHIFT) |
35 | #define UART_CTL_RXEN_SHIFT 21 |
36 | #define UART_CTL_RXEN_MASK (1 << UART_CTL_RXEN_SHIFT) |
37 | #define UART_CTL_TXEN_SHIFT 22 |
38 | #define UART_CTL_TXEN_MASK (1 << UART_CTL_TXEN_SHIFT) |
39 | #define UART_CTL_BRGEN_SHIFT 23 |
40 | #define UART_CTL_BRGEN_MASK (1 << UART_CTL_BRGEN_SHIFT) |
41 | |
42 | /* UART Baudword register */ |
43 | #define UART_BAUD_REG 0x4 |
44 | |
45 | /* UART Misc Control register */ |
46 | #define UART_MCTL_REG 0x8 |
47 | #define UART_MCTL_DTR_SHIFT 0 |
48 | #define UART_MCTL_DTR_MASK (1 << UART_MCTL_DTR_SHIFT) |
49 | #define UART_MCTL_RTS_SHIFT 1 |
50 | #define UART_MCTL_RTS_MASK (1 << UART_MCTL_RTS_SHIFT) |
51 | #define UART_MCTL_RXFIFOTHRESH_SHIFT 8 |
52 | #define UART_MCTL_RXFIFOTHRESH_MASK (0xf << UART_MCTL_RXFIFOTHRESH_SHIFT) |
53 | #define UART_MCTL_TXFIFOTHRESH_SHIFT 12 |
54 | #define UART_MCTL_TXFIFOTHRESH_MASK (0xf << UART_MCTL_TXFIFOTHRESH_SHIFT) |
55 | #define UART_MCTL_RXFIFOFILL_SHIFT 16 |
56 | #define UART_MCTL_RXFIFOFILL_MASK (0x1f << UART_MCTL_RXFIFOFILL_SHIFT) |
57 | #define UART_MCTL_TXFIFOFILL_SHIFT 24 |
58 | #define UART_MCTL_TXFIFOFILL_MASK (0x1f << UART_MCTL_TXFIFOFILL_SHIFT) |
59 | |
60 | /* UART External Input Configuration register */ |
61 | #define UART_EXTINP_REG 0xc |
62 | #define UART_EXTINP_RI_SHIFT 0 |
63 | #define UART_EXTINP_RI_MASK (1 << UART_EXTINP_RI_SHIFT) |
64 | #define UART_EXTINP_CTS_SHIFT 1 |
65 | #define UART_EXTINP_CTS_MASK (1 << UART_EXTINP_CTS_SHIFT) |
66 | #define UART_EXTINP_DCD_SHIFT 2 |
67 | #define UART_EXTINP_DCD_MASK (1 << UART_EXTINP_DCD_SHIFT) |
68 | #define UART_EXTINP_DSR_SHIFT 3 |
69 | #define UART_EXTINP_DSR_MASK (1 << UART_EXTINP_DSR_SHIFT) |
70 | #define UART_EXTINP_IRSTAT(x) (1 << (x + 4)) |
71 | #define UART_EXTINP_IRMASK(x) (1 << (x + 8)) |
72 | #define UART_EXTINP_IR_RI 0 |
73 | #define UART_EXTINP_IR_CTS 1 |
74 | #define UART_EXTINP_IR_DCD 2 |
75 | #define UART_EXTINP_IR_DSR 3 |
76 | #define UART_EXTINP_RI_NOSENSE_SHIFT 16 |
77 | #define UART_EXTINP_RI_NOSENSE_MASK (1 << UART_EXTINP_RI_NOSENSE_SHIFT) |
78 | #define UART_EXTINP_CTS_NOSENSE_SHIFT 17 |
79 | #define UART_EXTINP_CTS_NOSENSE_MASK (1 << UART_EXTINP_CTS_NOSENSE_SHIFT) |
80 | #define UART_EXTINP_DCD_NOSENSE_SHIFT 18 |
81 | #define UART_EXTINP_DCD_NOSENSE_MASK (1 << UART_EXTINP_DCD_NOSENSE_SHIFT) |
82 | #define UART_EXTINP_DSR_NOSENSE_SHIFT 19 |
83 | #define UART_EXTINP_DSR_NOSENSE_MASK (1 << UART_EXTINP_DSR_NOSENSE_SHIFT) |
84 | |
85 | /* UART Interrupt register */ |
86 | #define UART_IR_REG 0x10 |
87 | #define UART_IR_MASK(x) (1 << (x + 16)) |
88 | #define UART_IR_STAT(x) (1 << (x)) |
89 | #define UART_IR_EXTIP 0 |
90 | #define UART_IR_TXUNDER 1 |
91 | #define UART_IR_TXOVER 2 |
92 | #define UART_IR_TXTRESH 3 |
93 | #define UART_IR_TXRDLATCH 4 |
94 | #define UART_IR_TXEMPTY 5 |
95 | #define UART_IR_RXUNDER 6 |
96 | #define UART_IR_RXOVER 7 |
97 | #define UART_IR_RXTIMEOUT 8 |
98 | #define UART_IR_RXFULL 9 |
99 | #define UART_IR_RXTHRESH 10 |
100 | #define UART_IR_RXNOTEMPTY 11 |
101 | #define UART_IR_RXFRAMEERR 12 |
102 | #define UART_IR_RXPARERR 13 |
103 | #define UART_IR_RXBRK 14 |
104 | #define UART_IR_TXDONE 15 |
105 | |
106 | /* UART Fifo register */ |
107 | #define UART_FIFO_REG 0x14 |
108 | #define UART_FIFO_VALID_SHIFT 0 |
109 | #define UART_FIFO_VALID_MASK 0xff |
110 | #define UART_FIFO_FRAMEERR_SHIFT 8 |
111 | #define UART_FIFO_FRAMEERR_MASK (1 << UART_FIFO_FRAMEERR_SHIFT) |
112 | #define UART_FIFO_PARERR_SHIFT 9 |
113 | #define UART_FIFO_PARERR_MASK (1 << UART_FIFO_PARERR_SHIFT) |
114 | #define UART_FIFO_BRKDET_SHIFT 10 |
115 | #define UART_FIFO_BRKDET_MASK (1 << UART_FIFO_BRKDET_SHIFT) |
116 | #define UART_FIFO_ANYERR_MASK (UART_FIFO_FRAMEERR_MASK | \ |
117 | UART_FIFO_PARERR_MASK | \ |
118 | UART_FIFO_BRKDET_MASK) |
119 | |
120 | #endif /* _LINUX_SERIAL_BCM63XX_H */ |
121 | |