| 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
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| 2 | /* |
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| 3 | * AMD ACP Driver |
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| 4 | * |
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| 5 | * Copyright (C) 2021 Advanced Micro Devices, Inc. All rights reserved. |
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| 6 | */ |
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| 7 | |
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| 8 | #include "rpl_acp6x_chip_offset_byte.h" |
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| 9 | |
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| 10 | #define ACP_DEVICE_ID 0x15E2 |
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| 11 | #define ACP6x_PHY_BASE_ADDRESS 0x1240000 |
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| 12 | |
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| 13 | #define ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK 0x00010001 |
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| 14 | #define ACP_PGFSM_CNTL_POWER_ON_MASK 1 |
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| 15 | #define ACP_PGFSM_CNTL_POWER_OFF_MASK 0 |
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| 16 | #define ACP_PGFSM_STATUS_MASK 3 |
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| 17 | #define ACP_POWERED_ON 0 |
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| 18 | #define ACP_POWER_ON_IN_PROGRESS 1 |
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| 19 | #define ACP_POWERED_OFF 2 |
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| 20 | #define ACP_POWER_OFF_IN_PROGRESS 3 |
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| 21 | |
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| 22 | #define DELAY_US 5 |
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| 23 | #define ACP_COUNTER 20000 |
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| 24 | |
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| 25 | /* time in ms for runtime suspend delay */ |
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| 26 | #define ACP_SUSPEND_DELAY_MS 2000 |
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| 27 | |
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| 28 | static inline u32 rpl_acp_readl(void __iomem *base_addr) |
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| 29 | { |
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| 30 | return readl(addr: base_addr - ACP6x_PHY_BASE_ADDRESS); |
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| 31 | } |
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| 32 | |
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| 33 | static inline void rpl_acp_writel(u32 val, void __iomem *base_addr) |
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| 34 | { |
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| 35 | writel(val, addr: base_addr - ACP6x_PHY_BASE_ADDRESS); |
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| 36 | } |
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| 37 | |
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