1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * soc-acpi-intel-tgl-match.c - tables and support for TGL ACPI enumeration.
4 *
5 * Copyright (c) 2019, Intel Corporation.
6 *
7 */
8
9#include <sound/soc-acpi.h>
10#include <sound/soc-acpi-intel-match.h>
11#include <sound/soc-acpi-intel-ssp-common.h>
12#include "soc-acpi-intel-sdw-mockup-match.h"
13
14static const struct snd_soc_acpi_codecs essx_83x6 = {
15 .num_codecs = 3,
16 .codecs = { "ESSX8316", "ESSX8326", "ESSX8336"},
17};
18
19static const struct snd_soc_acpi_endpoint single_endpoint = {
20 .num = 0,
21 .aggregated = 0,
22 .group_position = 0,
23 .group_id = 0,
24};
25
26static const struct snd_soc_acpi_endpoint spk_l_endpoint = {
27 .num = 0,
28 .aggregated = 1,
29 .group_position = 0,
30 .group_id = 1,
31};
32
33static const struct snd_soc_acpi_endpoint spk_r_endpoint = {
34 .num = 0,
35 .aggregated = 1,
36 .group_position = 1,
37 .group_id = 1,
38};
39
40static const struct snd_soc_acpi_endpoint spk_2_endpoint = {
41 .num = 0,
42 .aggregated = 1,
43 .group_position = 2,
44 .group_id = 1,
45};
46
47static const struct snd_soc_acpi_endpoint spk_3_endpoint = {
48 .num = 0,
49 .aggregated = 1,
50 .group_position = 3,
51 .group_id = 1,
52};
53
54static const struct snd_soc_acpi_endpoint rt712_endpoints[] = {
55 {
56 .num = 0,
57 .aggregated = 0,
58 .group_position = 0,
59 .group_id = 0,
60 },
61 {
62 .num = 1,
63 .aggregated = 0,
64 .group_position = 0,
65 .group_id = 0,
66 },
67};
68
69static const struct snd_soc_acpi_adr_device rt711_0_adr[] = {
70 {
71 .adr = 0x000020025D071100ull,
72 .num_endpoints = 1,
73 .endpoints = &single_endpoint,
74 .name_prefix = "rt711"
75 }
76};
77
78static const struct snd_soc_acpi_adr_device rt711_1_adr[] = {
79 {
80 .adr = 0x000120025D071100ull,
81 .num_endpoints = 1,
82 .endpoints = &single_endpoint,
83 .name_prefix = "rt711"
84 }
85};
86
87static const struct snd_soc_acpi_adr_device rt1308_1_dual_adr[] = {
88 {
89 .adr = 0x000120025D130800ull,
90 .num_endpoints = 1,
91 .endpoints = &spk_l_endpoint,
92 .name_prefix = "rt1308-1"
93 },
94 {
95 .adr = 0x000122025D130800ull,
96 .num_endpoints = 1,
97 .endpoints = &spk_r_endpoint,
98 .name_prefix = "rt1308-2"
99 }
100};
101
102static const struct snd_soc_acpi_adr_device rt1308_1_single_adr[] = {
103 {
104 .adr = 0x000120025D130800ull,
105 .num_endpoints = 1,
106 .endpoints = &single_endpoint,
107 .name_prefix = "rt1308-1"
108 }
109};
110
111static const struct snd_soc_acpi_adr_device rt1308_2_single_adr[] = {
112 {
113 .adr = 0x000220025D130800ull,
114 .num_endpoints = 1,
115 .endpoints = &single_endpoint,
116 .name_prefix = "rt1308-1"
117 }
118};
119
120static const struct snd_soc_acpi_adr_device rt1308_1_group1_adr[] = {
121 {
122 .adr = 0x000120025D130800ull,
123 .num_endpoints = 1,
124 .endpoints = &spk_l_endpoint,
125 .name_prefix = "rt1308-1"
126 }
127};
128
129static const struct snd_soc_acpi_adr_device rt1308_2_group1_adr[] = {
130 {
131 .adr = 0x000220025D130800ull,
132 .num_endpoints = 1,
133 .endpoints = &spk_r_endpoint,
134 .name_prefix = "rt1308-2"
135 }
136};
137
138static const struct snd_soc_acpi_adr_device rt715_0_adr[] = {
139 {
140 .adr = 0x000021025D071500ull,
141 .num_endpoints = 1,
142 .endpoints = &single_endpoint,
143 .name_prefix = "rt715"
144 }
145};
146
147static const struct snd_soc_acpi_adr_device rt715_3_adr[] = {
148 {
149 .adr = 0x000320025D071500ull,
150 .num_endpoints = 1,
151 .endpoints = &single_endpoint,
152 .name_prefix = "rt715"
153 }
154};
155
156static const struct snd_soc_acpi_adr_device mx8373_1_adr[] = {
157 {
158 .adr = 0x000123019F837300ull,
159 .num_endpoints = 1,
160 .endpoints = &spk_r_endpoint,
161 .name_prefix = "Right"
162 },
163 {
164 .adr = 0x000127019F837300ull,
165 .num_endpoints = 1,
166 .endpoints = &spk_l_endpoint,
167 .name_prefix = "Left"
168 }
169};
170
171static const struct snd_soc_acpi_adr_device rt5682_0_adr[] = {
172 {
173 .adr = 0x000021025D568200ull,
174 .num_endpoints = 1,
175 .endpoints = &single_endpoint,
176 .name_prefix = "rt5682"
177 }
178};
179
180static const struct snd_soc_acpi_adr_device rt711_sdca_0_adr[] = {
181 {
182 .adr = 0x000030025D071101ull,
183 .num_endpoints = 1,
184 .endpoints = &single_endpoint,
185 .name_prefix = "rt711"
186 }
187};
188
189static const struct snd_soc_acpi_adr_device rt1316_1_single_adr[] = {
190 {
191 .adr = 0x000131025D131601ull,
192 .num_endpoints = 1,
193 .endpoints = &single_endpoint,
194 .name_prefix = "rt1316-1"
195 }
196};
197
198static const struct snd_soc_acpi_adr_device rt712_0_single_adr[] = {
199 {
200 .adr = 0x000030025D071201ull,
201 .num_endpoints = ARRAY_SIZE(rt712_endpoints),
202 .endpoints = rt712_endpoints,
203 .name_prefix = "rt712"
204 }
205};
206
207static const struct snd_soc_acpi_adr_device rt1712_1_single_adr[] = {
208 {
209 .adr = 0x000130025D171201ull,
210 .num_endpoints = 1,
211 .endpoints = &single_endpoint,
212 .name_prefix = "rt712-dmic"
213 }
214};
215
216static const struct snd_soc_acpi_adr_device rt1316_1_group1_adr[] = {
217 {
218 .adr = 0x000131025D131601ull, /* unique ID is set for some reason */
219 .num_endpoints = 1,
220 .endpoints = &spk_l_endpoint,
221 .name_prefix = "rt1316-1"
222 }
223};
224
225static const struct snd_soc_acpi_adr_device rt1316_2_group1_adr[] = {
226 {
227 .adr = 0x000230025D131601ull,
228 .num_endpoints = 1,
229 .endpoints = &spk_r_endpoint,
230 .name_prefix = "rt1316-2"
231 }
232};
233
234static const struct snd_soc_acpi_adr_device rt714_3_adr[] = {
235 {
236 .adr = 0x000330025D071401ull,
237 .num_endpoints = 1,
238 .endpoints = &single_endpoint,
239 .name_prefix = "rt714"
240 }
241};
242
243static const struct snd_soc_acpi_link_adr tgl_rvp[] = {
244 {
245 .mask = BIT(0),
246 .num_adr = ARRAY_SIZE(rt711_0_adr),
247 .adr_d = rt711_0_adr,
248 },
249 {
250 .mask = BIT(1),
251 .num_adr = ARRAY_SIZE(rt1308_1_dual_adr),
252 .adr_d = rt1308_1_dual_adr,
253 },
254 {}
255};
256
257static const struct snd_soc_acpi_link_adr tgl_rvp_headset_only[] = {
258 {
259 .mask = BIT(0),
260 .num_adr = ARRAY_SIZE(rt711_0_adr),
261 .adr_d = rt711_0_adr,
262 },
263 {}
264};
265
266static const struct snd_soc_acpi_link_adr tgl_hp[] = {
267 {
268 .mask = BIT(0),
269 .num_adr = ARRAY_SIZE(rt711_0_adr),
270 .adr_d = rt711_0_adr,
271 },
272 {
273 .mask = BIT(1),
274 .num_adr = ARRAY_SIZE(rt1308_1_single_adr),
275 .adr_d = rt1308_1_single_adr,
276 },
277 {}
278};
279
280static const struct snd_soc_acpi_link_adr tgl_chromebook_base[] = {
281 {
282 .mask = BIT(0),
283 .num_adr = ARRAY_SIZE(rt5682_0_adr),
284 .adr_d = rt5682_0_adr,
285 },
286 {
287 .mask = BIT(1),
288 .num_adr = ARRAY_SIZE(mx8373_1_adr),
289 .adr_d = mx8373_1_adr,
290 },
291 {}
292};
293
294static const struct snd_soc_acpi_link_adr tgl_3_in_1_default[] = {
295 {
296 .mask = BIT(0),
297 .num_adr = ARRAY_SIZE(rt711_0_adr),
298 .adr_d = rt711_0_adr,
299 },
300 {
301 .mask = BIT(1),
302 .num_adr = ARRAY_SIZE(rt1308_1_group1_adr),
303 .adr_d = rt1308_1_group1_adr,
304 },
305 {
306 .mask = BIT(2),
307 .num_adr = ARRAY_SIZE(rt1308_2_group1_adr),
308 .adr_d = rt1308_2_group1_adr,
309 },
310 {
311 .mask = BIT(3),
312 .num_adr = ARRAY_SIZE(rt715_3_adr),
313 .adr_d = rt715_3_adr,
314 },
315 {}
316};
317
318static const struct snd_soc_acpi_link_adr tgl_3_in_1_mono_amp[] = {
319 {
320 .mask = BIT(0),
321 .num_adr = ARRAY_SIZE(rt711_0_adr),
322 .adr_d = rt711_0_adr,
323 },
324 {
325 .mask = BIT(1),
326 .num_adr = ARRAY_SIZE(rt1308_1_single_adr),
327 .adr_d = rt1308_1_single_adr,
328 },
329 {
330 .mask = BIT(3),
331 .num_adr = ARRAY_SIZE(rt715_3_adr),
332 .adr_d = rt715_3_adr,
333 },
334 {}
335};
336
337static const struct snd_soc_acpi_link_adr tgl_sdw_rt711_link1_rt1308_link2_rt715_link0[] = {
338 {
339 .mask = BIT(1),
340 .num_adr = ARRAY_SIZE(rt711_1_adr),
341 .adr_d = rt711_1_adr,
342 },
343 {
344 .mask = BIT(2),
345 .num_adr = ARRAY_SIZE(rt1308_2_single_adr),
346 .adr_d = rt1308_2_single_adr,
347 },
348 {
349 .mask = BIT(0),
350 .num_adr = ARRAY_SIZE(rt715_0_adr),
351 .adr_d = rt715_0_adr,
352 },
353 {}
354};
355
356static const struct snd_soc_acpi_link_adr tgl_3_in_1_sdca[] = {
357 {
358 .mask = BIT(0),
359 .num_adr = ARRAY_SIZE(rt711_sdca_0_adr),
360 .adr_d = rt711_sdca_0_adr,
361 },
362 {
363 .mask = BIT(1),
364 .num_adr = ARRAY_SIZE(rt1316_1_group1_adr),
365 .adr_d = rt1316_1_group1_adr,
366 },
367 {
368 .mask = BIT(2),
369 .num_adr = ARRAY_SIZE(rt1316_2_group1_adr),
370 .adr_d = rt1316_2_group1_adr,
371 },
372 {
373 .mask = BIT(3),
374 .num_adr = ARRAY_SIZE(rt714_3_adr),
375 .adr_d = rt714_3_adr,
376 },
377 {}
378};
379
380static const struct snd_soc_acpi_link_adr tgl_3_in_1_sdca_mono[] = {
381 {
382 .mask = BIT(0),
383 .num_adr = ARRAY_SIZE(rt711_sdca_0_adr),
384 .adr_d = rt711_sdca_0_adr,
385 },
386 {
387 .mask = BIT(1),
388 .num_adr = ARRAY_SIZE(rt1316_1_single_adr),
389 .adr_d = rt1316_1_single_adr,
390 },
391 {
392 .mask = BIT(3),
393 .num_adr = ARRAY_SIZE(rt714_3_adr),
394 .adr_d = rt714_3_adr,
395 },
396 {}
397};
398
399static const struct snd_soc_acpi_link_adr tgl_712_only[] = {
400 {
401 .mask = BIT(0),
402 .num_adr = ARRAY_SIZE(rt712_0_single_adr),
403 .adr_d = rt712_0_single_adr,
404 },
405 {
406 .mask = BIT(1),
407 .num_adr = ARRAY_SIZE(rt1712_1_single_adr),
408 .adr_d = rt1712_1_single_adr,
409 },
410 {}
411};
412
413static const struct snd_soc_acpi_endpoint cs42l43_endpoints[] = {
414 { /* Jack Playback Endpoint */
415 .num = 0,
416 .aggregated = 0,
417 .group_position = 0,
418 .group_id = 0,
419 },
420 { /* DMIC Capture Endpoint */
421 .num = 1,
422 .aggregated = 0,
423 .group_position = 0,
424 .group_id = 0,
425 },
426 { /* Jack Capture Endpoint */
427 .num = 2,
428 .aggregated = 0,
429 .group_position = 0,
430 .group_id = 0,
431 },
432 { /* Speaker Playback Endpoint */
433 .num = 3,
434 .aggregated = 0,
435 .group_position = 0,
436 .group_id = 0,
437 },
438};
439
440static const struct snd_soc_acpi_adr_device cs42l43_3_adr[] = {
441 {
442 .adr = 0x00033001FA424301ull,
443 .num_endpoints = ARRAY_SIZE(cs42l43_endpoints),
444 .endpoints = cs42l43_endpoints,
445 .name_prefix = "cs42l43"
446 }
447};
448
449static const struct snd_soc_acpi_adr_device cs35l56_0_adr[] = {
450 {
451 .adr = 0x00003301FA355601ull,
452 .num_endpoints = 1,
453 .endpoints = &spk_r_endpoint,
454 .name_prefix = "AMP1"
455 },
456 {
457 .adr = 0x00003201FA355601ull,
458 .num_endpoints = 1,
459 .endpoints = &spk_3_endpoint,
460 .name_prefix = "AMP2"
461 }
462};
463
464static const struct snd_soc_acpi_adr_device cs35l56_1_adr[] = {
465 {
466 .adr = 0x00013701FA355601ull,
467 .num_endpoints = 1,
468 .endpoints = &spk_l_endpoint,
469 .name_prefix = "AMP3"
470 },
471 {
472 .adr = 0x00013601FA355601ull,
473 .num_endpoints = 1,
474 .endpoints = &spk_2_endpoint,
475 .name_prefix = "AMP4"
476 }
477};
478
479static const struct snd_soc_acpi_link_adr tgl_cs42l43_cs35l56[] = {
480 {
481 .mask = BIT(3),
482 .num_adr = ARRAY_SIZE(cs42l43_3_adr),
483 .adr_d = cs42l43_3_adr,
484 },
485 {
486 .mask = BIT(0),
487 .num_adr = ARRAY_SIZE(cs35l56_0_adr),
488 .adr_d = cs35l56_0_adr,
489 },
490 {
491 .mask = BIT(1),
492 .num_adr = ARRAY_SIZE(cs35l56_1_adr),
493 .adr_d = cs35l56_1_adr,
494 },
495 {}
496};
497
498static const struct snd_soc_acpi_codecs tgl_rt5682_rt5682s_hp = {
499 .num_codecs = 2,
500 .codecs = {RT5682_ACPI_HID, RT5682S_ACPI_HID},
501};
502
503static const struct snd_soc_acpi_codecs tgl_lt6911_hdmi = {
504 .num_codecs = 1,
505 .codecs = {"INTC10B0"}
506};
507
508struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_machines[] = {
509 {
510 .comp_ids = &essx_83x6,
511 .drv_name = "sof-essx8336",
512 .sof_tplg_filename = "sof-tgl-es8336", /* the tplg suffix is added at run time */
513 .tplg_quirk_mask = SND_SOC_ACPI_TPLG_INTEL_SSP_NUMBER |
514 SND_SOC_ACPI_TPLG_INTEL_SSP_MSB |
515 SND_SOC_ACPI_TPLG_INTEL_DMIC_NUMBER,
516 },
517 /* place boards for each headphone codec: sof driver will complete the
518 * tplg name and machine driver will detect the amp type
519 */
520 {
521 .comp_ids = &tgl_rt5682_rt5682s_hp,
522 .drv_name = "tgl_rt5682_def",
523 .sof_tplg_filename = "sof-tgl", /* the tplg suffix is added at run time */
524 .tplg_quirk_mask = SND_SOC_ACPI_TPLG_INTEL_AMP_NAME |
525 SND_SOC_ACPI_TPLG_INTEL_CODEC_NAME,
526 },
527 /* place amp-only boards in the end of table */
528 {
529 .id = "10EC1308",
530 .drv_name = "tgl_rt1308_hdmi_ssp",
531 .machine_quirk = snd_soc_acpi_codec_list,
532 .quirk_data = &tgl_lt6911_hdmi,
533 .sof_tplg_filename = "sof-tgl-rt1308-ssp2-hdmi-ssp15.tplg"
534 },
535 {},
536};
537EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_machines);
538
539static const struct snd_soc_acpi_endpoint cs35l56_l_fb_endpoints[] = {
540 { /* Speaker Playback Endpoint */
541 .num = 0,
542 .aggregated = 1,
543 .group_position = 0,
544 .group_id = 1,
545 },
546 { /* Feedback Capture Endpoint */
547 .num = 1,
548 .aggregated = 1,
549 .group_position = 0,
550 .group_id = 2,
551 },
552};
553
554static const struct snd_soc_acpi_endpoint cs35l56_r_fb_endpoints[] = {
555 { /* Speaker Playback Endpoint */
556 .num = 0,
557 .aggregated = 1,
558 .group_position = 1,
559 .group_id = 1,
560 },
561 { /* Feedback Capture Endpoint */
562 .num = 1,
563 .aggregated = 1,
564 .group_position = 1,
565 .group_id = 2,
566 },
567};
568
569static const struct snd_soc_acpi_endpoint cs35l56_2_fb_endpoints[] = {
570 { /* Speaker Playback Endpoint */
571 .num = 0,
572 .aggregated = 1,
573 .group_position = 2,
574 .group_id = 1,
575 },
576 { /* Feedback Capture Endpoint */
577 .num = 1,
578 .aggregated = 1,
579 .group_position = 2,
580 .group_id = 2,
581 },
582};
583
584static const struct snd_soc_acpi_endpoint cs35l56_3_fb_endpoints[] = {
585 { /* Speaker Playback Endpoint */
586 .num = 0,
587 .aggregated = 1,
588 .group_position = 3,
589 .group_id = 1,
590 },
591 { /* Feedback Capture Endpoint */
592 .num = 1,
593 .aggregated = 1,
594 .group_position = 3,
595 .group_id = 2,
596 },
597};
598
599static const struct snd_soc_acpi_endpoint cs35l56_4_fb_endpoints[] = {
600 { /* Speaker Playback Endpoint */
601 .num = 0,
602 .aggregated = 1,
603 .group_position = 4,
604 .group_id = 1,
605 },
606 { /* Feedback Capture Endpoint */
607 .num = 1,
608 .aggregated = 1,
609 .group_position = 4,
610 .group_id = 2,
611 }
612};
613
614static const struct snd_soc_acpi_endpoint cs35l56_5_fb_endpoints[] = {
615 { /* Speaker Playback Endpoint */
616 .num = 0,
617 .aggregated = 1,
618 .group_position = 5,
619 .group_id = 1,
620 },
621 { /* Feedback Capture Endpoint */
622 .num = 1,
623 .aggregated = 1,
624 .group_position = 5,
625 .group_id = 2,
626 }
627};
628
629static const struct snd_soc_acpi_endpoint cs35l56_6_fb_endpoints[] = {
630 { /* Speaker Playback Endpoint */
631 .num = 0,
632 .aggregated = 1,
633 .group_position = 6,
634 .group_id = 1,
635 },
636 { /* Feedback Capture Endpoint */
637 .num = 1,
638 .aggregated = 1,
639 .group_position = 6,
640 .group_id = 2,
641 }
642};
643
644static const struct snd_soc_acpi_endpoint cs35l56_7_fb_endpoints[] = {
645 { /* Speaker Playback Endpoint */
646 .num = 0,
647 .aggregated = 1,
648 .group_position = 7,
649 .group_id = 1,
650 },
651 { /* Feedback Capture Endpoint */
652 .num = 1,
653 .aggregated = 1,
654 .group_position = 7,
655 .group_id = 2,
656 }
657};
658
659static const struct snd_soc_acpi_adr_device cs35l56_sdw_eight_1_4_fb_adr[] = {
660 {
661 .adr = 0x00003301fa355601ull,
662 .num_endpoints = ARRAY_SIZE(cs35l56_l_fb_endpoints),
663 .endpoints = cs35l56_l_fb_endpoints,
664 .name_prefix = "AMP1"
665 },
666 {
667 .adr = 0x00003201fa355601ull,
668 .num_endpoints = ARRAY_SIZE(cs35l56_2_fb_endpoints),
669 .endpoints = cs35l56_2_fb_endpoints,
670 .name_prefix = "AMP2"
671 },
672 {
673 .adr = 0x00003101fa355601ull,
674 .num_endpoints = ARRAY_SIZE(cs35l56_4_fb_endpoints),
675 .endpoints = cs35l56_4_fb_endpoints,
676 .name_prefix = "AMP3"
677 },
678 {
679 .adr = 0x00003001fa355601ull,
680 .num_endpoints = ARRAY_SIZE(cs35l56_6_fb_endpoints),
681 .endpoints = cs35l56_6_fb_endpoints,
682 .name_prefix = "AMP4"
683 },
684};
685
686static const struct snd_soc_acpi_adr_device cs35l56_sdw_eight_5_8_fb_adr[] = {
687 {
688 .adr = 0x00013701fa355601ull,
689 .num_endpoints = ARRAY_SIZE(cs35l56_r_fb_endpoints),
690 .endpoints = cs35l56_r_fb_endpoints,
691 .name_prefix = "AMP8"
692 },
693 {
694 .adr = 0x00013601fa355601ull,
695 .num_endpoints = ARRAY_SIZE(cs35l56_3_fb_endpoints),
696 .endpoints = cs35l56_3_fb_endpoints,
697 .name_prefix = "AMP7"
698 },
699 {
700 .adr = 0x00013501fa355601ull,
701 .num_endpoints = ARRAY_SIZE(cs35l56_5_fb_endpoints),
702 .endpoints = cs35l56_5_fb_endpoints,
703 .name_prefix = "AMP6"
704 },
705 {
706 .adr = 0x00013401fa355601ull,
707 .num_endpoints = ARRAY_SIZE(cs35l56_7_fb_endpoints),
708 .endpoints = cs35l56_7_fb_endpoints,
709 .name_prefix = "AMP5"
710 },
711};
712
713static const struct snd_soc_acpi_link_adr up_extreme_cs35l56_sdw_eight[] = {
714 {
715 .mask = BIT(1),
716 .num_adr = ARRAY_SIZE(cs35l56_sdw_eight_5_8_fb_adr),
717 .adr_d = cs35l56_sdw_eight_5_8_fb_adr,
718 },
719 {
720 .mask = BIT(0),
721 .num_adr = ARRAY_SIZE(cs35l56_sdw_eight_1_4_fb_adr),
722 .adr_d = cs35l56_sdw_eight_1_4_fb_adr,
723 },
724 {}
725};
726
727/* this table is used when there is no I2S codec present */
728struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_sdw_machines[] = {
729 /* mockup tests need to be first */
730 {
731 .link_mask = GENMASK(3, 0),
732 .links = sdw_mockup_headset_2amps_mic,
733 .drv_name = "sof_sdw",
734 .sof_tplg_filename = "sof-tgl-rt711-rt1308-rt715.tplg",
735 },
736 {
737 .link_mask = BIT(0) | BIT(1) | BIT(3),
738 .links = sdw_mockup_headset_1amp_mic,
739 .drv_name = "sof_sdw",
740 .sof_tplg_filename = "sof-tgl-rt711-rt1308-mono-rt715.tplg",
741 },
742 {
743 .link_mask = BIT(0) | BIT(1) | BIT(2),
744 .links = sdw_mockup_mic_headset_1amp,
745 .drv_name = "sof_sdw",
746 .sof_tplg_filename = "sof-tgl-rt715-rt711-rt1308-mono.tplg",
747 },
748 {
749 .link_mask = 0xF, /* 4 active links required */
750 .links = tgl_712_only,
751 .drv_name = "sof_sdw",
752 .sof_tplg_filename = "sof-tgl-rt712.tplg",
753 },
754 {
755 .link_mask = 0x7,
756 .links = tgl_sdw_rt711_link1_rt1308_link2_rt715_link0,
757 .drv_name = "sof_sdw",
758 .sof_tplg_filename = "sof-tgl-rt715-rt711-rt1308-mono.tplg",
759 },
760 {
761 .link_mask = 0xB,
762 .links = tgl_cs42l43_cs35l56,
763 .drv_name = "sof_sdw",
764 .sof_tplg_filename = "sof-tgl-cs42l43-l3-cs35l56-l01.tplg",
765 },
766 {
767 .link_mask = 0xF, /* 4 active links required */
768 .links = tgl_3_in_1_default,
769 .drv_name = "sof_sdw",
770 .sof_tplg_filename = "sof-tgl-rt711-rt1308-rt715.tplg",
771 },
772 {
773 /*
774 * link_mask should be 0xB, but all links are enabled by BIOS.
775 * This entry will be selected if there is no rt1308 exposed
776 * on link2 since it will fail to match the above entry.
777 */
778 .link_mask = 0xF,
779 .links = tgl_3_in_1_mono_amp,
780 .drv_name = "sof_sdw",
781 .sof_tplg_filename = "sof-tgl-rt711-rt1308-mono-rt715.tplg",
782 },
783 {
784 .link_mask = 0xF, /* 4 active links required */
785 .links = tgl_3_in_1_sdca,
786 .drv_name = "sof_sdw",
787 .sof_tplg_filename = "sof-tgl-rt711-rt1316-rt714.tplg",
788 },
789 {
790 /*
791 * link_mask should be 0xB, but all links are enabled by BIOS.
792 * This entry will be selected if there is no rt1316 amplifier exposed
793 * on link2 since it will fail to match the above entry.
794 */
795
796 .link_mask = 0xF, /* 4 active links required */
797 .links = tgl_3_in_1_sdca_mono,
798 .drv_name = "sof_sdw",
799 .sof_tplg_filename = "sof-tgl-rt711-l0-rt1316-l1-mono-rt714-l3.tplg",
800 },
801
802 {
803 .link_mask = 0x3, /* rt711 on link 0 and 1 rt1308 on link 1 */
804 .links = tgl_hp,
805 .drv_name = "sof_sdw",
806 .sof_tplg_filename = "sof-tgl-rt711-rt1308.tplg",
807 },
808 {
809 .link_mask = 0x3, /* rt711 on link 0 and 2 rt1308s on link 1 */
810 .links = tgl_rvp,
811 .drv_name = "sof_sdw",
812 .sof_tplg_filename = "sof-tgl-rt711-rt1308.tplg",
813 },
814 {
815 .link_mask = 0x3, /* rt5682 on link0 & 2xmax98373 on link 1 */
816 .links = tgl_chromebook_base,
817 .drv_name = "sof_sdw",
818 .sof_tplg_filename = "sof-tgl-sdw-max98373-rt5682.tplg",
819 },
820 {
821 .link_mask = 0x1, /* rt711 on link 0 */
822 .links = tgl_rvp_headset_only,
823 .drv_name = "sof_sdw",
824 .sof_tplg_filename = "sof-tgl-rt711.tplg",
825 },
826 {
827 .link_mask = BIT(0) | BIT(1),
828 .links = up_extreme_cs35l56_sdw_eight,
829 .drv_name = "sof_sdw",
830 .sof_tplg_filename = "sof-tgl-cs35l56-l01-fb8.tplg"
831 },
832 {},
833};
834EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_sdw_machines);
835

source code of linux/sound/soc/intel/common/soc-acpi-intel-tgl-match.c