1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * mt8189-afe-common.h -- Mediatek 8189 audio driver definitions
4 *
5 * Copyright (c) 2025 MediaTek Inc.
6 * Author: Darren Ye <darren.ye@mediatek.com>
7 */
8
9#ifndef _MT_8189_AFE_COMMON_H_
10#define _MT_8189_AFE_COMMON_H_
11
12#include <linux/regmap.h>
13
14#include <sound/soc.h>
15
16#include "mt8189-reg.h"
17#include "../common/mtk-base-afe.h"
18
19enum {
20 MTK_AFE_RATE_8K,
21 MTK_AFE_RATE_11K,
22 MTK_AFE_RATE_12K,
23 MTK_AFE_RATE_384K,
24 MTK_AFE_RATE_16K,
25 MTK_AFE_RATE_22K,
26 MTK_AFE_RATE_24K,
27 MTK_AFE_RATE_352K,
28 MTK_AFE_RATE_32K,
29 MTK_AFE_RATE_44K,
30 MTK_AFE_RATE_48K,
31 MTK_AFE_RATE_88K,
32 MTK_AFE_RATE_96K,
33 MTK_AFE_RATE_176K,
34 MTK_AFE_RATE_192K,
35 MTK_AFE_RATE_260K,
36};
37
38/* HW IPM 2.0 */
39enum {
40 MTK_AFE_IPM2P0_RATE_8K = 0x0,
41 MTK_AFE_IPM2P0_RATE_11K = 0x1,
42 MTK_AFE_IPM2P0_RATE_12K = 0x2,
43 MTK_AFE_IPM2P0_RATE_16K = 0x4,
44 MTK_AFE_IPM2P0_RATE_22K = 0x5,
45 MTK_AFE_IPM2P0_RATE_24K = 0x6,
46 MTK_AFE_IPM2P0_RATE_32K = 0x8,
47 MTK_AFE_IPM2P0_RATE_44K = 0x9,
48 MTK_AFE_IPM2P0_RATE_48K = 0xa,
49 MTK_AFE_IPM2P0_RATE_88K = 0xd,
50 MTK_AFE_IPM2P0_RATE_96K = 0xe,
51 MTK_AFE_IPM2P0_RATE_176K = 0x11,
52 MTK_AFE_IPM2P0_RATE_192K = 0x12,
53 MTK_AFE_IPM2P0_RATE_352K = 0x15,
54 MTK_AFE_IPM2P0_RATE_384K = 0x16,
55};
56
57enum {
58 MTK_AFE_DAI_MEMIF_RATE_8K,
59 MTK_AFE_DAI_MEMIF_RATE_16K,
60 MTK_AFE_DAI_MEMIF_RATE_32K,
61 MTK_AFE_DAI_MEMIF_RATE_48K,
62};
63
64enum {
65 MTK_AFE_PCM_RATE_8K,
66 MTK_AFE_PCM_RATE_16K,
67 MTK_AFE_PCM_RATE_32K,
68 MTK_AFE_PCM_RATE_48K,
69};
70
71enum {
72 MTKAIF_PROTOCOL_1,
73 MTKAIF_PROTOCOL_2,
74 MTKAIF_PROTOCOL_2_CLK_P2,
75};
76
77enum {
78 MT8189_MEMIF_DL0,
79 MT8189_MEMIF_DL1,
80 MT8189_MEMIF_DL2,
81 MT8189_MEMIF_DL3,
82 MT8189_MEMIF_DL4,
83 MT8189_MEMIF_DL5,
84 MT8189_MEMIF_DL6,
85 MT8189_MEMIF_DL7,
86 MT8189_MEMIF_DL8,
87 MT8189_MEMIF_DL23,
88 MT8189_MEMIF_DL24,
89 MT8189_MEMIF_DL25,
90 MT8189_MEMIF_DL_24CH,
91 MT8189_MEMIF_VUL0,
92 MT8189_MEMIF_VUL1,
93 MT8189_MEMIF_VUL2,
94 MT8189_MEMIF_VUL3,
95 MT8189_MEMIF_VUL4,
96 MT8189_MEMIF_VUL5,
97 MT8189_MEMIF_VUL6,
98 MT8189_MEMIF_VUL7,
99 MT8189_MEMIF_VUL8,
100 MT8189_MEMIF_VUL9,
101 MT8189_MEMIF_VUL10,
102 MT8189_MEMIF_VUL24,
103 MT8189_MEMIF_VUL25,
104 MT8189_MEMIF_VUL_CM0,
105 MT8189_MEMIF_VUL_CM1,
106 MT8189_MEMIF_ETDM_IN0,
107 MT8189_MEMIF_ETDM_IN1,
108 MT8189_MEMIF_HDMI,
109 MT8189_MEMIF_NUM,
110 MT8189_DAI_ADDA = MT8189_MEMIF_NUM,
111 MT8189_DAI_ADDA_CH34,
112 MT8189_DAI_ADDA_CH56,
113 MT8189_DAI_AP_DMIC,
114 MT8189_DAI_AP_DMIC_CH34,
115 MT8189_DAI_I2S_IN0,
116 MT8189_DAI_I2S_IN1,
117 MT8189_DAI_I2S_OUT0,
118 MT8189_DAI_I2S_OUT1,
119 MT8189_DAI_I2S_OUT4,
120 MT8189_DAI_PCM_0,
121 MT8189_DAI_TDM,
122 MT8189_DAI_TDM_DPTX,
123 MT8189_DAI_NUM,
124};
125
126/* update irq ID (= enum) from AFE_IRQ_MCU_STATUS */
127enum {
128 MT8189_IRQ_0,
129 MT8189_IRQ_1,
130 MT8189_IRQ_2,
131 MT8189_IRQ_3,
132 MT8189_IRQ_4,
133 MT8189_IRQ_5,
134 MT8189_IRQ_6,
135 MT8189_IRQ_7,
136 MT8189_IRQ_8,
137 MT8189_IRQ_9,
138 MT8189_IRQ_10,
139 MT8189_IRQ_11,
140 MT8189_IRQ_12,
141 MT8189_IRQ_13,
142 MT8189_IRQ_14,
143 MT8189_IRQ_15,
144 MT8189_IRQ_16,
145 MT8189_IRQ_17,
146 MT8189_IRQ_18,
147 MT8189_IRQ_19,
148 MT8189_IRQ_20,
149 MT8189_IRQ_21,
150 MT8189_IRQ_22,
151 MT8189_IRQ_23,
152 MT8189_IRQ_24,
153 MT8189_IRQ_25,
154 MT8189_IRQ_26,
155 MT8189_IRQ_31,
156 MT8189_IRQ_NUM,
157};
158
159/* update irq ID (= enum) from AFE_IRQ_MCU_STATUS */
160enum {
161 MT8189_CUS_IRQ_TDM, /* used only for TDM */
162 MT8189_CUS_IRQ_NUM,
163};
164
165enum {
166 /* AUDIO_ENGEN_CON0 */
167 MT8189_AUDIO_26M_EN_ON,
168 MT8189_AUDIO_F3P25M_EN_ON,
169 MT8189_AUDIO_APLL1_EN_ON,
170 MT8189_AUDIO_APLL2_EN_ON,
171 MT8189_AUDIO_F26M_EN_RST,
172 MT8189_MULTI_USER_RST,
173 MT8189_MULTI_USER_BYPASS,
174 /* AUDIO_TOP_CON4 */
175 MT8189_CG_AUDIO_HOPPING_CK,
176 MT8189_CG_AUDIO_F26M_CK,
177 MT8189_CG_APLL1_CK,
178 MT8189_CG_APLL2_CK,
179 MT8189_PDN_APLL_TUNER2,
180 MT8189_PDN_APLL_TUNER1,
181 MT8189_AUDIO_CG_NUM,
182};
183
184/* MCLK */
185enum {
186 MT8189_I2SIN0_MCK,
187 MT8189_I2SIN1_MCK,
188 MT8189_I2SOUT0_MCK,
189 MT8189_I2SOUT1_MCK,
190 MT8189_FMI2S_MCK,
191 MT8189_TDMOUT_MCK,
192 MT8189_TDMOUT_BCK,
193 MT8189_MCK_NUM,
194};
195
196enum {
197 CM0,
198 CM1,
199 CM_NUM,
200};
201
202struct clk;
203
204struct mt8189_afe_private {
205 struct clk **clk;
206 struct regmap *pmic_regmap;
207
208 /* dai */
209 void *dai_priv[MT8189_DAI_NUM];
210
211 /* adda */
212 int mtkaif_protocol;
213 int mtkaif_chosen_phase[4];
214 int mtkaif_phase_cycle[4];
215 int mtkaif_calibration_num_phase;
216 int mtkaif_dmic;
217 int mtkaif_dmic_ch34;
218
219 /* add for vs1 voter */
220 bool is_adda_dl_on;
221 bool is_adda_ul_on;
222 /* adda dl vol idx is at maximum */
223 bool is_adda_dl_max_vol;
224 /* current vote status of vs1 */
225 bool is_mt6363_vote;
226
227 /* mck */
228 int mck_rate[MT8189_MCK_NUM];
229
230 /* channel merge */
231 unsigned int cm_rate[CM_NUM];
232 unsigned int cm_channels;
233};
234
235int mt8189_dai_adda_register(struct mtk_base_afe *afe);
236int mt8189_dai_i2s_register(struct mtk_base_afe *afe);
237int mt8189_dai_pcm_register(struct mtk_base_afe *afe);
238int mt8189_dai_tdm_register(struct mtk_base_afe *afe);
239
240#endif
241

source code of linux/sound/soc/mediatek/mt8189/mt8189-afe-common.h