1//===- llvm/CallingConv.h - LLVM Calling Conventions ------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines LLVM's set of calling conventions.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_IR_CALLINGCONV_H
14#define LLVM_IR_CALLINGCONV_H
15
16namespace llvm {
17
18/// CallingConv Namespace - This namespace contains an enum with a value for
19/// the well-known calling conventions.
20///
21namespace CallingConv {
22
23 /// LLVM IR allows to use arbitrary numbers as calling convention identifiers.
24 using ID = unsigned;
25
26 /// A set of enums which specify the assigned numeric values for known llvm
27 /// calling conventions.
28 /// LLVM Calling Convention Representation
29 enum {
30 /// The default llvm calling convention, compatible with C. This convention
31 /// is the only one that supports varargs calls. As with typical C calling
32 /// conventions, the callee/caller have to tolerate certain amounts of
33 /// prototype mismatch.
34 C = 0,
35
36 // Generic LLVM calling conventions. None of these support varargs calls,
37 // and all assume that the caller and callee prototype exactly match.
38
39 /// Attempts to make calls as fast as possible (e.g. by passing things in
40 /// registers).
41 Fast = 8,
42
43 /// Attempts to make code in the caller as efficient as possible under the
44 /// assumption that the call is not commonly executed. As such, these calls
45 /// often preserve all registers so that the call does not break any live
46 /// ranges in the caller side.
47 Cold = 9,
48
49 /// Used by the Glasgow Haskell Compiler (GHC).
50 GHC = 10,
51
52 /// Used by the High-Performance Erlang Compiler (HiPE).
53 HiPE = 11,
54
55 /// OBSOLETED - Used for stack based JavaScript calls
56 // WebKit_JS = 12,
57
58 /// Used for dynamic register based calls (e.g. stackmap and patchpoint
59 /// intrinsics).
60 AnyReg = 13,
61
62 /// Used for runtime calls that preserves most registers.
63 PreserveMost = 14,
64
65 /// Used for runtime calls that preserves (almost) all registers.
66 PreserveAll = 15,
67
68 /// Calling convention for Swift.
69 Swift = 16,
70
71 /// Used for access functions.
72 CXX_FAST_TLS = 17,
73
74 /// Attemps to make calls as fast as possible while guaranteeing that tail
75 /// call optimization can always be performed.
76 Tail = 18,
77
78 /// Special calling convention on Windows for calling the Control Guard
79 /// Check ICall funtion. The function takes exactly one argument (address of
80 /// the target function) passed in the first argument register, and has no
81 /// return value. All register values are preserved.
82 CFGuard_Check = 19,
83
84 /// This follows the Swift calling convention in how arguments are passed
85 /// but guarantees tail calls will be made by making the callee clean up
86 /// their stack.
87 SwiftTail = 20,
88
89 /// Used for runtime calls that preserves none general registers.
90 PreserveNone = 21,
91
92 /// This is the start of the target-specific calling conventions, e.g.
93 /// fastcall and thiscall on X86.
94 FirstTargetCC = 64,
95
96 /// stdcall is mostly used by the Win32 API. It is basically the same as the
97 /// C convention with the difference in that the callee is responsible for
98 /// popping the arguments from the stack.
99 X86_StdCall = 64,
100
101 /// 'fast' analog of X86_StdCall. Passes first two arguments in ECX:EDX
102 /// registers, others - via stack. Callee is responsible for stack cleaning.
103 X86_FastCall = 65,
104
105 /// ARM Procedure Calling Standard (obsolete, but still used on some
106 /// targets).
107 ARM_APCS = 66,
108
109 /// ARM Architecture Procedure Calling Standard calling convention (aka
110 /// EABI). Soft float variant.
111 ARM_AAPCS = 67,
112
113 /// Same as ARM_AAPCS, but uses hard floating point ABI.
114 ARM_AAPCS_VFP = 68,
115
116 /// Used for MSP430 interrupt routines.
117 MSP430_INTR = 69,
118
119 /// Similar to X86_StdCall. Passes first argument in ECX, others via stack.
120 /// Callee is responsible for stack cleaning. MSVC uses this by default for
121 /// methods in its ABI.
122 X86_ThisCall = 70,
123
124 /// Call to a PTX kernel. Passes all arguments in parameter space.
125 PTX_Kernel = 71,
126
127 /// Call to a PTX device function. Passes all arguments in register or
128 /// parameter space.
129 PTX_Device = 72,
130
131 /// Used for SPIR non-kernel device functions. No lowering or expansion of
132 /// arguments. Structures are passed as a pointer to a struct with the
133 /// byval attribute. Functions can only call SPIR_FUNC and SPIR_KERNEL
134 /// functions. Functions can only have zero or one return values. Variable
135 /// arguments are not allowed, except for printf. How arguments/return
136 /// values are lowered are not specified. Functions are only visible to the
137 /// devices.
138 SPIR_FUNC = 75,
139
140 /// Used for SPIR kernel functions. Inherits the restrictions of SPIR_FUNC,
141 /// except it cannot have non-void return values, it cannot have variable
142 /// arguments, it can also be called by the host or it is externally
143 /// visible.
144 SPIR_KERNEL = 76,
145
146 /// Used for Intel OpenCL built-ins.
147 Intel_OCL_BI = 77,
148
149 /// The C convention as specified in the x86-64 supplement to the System V
150 /// ABI, used on most non-Windows systems.
151 X86_64_SysV = 78,
152
153 /// The C convention as implemented on Windows/x86-64 and AArch64. It
154 /// differs from the more common \c X86_64_SysV convention in a number of
155 /// ways, most notably in that XMM registers used to pass arguments are
156 /// shadowed by GPRs, and vice versa. On AArch64, this is identical to the
157 /// normal C (AAPCS) calling convention for normal functions, but floats are
158 /// passed in integer registers to variadic functions.
159 Win64 = 79,
160
161 /// MSVC calling convention that passes vectors and vector aggregates in SSE
162 /// registers.
163 X86_VectorCall = 80,
164
165 /// Placeholders for HHVM calling conventions (deprecated, removed).
166 DUMMY_HHVM = 81,
167 DUMMY_HHVM_C = 82,
168
169 /// x86 hardware interrupt context. Callee may take one or two parameters,
170 /// where the 1st represents a pointer to hardware context frame and the 2nd
171 /// represents hardware error code, the presence of the later depends on the
172 /// interrupt vector taken. Valid for both 32- and 64-bit subtargets.
173 X86_INTR = 83,
174
175 /// Used for AVR interrupt routines.
176 AVR_INTR = 84,
177
178 /// Used for AVR signal routines.
179 AVR_SIGNAL = 85,
180
181 /// Used for special AVR rtlib functions which have an "optimized"
182 /// convention to preserve registers.
183 AVR_BUILTIN = 86,
184
185 /// Used for Mesa vertex shaders, or AMDPAL last shader stage before
186 /// rasterization (vertex shader if tessellation and geometry are not in
187 /// use, or otherwise copy shader if one is needed).
188 AMDGPU_VS = 87,
189
190 /// Used for Mesa/AMDPAL geometry shaders.
191 AMDGPU_GS = 88,
192
193 /// Used for Mesa/AMDPAL pixel shaders.
194 AMDGPU_PS = 89,
195
196 /// Used for Mesa/AMDPAL compute shaders.
197 AMDGPU_CS = 90,
198
199 /// Used for AMDGPU code object kernels.
200 AMDGPU_KERNEL = 91,
201
202 /// Register calling convention used for parameters transfer optimization
203 X86_RegCall = 92,
204
205 /// Used for Mesa/AMDPAL hull shaders (= tessellation control shaders).
206 AMDGPU_HS = 93,
207
208 /// Used for special MSP430 rtlib functions which have an "optimized"
209 /// convention using additional registers.
210 MSP430_BUILTIN = 94,
211
212 /// Used for AMDPAL vertex shader if tessellation is in use.
213 AMDGPU_LS = 95,
214
215 /// Used for AMDPAL shader stage before geometry shader if geometry is in
216 /// use. So either the domain (= tessellation evaluation) shader if
217 /// tessellation is in use, or otherwise the vertex shader.
218 AMDGPU_ES = 96,
219
220 /// Used between AArch64 Advanced SIMD functions
221 AArch64_VectorCall = 97,
222
223 /// Used between AArch64 SVE functions
224 AArch64_SVE_VectorCall = 98,
225
226 /// For emscripten __invoke_* functions. The first argument is required to
227 /// be the function ptr being indirectly called. The remainder matches the
228 /// regular calling convention.
229 WASM_EmscriptenInvoke = 99,
230
231 /// Used for AMD graphics targets.
232 AMDGPU_Gfx = 100,
233
234 /// Used for M68k interrupt routines.
235 M68k_INTR = 101,
236
237 /// Preserve X0-X13, X19-X29, SP, Z0-Z31, P0-P15.
238 AArch64_SME_ABI_Support_Routines_PreserveMost_From_X0 = 102,
239
240 /// Preserve X2-X15, X19-X29, SP, Z0-Z31, P0-P15.
241 AArch64_SME_ABI_Support_Routines_PreserveMost_From_X2 = 103,
242
243 /// Used on AMDGPUs to give the middle-end more control over argument
244 /// placement.
245 AMDGPU_CS_Chain = 104,
246
247 /// Used on AMDGPUs to give the middle-end more control over argument
248 /// placement. Preserves active lane values for input VGPRs.
249 AMDGPU_CS_ChainPreserve = 105,
250
251 /// Used for M68k rtd-based CC (similar to X86's stdcall).
252 M68k_RTD = 106,
253
254 /// Used by GraalVM. Two additional registers are reserved.
255 GRAAL = 107,
256
257 /// Calling convention used in the ARM64EC ABI to implement calls between
258 /// x64 code and thunks. This is basically the x64 calling convention using
259 /// ARM64 register names. The first parameter is mapped to x9.
260 ARM64EC_Thunk_X64 = 108,
261
262 /// Calling convention used in the ARM64EC ABI to implement calls between
263 /// ARM64 code and thunks. This is just the ARM64 calling convention,
264 /// except that the first parameter is mapped to x9.
265 ARM64EC_Thunk_Native = 109,
266
267 /// The highest possible ID. Must be some 2^k - 1.
268 MaxID = 1023
269 };
270
271} // end namespace CallingConv
272
273} // end namespace llvm
274
275#endif // LLVM_IR_CALLINGCONV_H
276

source code of llvm/include/llvm/IR/CallingConv.h