| 1 | //! RDRAND and RDSEED instructions for returning random numbers from an Intel | 
| 2 | //! on-chip hardware random number generator which has been seeded by an | 
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| 3 | //! on-chip entropy source. | 
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| 4 | #![ allow(clippy::module_name_repetitions)] | 
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| 5 |  | 
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| 6 | #[ allow(improper_ctypes)] | 
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| 7 | unsafe extern "unadjusted"{ | 
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| 8 | #[ link_name= "llvm.x86.rdrand.16"] | 
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| 9 | unsafefn x86_rdrand16_step() -> (u16, i32); | 
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| 10 | #[ link_name= "llvm.x86.rdrand.32"] | 
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| 11 | unsafefn x86_rdrand32_step() -> (u32, i32); | 
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| 12 | #[ link_name= "llvm.x86.rdseed.16"] | 
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| 13 | unsafefn x86_rdseed16_step() -> (u16, i32); | 
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| 14 | #[ link_name= "llvm.x86.rdseed.32"] | 
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| 15 | unsafefn x86_rdseed32_step() -> (u32, i32); | 
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| 16 | } | 
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| 17 |  | 
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| 18 | #[ cfg(test)] | 
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| 19 | use stdarch_test::assert_instr; | 
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| 20 |  | 
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| 21 | /// Read a hardware generated 16-bit random value and store the result in val. | 
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| 22 | /// Returns 1 if a random value was generated, and 0 otherwise. | 
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| 23 | /// | 
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| 24 | /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_rdrand16_step) | 
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| 25 | #[ inline] | 
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| 26 | #[ target_feature(enable = "rdrand")] | 
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| 27 | #[ cfg_attr(test, assert_instr(rdrand))] | 
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| 28 | #[ stable(feature = "simd_x86", since = "1.27.0")] | 
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| 29 | pub unsafe fn _rdrand16_step(val: &mut u16) -> i32 { | 
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| 30 | let (v: u16, flag: i32) = x86_rdrand16_step(); | 
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| 31 | *val = v; | 
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| 32 | flag | 
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| 33 | } | 
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| 34 |  | 
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| 35 | /// Read a hardware generated 32-bit random value and store the result in val. | 
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| 36 | /// Returns 1 if a random value was generated, and 0 otherwise. | 
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| 37 | /// | 
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| 38 | /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_rdrand32_step) | 
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| 39 | #[ inline] | 
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| 40 | #[ target_feature(enable = "rdrand")] | 
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| 41 | #[ cfg_attr(test, assert_instr(rdrand))] | 
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| 42 | #[ stable(feature = "simd_x86", since = "1.27.0")] | 
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| 43 | pub unsafe fn _rdrand32_step(val: &mut u32) -> i32 { | 
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| 44 | let (v: u32, flag: i32) = x86_rdrand32_step(); | 
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| 45 | *val = v; | 
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| 46 | flag | 
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| 47 | } | 
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| 48 |  | 
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| 49 | /// Read a 16-bit NIST SP800-90B and SP800-90C compliant random value and store | 
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| 50 | /// in val. Return 1 if a random value was generated, and 0 otherwise. | 
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| 51 | /// | 
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| 52 | /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_rdseed16_step) | 
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| 53 | #[ inline] | 
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| 54 | #[ target_feature(enable = "rdseed")] | 
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| 55 | #[ cfg_attr(test, assert_instr(rdseed))] | 
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| 56 | #[ stable(feature = "simd_x86", since = "1.27.0")] | 
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| 57 | pub unsafe fn _rdseed16_step(val: &mut u16) -> i32 { | 
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| 58 | let (v: u16, flag: i32) = x86_rdseed16_step(); | 
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| 59 | *val = v; | 
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| 60 | flag | 
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| 61 | } | 
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| 62 |  | 
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| 63 | /// Read a 32-bit NIST SP800-90B and SP800-90C compliant random value and store | 
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| 64 | /// in val. Return 1 if a random value was generated, and 0 otherwise. | 
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| 65 | /// | 
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| 66 | /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_rdseed32_step) | 
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| 67 | #[ inline] | 
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| 68 | #[ target_feature(enable = "rdseed")] | 
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| 69 | #[ cfg_attr(test, assert_instr(rdseed))] | 
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| 70 | #[ stable(feature = "simd_x86", since = "1.27.0")] | 
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| 71 | pub unsafe fn _rdseed32_step(val: &mut u32) -> i32 { | 
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| 72 | let (v: u32, flag: i32) = x86_rdseed32_step(); | 
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| 73 | *val = v; | 
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| 74 | flag | 
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| 75 | } | 
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| 76 |  | 
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