1 | use super::BinaryReader; |
2 | use crate::{Result, VisitOperator, VisitSimdOperator}; |
3 | |
4 | impl<'a> BinaryReader<'a> { |
5 | pub(super) fn visit_0xfd_operator<T>( |
6 | &mut self, |
7 | pos: usize, |
8 | visitor: &mut T, |
9 | ) -> Result<<T as VisitOperator<'a>>::Output> |
10 | where |
11 | T: VisitSimdOperator<'a>, |
12 | { |
13 | let code = self.read_var_u32()?; |
14 | Ok(match code { |
15 | 0x00 => visitor.visit_v128_load(self.read_memarg(4)?), |
16 | 0x01 => visitor.visit_v128_load8x8_s(self.read_memarg(3)?), |
17 | 0x02 => visitor.visit_v128_load8x8_u(self.read_memarg(3)?), |
18 | 0x03 => visitor.visit_v128_load16x4_s(self.read_memarg(3)?), |
19 | 0x04 => visitor.visit_v128_load16x4_u(self.read_memarg(3)?), |
20 | 0x05 => visitor.visit_v128_load32x2_s(self.read_memarg(3)?), |
21 | 0x06 => visitor.visit_v128_load32x2_u(self.read_memarg(3)?), |
22 | 0x07 => visitor.visit_v128_load8_splat(self.read_memarg(0)?), |
23 | 0x08 => visitor.visit_v128_load16_splat(self.read_memarg(1)?), |
24 | 0x09 => visitor.visit_v128_load32_splat(self.read_memarg(2)?), |
25 | 0x0a => visitor.visit_v128_load64_splat(self.read_memarg(3)?), |
26 | |
27 | 0x0b => visitor.visit_v128_store(self.read_memarg(4)?), |
28 | 0x0c => visitor.visit_v128_const(self.read_v128()?), |
29 | 0x0d => { |
30 | let mut lanes: [u8; 16] = [0; 16]; |
31 | for lane in &mut lanes { |
32 | *lane = self.read_lane_index(32)? |
33 | } |
34 | visitor.visit_i8x16_shuffle(lanes) |
35 | } |
36 | |
37 | 0x0e => visitor.visit_i8x16_swizzle(), |
38 | 0x0f => visitor.visit_i8x16_splat(), |
39 | 0x10 => visitor.visit_i16x8_splat(), |
40 | 0x11 => visitor.visit_i32x4_splat(), |
41 | 0x12 => visitor.visit_i64x2_splat(), |
42 | 0x13 => visitor.visit_f32x4_splat(), |
43 | 0x14 => visitor.visit_f64x2_splat(), |
44 | |
45 | 0x15 => visitor.visit_i8x16_extract_lane_s(self.read_lane_index(16)?), |
46 | 0x16 => visitor.visit_i8x16_extract_lane_u(self.read_lane_index(16)?), |
47 | 0x17 => visitor.visit_i8x16_replace_lane(self.read_lane_index(16)?), |
48 | 0x18 => visitor.visit_i16x8_extract_lane_s(self.read_lane_index(8)?), |
49 | 0x19 => visitor.visit_i16x8_extract_lane_u(self.read_lane_index(8)?), |
50 | 0x1a => visitor.visit_i16x8_replace_lane(self.read_lane_index(8)?), |
51 | 0x1b => visitor.visit_i32x4_extract_lane(self.read_lane_index(4)?), |
52 | |
53 | 0x1c => visitor.visit_i32x4_replace_lane(self.read_lane_index(4)?), |
54 | 0x1d => visitor.visit_i64x2_extract_lane(self.read_lane_index(2)?), |
55 | 0x1e => visitor.visit_i64x2_replace_lane(self.read_lane_index(2)?), |
56 | 0x1f => visitor.visit_f32x4_extract_lane(self.read_lane_index(4)?), |
57 | 0x20 => visitor.visit_f32x4_replace_lane(self.read_lane_index(4)?), |
58 | 0x21 => visitor.visit_f64x2_extract_lane(self.read_lane_index(2)?), |
59 | 0x22 => visitor.visit_f64x2_replace_lane(self.read_lane_index(2)?), |
60 | |
61 | 0x23 => visitor.visit_i8x16_eq(), |
62 | 0x24 => visitor.visit_i8x16_ne(), |
63 | 0x25 => visitor.visit_i8x16_lt_s(), |
64 | 0x26 => visitor.visit_i8x16_lt_u(), |
65 | 0x27 => visitor.visit_i8x16_gt_s(), |
66 | 0x28 => visitor.visit_i8x16_gt_u(), |
67 | 0x29 => visitor.visit_i8x16_le_s(), |
68 | 0x2a => visitor.visit_i8x16_le_u(), |
69 | 0x2b => visitor.visit_i8x16_ge_s(), |
70 | 0x2c => visitor.visit_i8x16_ge_u(), |
71 | 0x2d => visitor.visit_i16x8_eq(), |
72 | 0x2e => visitor.visit_i16x8_ne(), |
73 | 0x2f => visitor.visit_i16x8_lt_s(), |
74 | 0x30 => visitor.visit_i16x8_lt_u(), |
75 | 0x31 => visitor.visit_i16x8_gt_s(), |
76 | 0x32 => visitor.visit_i16x8_gt_u(), |
77 | 0x33 => visitor.visit_i16x8_le_s(), |
78 | 0x34 => visitor.visit_i16x8_le_u(), |
79 | 0x35 => visitor.visit_i16x8_ge_s(), |
80 | 0x36 => visitor.visit_i16x8_ge_u(), |
81 | 0x37 => visitor.visit_i32x4_eq(), |
82 | 0x38 => visitor.visit_i32x4_ne(), |
83 | 0x39 => visitor.visit_i32x4_lt_s(), |
84 | 0x3a => visitor.visit_i32x4_lt_u(), |
85 | 0x3b => visitor.visit_i32x4_gt_s(), |
86 | 0x3c => visitor.visit_i32x4_gt_u(), |
87 | 0x3d => visitor.visit_i32x4_le_s(), |
88 | 0x3e => visitor.visit_i32x4_le_u(), |
89 | 0x3f => visitor.visit_i32x4_ge_s(), |
90 | 0x40 => visitor.visit_i32x4_ge_u(), |
91 | 0x41 => visitor.visit_f32x4_eq(), |
92 | 0x42 => visitor.visit_f32x4_ne(), |
93 | 0x43 => visitor.visit_f32x4_lt(), |
94 | 0x44 => visitor.visit_f32x4_gt(), |
95 | 0x45 => visitor.visit_f32x4_le(), |
96 | 0x46 => visitor.visit_f32x4_ge(), |
97 | 0x47 => visitor.visit_f64x2_eq(), |
98 | 0x48 => visitor.visit_f64x2_ne(), |
99 | 0x49 => visitor.visit_f64x2_lt(), |
100 | 0x4a => visitor.visit_f64x2_gt(), |
101 | 0x4b => visitor.visit_f64x2_le(), |
102 | 0x4c => visitor.visit_f64x2_ge(), |
103 | 0x4d => visitor.visit_v128_not(), |
104 | 0x4e => visitor.visit_v128_and(), |
105 | 0x4f => visitor.visit_v128_andnot(), |
106 | 0x50 => visitor.visit_v128_or(), |
107 | 0x51 => visitor.visit_v128_xor(), |
108 | 0x52 => visitor.visit_v128_bitselect(), |
109 | 0x53 => visitor.visit_v128_any_true(), |
110 | |
111 | 0x54 => { |
112 | let memarg = self.read_memarg(0)?; |
113 | let lane = self.read_lane_index(16)?; |
114 | visitor.visit_v128_load8_lane(memarg, lane) |
115 | } |
116 | 0x55 => { |
117 | let memarg = self.read_memarg(1)?; |
118 | let lane = self.read_lane_index(8)?; |
119 | visitor.visit_v128_load16_lane(memarg, lane) |
120 | } |
121 | 0x56 => { |
122 | let memarg = self.read_memarg(2)?; |
123 | let lane = self.read_lane_index(4)?; |
124 | visitor.visit_v128_load32_lane(memarg, lane) |
125 | } |
126 | 0x57 => { |
127 | let memarg = self.read_memarg(3)?; |
128 | let lane = self.read_lane_index(2)?; |
129 | visitor.visit_v128_load64_lane(memarg, lane) |
130 | } |
131 | 0x58 => { |
132 | let memarg = self.read_memarg(0)?; |
133 | let lane = self.read_lane_index(16)?; |
134 | visitor.visit_v128_store8_lane(memarg, lane) |
135 | } |
136 | 0x59 => { |
137 | let memarg = self.read_memarg(1)?; |
138 | let lane = self.read_lane_index(8)?; |
139 | visitor.visit_v128_store16_lane(memarg, lane) |
140 | } |
141 | 0x5a => { |
142 | let memarg = self.read_memarg(2)?; |
143 | let lane = self.read_lane_index(4)?; |
144 | visitor.visit_v128_store32_lane(memarg, lane) |
145 | } |
146 | 0x5b => { |
147 | let memarg = self.read_memarg(3)?; |
148 | let lane = self.read_lane_index(2)?; |
149 | visitor.visit_v128_store64_lane(memarg, lane) |
150 | } |
151 | |
152 | 0x5c => visitor.visit_v128_load32_zero(self.read_memarg(2)?), |
153 | 0x5d => visitor.visit_v128_load64_zero(self.read_memarg(3)?), |
154 | 0x5e => visitor.visit_f32x4_demote_f64x2_zero(), |
155 | 0x5f => visitor.visit_f64x2_promote_low_f32x4(), |
156 | 0x60 => visitor.visit_i8x16_abs(), |
157 | 0x61 => visitor.visit_i8x16_neg(), |
158 | 0x62 => visitor.visit_i8x16_popcnt(), |
159 | 0x63 => visitor.visit_i8x16_all_true(), |
160 | 0x64 => visitor.visit_i8x16_bitmask(), |
161 | 0x65 => visitor.visit_i8x16_narrow_i16x8_s(), |
162 | 0x66 => visitor.visit_i8x16_narrow_i16x8_u(), |
163 | 0x67 => visitor.visit_f32x4_ceil(), |
164 | 0x68 => visitor.visit_f32x4_floor(), |
165 | 0x69 => visitor.visit_f32x4_trunc(), |
166 | 0x6a => visitor.visit_f32x4_nearest(), |
167 | 0x6b => visitor.visit_i8x16_shl(), |
168 | 0x6c => visitor.visit_i8x16_shr_s(), |
169 | 0x6d => visitor.visit_i8x16_shr_u(), |
170 | 0x6e => visitor.visit_i8x16_add(), |
171 | 0x6f => visitor.visit_i8x16_add_sat_s(), |
172 | 0x70 => visitor.visit_i8x16_add_sat_u(), |
173 | 0x71 => visitor.visit_i8x16_sub(), |
174 | 0x72 => visitor.visit_i8x16_sub_sat_s(), |
175 | 0x73 => visitor.visit_i8x16_sub_sat_u(), |
176 | 0x74 => visitor.visit_f64x2_ceil(), |
177 | 0x75 => visitor.visit_f64x2_floor(), |
178 | 0x76 => visitor.visit_i8x16_min_s(), |
179 | 0x77 => visitor.visit_i8x16_min_u(), |
180 | 0x78 => visitor.visit_i8x16_max_s(), |
181 | 0x79 => visitor.visit_i8x16_max_u(), |
182 | 0x7a => visitor.visit_f64x2_trunc(), |
183 | 0x7b => visitor.visit_i8x16_avgr_u(), |
184 | 0x7c => visitor.visit_i16x8_extadd_pairwise_i8x16_s(), |
185 | 0x7d => visitor.visit_i16x8_extadd_pairwise_i8x16_u(), |
186 | 0x7e => visitor.visit_i32x4_extadd_pairwise_i16x8_s(), |
187 | 0x7f => visitor.visit_i32x4_extadd_pairwise_i16x8_u(), |
188 | 0x80 => visitor.visit_i16x8_abs(), |
189 | 0x81 => visitor.visit_i16x8_neg(), |
190 | 0x82 => visitor.visit_i16x8_q15mulr_sat_s(), |
191 | 0x83 => visitor.visit_i16x8_all_true(), |
192 | 0x84 => visitor.visit_i16x8_bitmask(), |
193 | 0x85 => visitor.visit_i16x8_narrow_i32x4_s(), |
194 | 0x86 => visitor.visit_i16x8_narrow_i32x4_u(), |
195 | 0x87 => visitor.visit_i16x8_extend_low_i8x16_s(), |
196 | 0x88 => visitor.visit_i16x8_extend_high_i8x16_s(), |
197 | 0x89 => visitor.visit_i16x8_extend_low_i8x16_u(), |
198 | 0x8a => visitor.visit_i16x8_extend_high_i8x16_u(), |
199 | 0x8b => visitor.visit_i16x8_shl(), |
200 | 0x8c => visitor.visit_i16x8_shr_s(), |
201 | 0x8d => visitor.visit_i16x8_shr_u(), |
202 | 0x8e => visitor.visit_i16x8_add(), |
203 | 0x8f => visitor.visit_i16x8_add_sat_s(), |
204 | 0x90 => visitor.visit_i16x8_add_sat_u(), |
205 | 0x91 => visitor.visit_i16x8_sub(), |
206 | 0x92 => visitor.visit_i16x8_sub_sat_s(), |
207 | 0x93 => visitor.visit_i16x8_sub_sat_u(), |
208 | 0x94 => visitor.visit_f64x2_nearest(), |
209 | 0x95 => visitor.visit_i16x8_mul(), |
210 | 0x96 => visitor.visit_i16x8_min_s(), |
211 | 0x97 => visitor.visit_i16x8_min_u(), |
212 | 0x98 => visitor.visit_i16x8_max_s(), |
213 | 0x99 => visitor.visit_i16x8_max_u(), |
214 | 0x9b => visitor.visit_i16x8_avgr_u(), |
215 | 0x9c => visitor.visit_i16x8_extmul_low_i8x16_s(), |
216 | 0x9d => visitor.visit_i16x8_extmul_high_i8x16_s(), |
217 | 0x9e => visitor.visit_i16x8_extmul_low_i8x16_u(), |
218 | 0x9f => visitor.visit_i16x8_extmul_high_i8x16_u(), |
219 | 0xa0 => visitor.visit_i32x4_abs(), |
220 | 0xa1 => visitor.visit_i32x4_neg(), |
221 | 0xa3 => visitor.visit_i32x4_all_true(), |
222 | 0xa4 => visitor.visit_i32x4_bitmask(), |
223 | 0xa7 => visitor.visit_i32x4_extend_low_i16x8_s(), |
224 | 0xa8 => visitor.visit_i32x4_extend_high_i16x8_s(), |
225 | 0xa9 => visitor.visit_i32x4_extend_low_i16x8_u(), |
226 | 0xaa => visitor.visit_i32x4_extend_high_i16x8_u(), |
227 | 0xab => visitor.visit_i32x4_shl(), |
228 | 0xac => visitor.visit_i32x4_shr_s(), |
229 | 0xad => visitor.visit_i32x4_shr_u(), |
230 | 0xae => visitor.visit_i32x4_add(), |
231 | 0xb1 => visitor.visit_i32x4_sub(), |
232 | 0xb5 => visitor.visit_i32x4_mul(), |
233 | 0xb6 => visitor.visit_i32x4_min_s(), |
234 | 0xb7 => visitor.visit_i32x4_min_u(), |
235 | 0xb8 => visitor.visit_i32x4_max_s(), |
236 | 0xb9 => visitor.visit_i32x4_max_u(), |
237 | 0xba => visitor.visit_i32x4_dot_i16x8_s(), |
238 | 0xbc => visitor.visit_i32x4_extmul_low_i16x8_s(), |
239 | 0xbd => visitor.visit_i32x4_extmul_high_i16x8_s(), |
240 | 0xbe => visitor.visit_i32x4_extmul_low_i16x8_u(), |
241 | 0xbf => visitor.visit_i32x4_extmul_high_i16x8_u(), |
242 | 0xc0 => visitor.visit_i64x2_abs(), |
243 | 0xc1 => visitor.visit_i64x2_neg(), |
244 | 0xc3 => visitor.visit_i64x2_all_true(), |
245 | 0xc4 => visitor.visit_i64x2_bitmask(), |
246 | 0xc7 => visitor.visit_i64x2_extend_low_i32x4_s(), |
247 | 0xc8 => visitor.visit_i64x2_extend_high_i32x4_s(), |
248 | 0xc9 => visitor.visit_i64x2_extend_low_i32x4_u(), |
249 | 0xca => visitor.visit_i64x2_extend_high_i32x4_u(), |
250 | 0xcb => visitor.visit_i64x2_shl(), |
251 | 0xcc => visitor.visit_i64x2_shr_s(), |
252 | 0xcd => visitor.visit_i64x2_shr_u(), |
253 | 0xce => visitor.visit_i64x2_add(), |
254 | 0xd1 => visitor.visit_i64x2_sub(), |
255 | 0xd5 => visitor.visit_i64x2_mul(), |
256 | 0xd6 => visitor.visit_i64x2_eq(), |
257 | 0xd7 => visitor.visit_i64x2_ne(), |
258 | 0xd8 => visitor.visit_i64x2_lt_s(), |
259 | 0xd9 => visitor.visit_i64x2_gt_s(), |
260 | 0xda => visitor.visit_i64x2_le_s(), |
261 | 0xdb => visitor.visit_i64x2_ge_s(), |
262 | 0xdc => visitor.visit_i64x2_extmul_low_i32x4_s(), |
263 | 0xdd => visitor.visit_i64x2_extmul_high_i32x4_s(), |
264 | 0xde => visitor.visit_i64x2_extmul_low_i32x4_u(), |
265 | 0xdf => visitor.visit_i64x2_extmul_high_i32x4_u(), |
266 | 0xe0 => visitor.visit_f32x4_abs(), |
267 | 0xe1 => visitor.visit_f32x4_neg(), |
268 | 0xe3 => visitor.visit_f32x4_sqrt(), |
269 | 0xe4 => visitor.visit_f32x4_add(), |
270 | 0xe5 => visitor.visit_f32x4_sub(), |
271 | 0xe6 => visitor.visit_f32x4_mul(), |
272 | 0xe7 => visitor.visit_f32x4_div(), |
273 | 0xe8 => visitor.visit_f32x4_min(), |
274 | 0xe9 => visitor.visit_f32x4_max(), |
275 | 0xea => visitor.visit_f32x4_pmin(), |
276 | 0xeb => visitor.visit_f32x4_pmax(), |
277 | 0xec => visitor.visit_f64x2_abs(), |
278 | 0xed => visitor.visit_f64x2_neg(), |
279 | 0xef => visitor.visit_f64x2_sqrt(), |
280 | 0xf0 => visitor.visit_f64x2_add(), |
281 | 0xf1 => visitor.visit_f64x2_sub(), |
282 | 0xf2 => visitor.visit_f64x2_mul(), |
283 | 0xf3 => visitor.visit_f64x2_div(), |
284 | 0xf4 => visitor.visit_f64x2_min(), |
285 | 0xf5 => visitor.visit_f64x2_max(), |
286 | 0xf6 => visitor.visit_f64x2_pmin(), |
287 | 0xf7 => visitor.visit_f64x2_pmax(), |
288 | 0xf8 => visitor.visit_i32x4_trunc_sat_f32x4_s(), |
289 | 0xf9 => visitor.visit_i32x4_trunc_sat_f32x4_u(), |
290 | 0xfa => visitor.visit_f32x4_convert_i32x4_s(), |
291 | 0xfb => visitor.visit_f32x4_convert_i32x4_u(), |
292 | 0xfc => visitor.visit_i32x4_trunc_sat_f64x2_s_zero(), |
293 | 0xfd => visitor.visit_i32x4_trunc_sat_f64x2_u_zero(), |
294 | 0xfe => visitor.visit_f64x2_convert_low_i32x4_s(), |
295 | 0xff => visitor.visit_f64x2_convert_low_i32x4_u(), |
296 | 0x100 => visitor.visit_i8x16_relaxed_swizzle(), |
297 | 0x101 => visitor.visit_i32x4_relaxed_trunc_f32x4_s(), |
298 | 0x102 => visitor.visit_i32x4_relaxed_trunc_f32x4_u(), |
299 | 0x103 => visitor.visit_i32x4_relaxed_trunc_f64x2_s_zero(), |
300 | 0x104 => visitor.visit_i32x4_relaxed_trunc_f64x2_u_zero(), |
301 | 0x105 => visitor.visit_f32x4_relaxed_madd(), |
302 | 0x106 => visitor.visit_f32x4_relaxed_nmadd(), |
303 | 0x107 => visitor.visit_f64x2_relaxed_madd(), |
304 | 0x108 => visitor.visit_f64x2_relaxed_nmadd(), |
305 | 0x109 => visitor.visit_i8x16_relaxed_laneselect(), |
306 | 0x10a => visitor.visit_i16x8_relaxed_laneselect(), |
307 | 0x10b => visitor.visit_i32x4_relaxed_laneselect(), |
308 | 0x10c => visitor.visit_i64x2_relaxed_laneselect(), |
309 | 0x10d => visitor.visit_f32x4_relaxed_min(), |
310 | 0x10e => visitor.visit_f32x4_relaxed_max(), |
311 | 0x10f => visitor.visit_f64x2_relaxed_min(), |
312 | 0x110 => visitor.visit_f64x2_relaxed_max(), |
313 | 0x111 => visitor.visit_i16x8_relaxed_q15mulr_s(), |
314 | 0x112 => visitor.visit_i16x8_relaxed_dot_i8x16_i7x16_s(), |
315 | 0x113 => visitor.visit_i32x4_relaxed_dot_i8x16_i7x16_add_s(), |
316 | |
317 | _ => bail!(pos, "unknown 0xfd subopcode: 0x {code:x}" ), |
318 | }) |
319 | } |
320 | } |
321 | |