1//! Base Priority Mask Register
2
3/// Reads the CPU register
4#[inline]
5pub fn read() -> u8 {
6 call_asm!(__basepri_r() -> u8)
7}
8
9/// Writes to the CPU register
10///
11/// **IMPORTANT** If you are using a Cortex-M7 device with revision r0p1 you MUST enable the
12/// `cm7-r0p1` Cargo feature or this function WILL misbehave.
13#[inline]
14pub unsafe fn write(basepri: u8) {
15 #[cfg(feature = "cm7-r0p1")]
16 {
17 call_asm!(__basepri_w_cm7_r0p1(basepri: u8));
18 }
19
20 #[cfg(not(feature = "cm7-r0p1"))]
21 {
22 call_asm!(__basepri_w(basepri: u8));
23 }
24}
25