1 | //! Fault Mask Register |
2 | |
3 | /// All exceptions are ... |
4 | #[derive (Clone, Copy, Debug, Eq, PartialEq)] |
5 | pub enum Faultmask { |
6 | /// Active |
7 | Active, |
8 | /// Inactive, expect for NMI |
9 | Inactive, |
10 | } |
11 | |
12 | impl Faultmask { |
13 | /// All exceptions are active |
14 | #[inline ] |
15 | pub fn is_active(self) -> bool { |
16 | self == Faultmask::Active |
17 | } |
18 | |
19 | /// All exceptions, except for NMI, are inactive |
20 | #[inline ] |
21 | pub fn is_inactive(self) -> bool { |
22 | self == Faultmask::Inactive |
23 | } |
24 | } |
25 | |
26 | /// Reads the CPU register |
27 | #[inline ] |
28 | pub fn read() -> Faultmask { |
29 | let r: u32 = call_asm!(__faultmask_r() -> u32); |
30 | if r & (1 << 0) == (1 << 0) { |
31 | Faultmask::Inactive |
32 | } else { |
33 | Faultmask::Active |
34 | } |
35 | } |
36 | |