1//! Flash memory (FLASH)
2use embedded_storage::nor_flash::{NorFlashError, NorFlashErrorKind};
3
4#[cfg(flash_f4)]
5mod asynch;
6#[cfg(flash)]
7mod common;
8
9#[cfg(flash_f4)]
10pub use asynch::InterruptHandler;
11#[cfg(flash)]
12pub use common::*;
13
14pub use crate::_generated::flash_regions::*;
15pub use crate::_generated::{FLASH_BASE, FLASH_SIZE, MAX_ERASE_SIZE, WRITE_SIZE};
16
17/// Get whether the default flash layout is being used.
18///
19/// In some chips, dual-bank is not default. This will then return `false`
20/// when dual-bank is enabled.
21pub fn is_default_layout() -> bool {
22 family::is_default_layout()
23}
24
25/// Get all flash regions.
26pub fn get_flash_regions() -> &'static [&'static FlashRegion] {
27 family::get_flash_regions()
28}
29
30/// Read size (always 1)
31pub const READ_SIZE: usize = 1;
32
33/// Blocking flash mode typestate.
34pub enum Blocking {}
35/// Async flash mode typestate.
36pub enum Async {}
37
38/// Flash memory region
39#[derive(Debug)]
40#[cfg_attr(feature = "defmt", derive(defmt::Format))]
41pub struct FlashRegion {
42 /// Bank number.
43 pub bank: FlashBank,
44 /// Absolute base address.
45 pub base: u32,
46 /// Size in bytes.
47 pub size: u32,
48 /// Erase size (sector size).
49 pub erase_size: u32,
50 /// Minimum write size.
51 pub write_size: u32,
52 /// Erase value (usually `0xFF`, but is `0x00` in some chips)
53 pub erase_value: u8,
54 pub(crate) _ensure_internal: (),
55}
56
57impl FlashRegion {
58 /// Absolute end address.
59 pub const fn end(&self) -> u32 {
60 self.base + self.size
61 }
62
63 /// Number of sectors in the region.
64 pub const fn sectors(&self) -> u8 {
65 (self.size / self.erase_size) as u8
66 }
67}
68
69/// Flash sector.
70#[derive(Debug, PartialEq)]
71#[cfg_attr(feature = "defmt", derive(defmt::Format))]
72pub struct FlashSector {
73 /// Bank number.
74 pub bank: FlashBank,
75 /// Sector number within the bank.
76 pub index_in_bank: u8,
77 /// Absolute start address.
78 pub start: u32,
79 /// Size in bytes.
80 pub size: u32,
81}
82
83/// Flash bank.
84#[derive(Clone, Copy, Debug, PartialEq)]
85#[cfg_attr(feature = "defmt", derive(defmt::Format))]
86pub enum FlashBank {
87 /// Bank 1
88 Bank1 = 0,
89 /// Bank 2
90 Bank2 = 1,
91}
92
93#[cfg_attr(any(flash_l0, flash_l1, flash_l4, flash_l5, flash_wl, flash_wb), path = "l.rs")]
94#[cfg_attr(flash_f0, path = "f0.rs")]
95#[cfg_attr(any(flash_f1, flash_f3), path = "f1f3.rs")]
96#[cfg_attr(flash_f2, path = "f2.rs")]
97#[cfg_attr(flash_f4, path = "f4.rs")]
98#[cfg_attr(flash_f7, path = "f7.rs")]
99#[cfg_attr(any(flash_g0x0, flash_g0x1, flash_g4c2, flash_g4c3, flash_g4c4), path = "g.rs")]
100#[cfg_attr(flash_h7, path = "h7.rs")]
101#[cfg_attr(flash_h7ab, path = "h7.rs")]
102#[cfg_attr(flash_u5, path = "u5.rs")]
103#[cfg_attr(flash_h5, path = "h5.rs")]
104#[cfg_attr(flash_h50, path = "h50.rs")]
105#[cfg_attr(flash_u0, path = "u0.rs")]
106#[cfg_attr(
107 not(any(
108 flash_l0, flash_l1, flash_l4, flash_l5, flash_wl, flash_wb, flash_f0, flash_f1, flash_f2, flash_f3, flash_f4,
109 flash_f7, flash_g0x0, flash_g0x1, flash_g4c2, flash_g4c3, flash_g4c4, flash_h7, flash_h7ab, flash_u5,
110 flash_h50, flash_u0, flash_h5,
111 )),
112 path = "other.rs"
113)]
114mod family;
115
116#[allow(unused_imports)]
117pub use family::*;
118
119/// Flash error
120///
121/// See STM32 Reference Manual for your chip for details.
122#[allow(missing_docs)]
123#[derive(Debug, Copy, Clone, PartialEq, Eq)]
124#[cfg_attr(feature = "defmt", derive(defmt::Format))]
125pub enum Error {
126 Prog,
127 Size,
128 Miss,
129 Seq,
130 Protected,
131 Unaligned,
132 Parallelism,
133}
134
135impl NorFlashError for Error {
136 fn kind(&self) -> NorFlashErrorKind {
137 match self {
138 Self::Size => NorFlashErrorKind::OutOfBounds,
139 Self::Unaligned => NorFlashErrorKind::NotAligned,
140 _ => NorFlashErrorKind::Other,
141 }
142 }
143}
144