1#![allow(clippy::missing_safety_doc)]
2#![allow(clippy::identity_op)]
3#![allow(clippy::unnecessary_cast)]
4#![allow(clippy::erasing_op)]
5
6#[doc = "MCU debug component"]
7#[derive(Copy, Clone, Eq, PartialEq)]
8pub struct Dbgmcu {
9 ptr: *mut u8,
10}
11unsafe impl Send for Dbgmcu {}
12unsafe impl Sync for Dbgmcu {}
13impl Dbgmcu {
14 #[inline(always)]
15 pub const unsafe fn from_ptr(ptr: *mut ()) -> Self {
16 Self { ptr: ptr as _ }
17 }
18 #[inline(always)]
19 pub const fn as_ptr(&self) -> *mut () {
20 self.ptr as _
21 }
22 #[doc = "DBGMCU_IDCODE"]
23 #[inline(always)]
24 pub const fn idcode(self) -> crate::common::Reg<regs::Idcode, crate::common::R> {
25 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0usize) as _) }
26 }
27 #[doc = "Debug MCU configuration register"]
28 #[inline(always)]
29 pub const fn cr(self) -> crate::common::Reg<regs::Cr, crate::common::RW> {
30 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x04usize) as _) }
31 }
32 #[doc = "Debug MCU APB1L peripheral freeze register"]
33 #[inline(always)]
34 pub const fn apb1lfzr(self) -> crate::common::Reg<regs::Apb1lfzr, crate::common::RW> {
35 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x08usize) as _) }
36 }
37 #[doc = "Debug MCU APB1H peripheral freeze register"]
38 #[inline(always)]
39 pub const fn apb1hfzr(self) -> crate::common::Reg<regs::Apb1hfzr, crate::common::RW> {
40 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0cusize) as _) }
41 }
42 #[doc = "Debug MCU APB2 peripheral freeze register"]
43 #[inline(always)]
44 pub const fn apb2fzr(self) -> crate::common::Reg<regs::Apb2fzr, crate::common::RW> {
45 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x10usize) as _) }
46 }
47 #[doc = "Debug MCU APB3 peripheral freeze register"]
48 #[inline(always)]
49 pub const fn apb3fzr(self) -> crate::common::Reg<regs::Apb3fzr, crate::common::RW> {
50 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x14usize) as _) }
51 }
52 #[doc = "Debug MCU AHB1 peripheral freeze register"]
53 #[inline(always)]
54 pub const fn ahb1fzr(self) -> crate::common::Reg<regs::Ahb1fzr, crate::common::RW> {
55 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x20usize) as _) }
56 }
57 #[doc = "Debug MCU AHB3 peripheral freeze register"]
58 #[inline(always)]
59 pub const fn ahb3fzr(self) -> crate::common::Reg<regs::Ahb3fzr, crate::common::RW> {
60 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x28usize) as _) }
61 }
62 #[doc = "DBGMCU status register"]
63 #[inline(always)]
64 pub const fn dbgmcu_sr(self) -> crate::common::Reg<regs::DbgmcuSr, crate::common::R> {
65 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0xfcusize) as _) }
66 }
67 #[doc = "DBGMCU debug host authentication register"]
68 #[inline(always)]
69 pub const fn dbgmcu_dbg_auth_host(self) -> crate::common::Reg<regs::DbgmcuDbgAuthHost, crate::common::R> {
70 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0100usize) as _) }
71 }
72 #[doc = "DBGMCU debug device authentication register"]
73 #[inline(always)]
74 pub const fn dbgmcu_dbg_auth_device(self) -> crate::common::Reg<regs::DbgmcuDbgAuthDevice, crate::common::R> {
75 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0104usize) as _) }
76 }
77 #[doc = "Debug MCU CoreSight peripheral identity register 4"]
78 #[inline(always)]
79 pub const fn pidr4(self) -> crate::common::Reg<regs::Pidr4, crate::common::R> {
80 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0fd0usize) as _) }
81 }
82 #[doc = "Debug MCU CoreSight peripheral identity register 0"]
83 #[inline(always)]
84 pub const fn pidr0(self) -> crate::common::Reg<regs::Pidr0, crate::common::R> {
85 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0fe0usize) as _) }
86 }
87 #[doc = "Debug MCU CoreSight peripheral identity register 1"]
88 #[inline(always)]
89 pub const fn pidr1(self) -> crate::common::Reg<regs::Pidr1, crate::common::R> {
90 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0fe4usize) as _) }
91 }
92 #[doc = "Debug MCU CoreSight peripheral identity register 2"]
93 #[inline(always)]
94 pub const fn pidr2(self) -> crate::common::Reg<regs::Pidr2, crate::common::R> {
95 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0fe8usize) as _) }
96 }
97 #[doc = "Debug MCU CoreSight peripheral identity register 3"]
98 #[inline(always)]
99 pub const fn pidr3(self) -> crate::common::Reg<regs::Pidr3, crate::common::R> {
100 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0fecusize) as _) }
101 }
102 #[doc = "Debug MCU CoreSight component identity register 0"]
103 #[inline(always)]
104 pub const fn cidr0(self) -> crate::common::Reg<regs::Cidr0, crate::common::R> {
105 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0ff0usize) as _) }
106 }
107 #[doc = "Debug MCU CoreSight component identity register 1"]
108 #[inline(always)]
109 pub const fn cidr1(self) -> crate::common::Reg<regs::Cidr1, crate::common::R> {
110 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0ff4usize) as _) }
111 }
112 #[doc = "Debug MCU CoreSight component identity register 2"]
113 #[inline(always)]
114 pub const fn cidr2(self) -> crate::common::Reg<regs::Cidr2, crate::common::R> {
115 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0ff8usize) as _) }
116 }
117 #[doc = "Debug MCU CoreSight component identity register 3"]
118 #[inline(always)]
119 pub const fn cidr3(self) -> crate::common::Reg<regs::Cidr3, crate::common::R> {
120 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0ffcusize) as _) }
121 }
122}
123pub mod regs {
124 #[doc = "Debug MCU AHB1 peripheral freeze register"]
125 #[repr(transparent)]
126 #[derive(Copy, Clone, Eq, PartialEq)]
127 pub struct Ahb1fzr(pub u32);
128 impl Ahb1fzr {
129 #[doc = "GPDMA channel 0 stop in debug"]
130 #[inline(always)]
131 pub const fn dbg_gpdma0_stop(&self) -> bool {
132 let val = (self.0 >> 0usize) & 0x01;
133 val != 0
134 }
135 #[doc = "GPDMA channel 0 stop in debug"]
136 #[inline(always)]
137 pub fn set_dbg_gpdma0_stop(&mut self, val: bool) {
138 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
139 }
140 #[doc = "GPDMA channel 1 stop in debug"]
141 #[inline(always)]
142 pub const fn dbg_gpdma1_stop(&self) -> bool {
143 let val = (self.0 >> 1usize) & 0x01;
144 val != 0
145 }
146 #[doc = "GPDMA channel 1 stop in debug"]
147 #[inline(always)]
148 pub fn set_dbg_gpdma1_stop(&mut self, val: bool) {
149 self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
150 }
151 #[doc = "GPDMA channel 2 stop in debug"]
152 #[inline(always)]
153 pub const fn dbg_gpdma2_stop(&self) -> bool {
154 let val = (self.0 >> 2usize) & 0x01;
155 val != 0
156 }
157 #[doc = "GPDMA channel 2 stop in debug"]
158 #[inline(always)]
159 pub fn set_dbg_gpdma2_stop(&mut self, val: bool) {
160 self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
161 }
162 #[doc = "GPDMA channel 3 stop in debug"]
163 #[inline(always)]
164 pub const fn dbg_gpdma3_stop(&self) -> bool {
165 let val = (self.0 >> 3usize) & 0x01;
166 val != 0
167 }
168 #[doc = "GPDMA channel 3 stop in debug"]
169 #[inline(always)]
170 pub fn set_dbg_gpdma3_stop(&mut self, val: bool) {
171 self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize);
172 }
173 #[doc = "GPDMA channel 4 stop in debug"]
174 #[inline(always)]
175 pub const fn dbg_gpdma4_stop(&self) -> bool {
176 let val = (self.0 >> 4usize) & 0x01;
177 val != 0
178 }
179 #[doc = "GPDMA channel 4 stop in debug"]
180 #[inline(always)]
181 pub fn set_dbg_gpdma4_stop(&mut self, val: bool) {
182 self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
183 }
184 #[doc = "GPDMA channel 5 stop in debug"]
185 #[inline(always)]
186 pub const fn dbg_gpdma5_stop(&self) -> bool {
187 let val = (self.0 >> 5usize) & 0x01;
188 val != 0
189 }
190 #[doc = "GPDMA channel 5 stop in debug"]
191 #[inline(always)]
192 pub fn set_dbg_gpdma5_stop(&mut self, val: bool) {
193 self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize);
194 }
195 #[doc = "GPDMA channel 6 stop in debug"]
196 #[inline(always)]
197 pub const fn dbg_gpdma6_stop(&self) -> bool {
198 let val = (self.0 >> 6usize) & 0x01;
199 val != 0
200 }
201 #[doc = "GPDMA channel 6 stop in debug"]
202 #[inline(always)]
203 pub fn set_dbg_gpdma6_stop(&mut self, val: bool) {
204 self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize);
205 }
206 #[doc = "GPDMA channel 7 stop in debug"]
207 #[inline(always)]
208 pub const fn dbg_gpdma7_stop(&self) -> bool {
209 let val = (self.0 >> 7usize) & 0x01;
210 val != 0
211 }
212 #[doc = "GPDMA channel 7 stop in debug"]
213 #[inline(always)]
214 pub fn set_dbg_gpdma7_stop(&mut self, val: bool) {
215 self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize);
216 }
217 #[doc = "GPDMA channel 8 stop in debug"]
218 #[inline(always)]
219 pub const fn dbg_gpdma8_stop(&self) -> bool {
220 let val = (self.0 >> 8usize) & 0x01;
221 val != 0
222 }
223 #[doc = "GPDMA channel 8 stop in debug"]
224 #[inline(always)]
225 pub fn set_dbg_gpdma8_stop(&mut self, val: bool) {
226 self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize);
227 }
228 #[doc = "GPDMA channel 9 stop in debug"]
229 #[inline(always)]
230 pub const fn dbg_gpdma9_stop(&self) -> bool {
231 let val = (self.0 >> 9usize) & 0x01;
232 val != 0
233 }
234 #[doc = "GPDMA channel 9 stop in debug"]
235 #[inline(always)]
236 pub fn set_dbg_gpdma9_stop(&mut self, val: bool) {
237 self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize);
238 }
239 #[doc = "GPDMA channel 10 stop in debug"]
240 #[inline(always)]
241 pub const fn dbg_gpdma10_stop(&self) -> bool {
242 let val = (self.0 >> 10usize) & 0x01;
243 val != 0
244 }
245 #[doc = "GPDMA channel 10 stop in debug"]
246 #[inline(always)]
247 pub fn set_dbg_gpdma10_stop(&mut self, val: bool) {
248 self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize);
249 }
250 #[doc = "GPDMA channel 11 stop in debug"]
251 #[inline(always)]
252 pub const fn dbg_gpdma11_stop(&self) -> bool {
253 let val = (self.0 >> 11usize) & 0x01;
254 val != 0
255 }
256 #[doc = "GPDMA channel 11 stop in debug"]
257 #[inline(always)]
258 pub fn set_dbg_gpdma11_stop(&mut self, val: bool) {
259 self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize);
260 }
261 #[doc = "GPDMA channel 12 stop in debug"]
262 #[inline(always)]
263 pub const fn dbg_gpdma12_stop(&self) -> bool {
264 let val = (self.0 >> 12usize) & 0x01;
265 val != 0
266 }
267 #[doc = "GPDMA channel 12 stop in debug"]
268 #[inline(always)]
269 pub fn set_dbg_gpdma12_stop(&mut self, val: bool) {
270 self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize);
271 }
272 #[doc = "GPDMA channel 13 stop in debug"]
273 #[inline(always)]
274 pub const fn dbg_gpdma13_stop(&self) -> bool {
275 let val = (self.0 >> 13usize) & 0x01;
276 val != 0
277 }
278 #[doc = "GPDMA channel 13 stop in debug"]
279 #[inline(always)]
280 pub fn set_dbg_gpdma13_stop(&mut self, val: bool) {
281 self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize);
282 }
283 #[doc = "GPDMA channel 14 stop in debug"]
284 #[inline(always)]
285 pub const fn dbg_gpdma14_stop(&self) -> bool {
286 let val = (self.0 >> 14usize) & 0x01;
287 val != 0
288 }
289 #[doc = "GPDMA channel 14 stop in debug"]
290 #[inline(always)]
291 pub fn set_dbg_gpdma14_stop(&mut self, val: bool) {
292 self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize);
293 }
294 #[doc = "GPDMA channel 15 stop in debug"]
295 #[inline(always)]
296 pub const fn dbg_gpdma15_stop(&self) -> bool {
297 let val = (self.0 >> 15usize) & 0x01;
298 val != 0
299 }
300 #[doc = "GPDMA channel 15 stop in debug"]
301 #[inline(always)]
302 pub fn set_dbg_gpdma15_stop(&mut self, val: bool) {
303 self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize);
304 }
305 }
306 impl Default for Ahb1fzr {
307 #[inline(always)]
308 fn default() -> Ahb1fzr {
309 Ahb1fzr(0)
310 }
311 }
312 impl core::fmt::Debug for Ahb1fzr {
313 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
314 f.debug_struct("Ahb1fzr")
315 .field("dbg_gpdma0_stop", &self.dbg_gpdma0_stop())
316 .field("dbg_gpdma1_stop", &self.dbg_gpdma1_stop())
317 .field("dbg_gpdma2_stop", &self.dbg_gpdma2_stop())
318 .field("dbg_gpdma3_stop", &self.dbg_gpdma3_stop())
319 .field("dbg_gpdma4_stop", &self.dbg_gpdma4_stop())
320 .field("dbg_gpdma5_stop", &self.dbg_gpdma5_stop())
321 .field("dbg_gpdma6_stop", &self.dbg_gpdma6_stop())
322 .field("dbg_gpdma7_stop", &self.dbg_gpdma7_stop())
323 .field("dbg_gpdma8_stop", &self.dbg_gpdma8_stop())
324 .field("dbg_gpdma9_stop", &self.dbg_gpdma9_stop())
325 .field("dbg_gpdma10_stop", &self.dbg_gpdma10_stop())
326 .field("dbg_gpdma11_stop", &self.dbg_gpdma11_stop())
327 .field("dbg_gpdma12_stop", &self.dbg_gpdma12_stop())
328 .field("dbg_gpdma13_stop", &self.dbg_gpdma13_stop())
329 .field("dbg_gpdma14_stop", &self.dbg_gpdma14_stop())
330 .field("dbg_gpdma15_stop", &self.dbg_gpdma15_stop())
331 .finish()
332 }
333 }
334 #[cfg(feature = "defmt")]
335 impl defmt::Format for Ahb1fzr {
336 fn format(&self, f: defmt::Formatter) {
337 #[derive(defmt :: Format)]
338 struct Ahb1fzr {
339 dbg_gpdma0_stop: bool,
340 dbg_gpdma1_stop: bool,
341 dbg_gpdma2_stop: bool,
342 dbg_gpdma3_stop: bool,
343 dbg_gpdma4_stop: bool,
344 dbg_gpdma5_stop: bool,
345 dbg_gpdma6_stop: bool,
346 dbg_gpdma7_stop: bool,
347 dbg_gpdma8_stop: bool,
348 dbg_gpdma9_stop: bool,
349 dbg_gpdma10_stop: bool,
350 dbg_gpdma11_stop: bool,
351 dbg_gpdma12_stop: bool,
352 dbg_gpdma13_stop: bool,
353 dbg_gpdma14_stop: bool,
354 dbg_gpdma15_stop: bool,
355 }
356 let proxy = Ahb1fzr {
357 dbg_gpdma0_stop: self.dbg_gpdma0_stop(),
358 dbg_gpdma1_stop: self.dbg_gpdma1_stop(),
359 dbg_gpdma2_stop: self.dbg_gpdma2_stop(),
360 dbg_gpdma3_stop: self.dbg_gpdma3_stop(),
361 dbg_gpdma4_stop: self.dbg_gpdma4_stop(),
362 dbg_gpdma5_stop: self.dbg_gpdma5_stop(),
363 dbg_gpdma6_stop: self.dbg_gpdma6_stop(),
364 dbg_gpdma7_stop: self.dbg_gpdma7_stop(),
365 dbg_gpdma8_stop: self.dbg_gpdma8_stop(),
366 dbg_gpdma9_stop: self.dbg_gpdma9_stop(),
367 dbg_gpdma10_stop: self.dbg_gpdma10_stop(),
368 dbg_gpdma11_stop: self.dbg_gpdma11_stop(),
369 dbg_gpdma12_stop: self.dbg_gpdma12_stop(),
370 dbg_gpdma13_stop: self.dbg_gpdma13_stop(),
371 dbg_gpdma14_stop: self.dbg_gpdma14_stop(),
372 dbg_gpdma15_stop: self.dbg_gpdma15_stop(),
373 };
374 defmt::write!(f, "{}", proxy)
375 }
376 }
377 #[doc = "Debug MCU AHB3 peripheral freeze register"]
378 #[repr(transparent)]
379 #[derive(Copy, Clone, Eq, PartialEq)]
380 pub struct Ahb3fzr(pub u32);
381 impl Ahb3fzr {
382 #[doc = "LPDMA channel 0 stop in debug"]
383 #[inline(always)]
384 pub const fn dbg_lpdma0_stop(&self) -> bool {
385 let val = (self.0 >> 0usize) & 0x01;
386 val != 0
387 }
388 #[doc = "LPDMA channel 0 stop in debug"]
389 #[inline(always)]
390 pub fn set_dbg_lpdma0_stop(&mut self, val: bool) {
391 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
392 }
393 #[doc = "LPDMA channel 1 stop in debug"]
394 #[inline(always)]
395 pub const fn dbg_lpdma1_stop(&self) -> bool {
396 let val = (self.0 >> 1usize) & 0x01;
397 val != 0
398 }
399 #[doc = "LPDMA channel 1 stop in debug"]
400 #[inline(always)]
401 pub fn set_dbg_lpdma1_stop(&mut self, val: bool) {
402 self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
403 }
404 #[doc = "LPDMA channel 2 stop in debug"]
405 #[inline(always)]
406 pub const fn dbg_lpdma2_stop(&self) -> bool {
407 let val = (self.0 >> 2usize) & 0x01;
408 val != 0
409 }
410 #[doc = "LPDMA channel 2 stop in debug"]
411 #[inline(always)]
412 pub fn set_dbg_lpdma2_stop(&mut self, val: bool) {
413 self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
414 }
415 #[doc = "LPDMA channel 3 stop in debug"]
416 #[inline(always)]
417 pub const fn dbg_lpdma3_stop(&self) -> bool {
418 let val = (self.0 >> 3usize) & 0x01;
419 val != 0
420 }
421 #[doc = "LPDMA channel 3 stop in debug"]
422 #[inline(always)]
423 pub fn set_dbg_lpdma3_stop(&mut self, val: bool) {
424 self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize);
425 }
426 }
427 impl Default for Ahb3fzr {
428 #[inline(always)]
429 fn default() -> Ahb3fzr {
430 Ahb3fzr(0)
431 }
432 }
433 impl core::fmt::Debug for Ahb3fzr {
434 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
435 f.debug_struct("Ahb3fzr")
436 .field("dbg_lpdma0_stop", &self.dbg_lpdma0_stop())
437 .field("dbg_lpdma1_stop", &self.dbg_lpdma1_stop())
438 .field("dbg_lpdma2_stop", &self.dbg_lpdma2_stop())
439 .field("dbg_lpdma3_stop", &self.dbg_lpdma3_stop())
440 .finish()
441 }
442 }
443 #[cfg(feature = "defmt")]
444 impl defmt::Format for Ahb3fzr {
445 fn format(&self, f: defmt::Formatter) {
446 #[derive(defmt :: Format)]
447 struct Ahb3fzr {
448 dbg_lpdma0_stop: bool,
449 dbg_lpdma1_stop: bool,
450 dbg_lpdma2_stop: bool,
451 dbg_lpdma3_stop: bool,
452 }
453 let proxy = Ahb3fzr {
454 dbg_lpdma0_stop: self.dbg_lpdma0_stop(),
455 dbg_lpdma1_stop: self.dbg_lpdma1_stop(),
456 dbg_lpdma2_stop: self.dbg_lpdma2_stop(),
457 dbg_lpdma3_stop: self.dbg_lpdma3_stop(),
458 };
459 defmt::write!(f, "{}", proxy)
460 }
461 }
462 #[doc = "Debug MCU APB1H peripheral freeze register"]
463 #[repr(transparent)]
464 #[derive(Copy, Clone, Eq, PartialEq)]
465 pub struct Apb1hfzr(pub u32);
466 impl Apb1hfzr {
467 #[doc = "I2C4 stop in debug"]
468 #[inline(always)]
469 pub const fn dbg_i2c4_stop(&self) -> bool {
470 let val = (self.0 >> 1usize) & 0x01;
471 val != 0
472 }
473 #[doc = "I2C4 stop in debug"]
474 #[inline(always)]
475 pub fn set_dbg_i2c4_stop(&mut self, val: bool) {
476 self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
477 }
478 #[doc = "LPTIM2 stop in debug"]
479 #[inline(always)]
480 pub const fn dbg_lptim2_stop(&self) -> bool {
481 let val = (self.0 >> 5usize) & 0x01;
482 val != 0
483 }
484 #[doc = "LPTIM2 stop in debug"]
485 #[inline(always)]
486 pub fn set_dbg_lptim2_stop(&mut self, val: bool) {
487 self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize);
488 }
489 }
490 impl Default for Apb1hfzr {
491 #[inline(always)]
492 fn default() -> Apb1hfzr {
493 Apb1hfzr(0)
494 }
495 }
496 impl core::fmt::Debug for Apb1hfzr {
497 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
498 f.debug_struct("Apb1hfzr")
499 .field("dbg_i2c4_stop", &self.dbg_i2c4_stop())
500 .field("dbg_lptim2_stop", &self.dbg_lptim2_stop())
501 .finish()
502 }
503 }
504 #[cfg(feature = "defmt")]
505 impl defmt::Format for Apb1hfzr {
506 fn format(&self, f: defmt::Formatter) {
507 #[derive(defmt :: Format)]
508 struct Apb1hfzr {
509 dbg_i2c4_stop: bool,
510 dbg_lptim2_stop: bool,
511 }
512 let proxy = Apb1hfzr {
513 dbg_i2c4_stop: self.dbg_i2c4_stop(),
514 dbg_lptim2_stop: self.dbg_lptim2_stop(),
515 };
516 defmt::write!(f, "{}", proxy)
517 }
518 }
519 #[doc = "Debug MCU APB1L peripheral freeze register"]
520 #[repr(transparent)]
521 #[derive(Copy, Clone, Eq, PartialEq)]
522 pub struct Apb1lfzr(pub u32);
523 impl Apb1lfzr {
524 #[doc = "TIM2 stop in debug"]
525 #[inline(always)]
526 pub const fn dbg_tim2_stop(&self) -> bool {
527 let val = (self.0 >> 0usize) & 0x01;
528 val != 0
529 }
530 #[doc = "TIM2 stop in debug"]
531 #[inline(always)]
532 pub fn set_dbg_tim2_stop(&mut self, val: bool) {
533 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
534 }
535 #[doc = "TIM3 stop in debug"]
536 #[inline(always)]
537 pub const fn dbg_tim3_stop(&self) -> bool {
538 let val = (self.0 >> 1usize) & 0x01;
539 val != 0
540 }
541 #[doc = "TIM3 stop in debug"]
542 #[inline(always)]
543 pub fn set_dbg_tim3_stop(&mut self, val: bool) {
544 self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
545 }
546 #[doc = "TIM4 stop in debug"]
547 #[inline(always)]
548 pub const fn dbg_tim4_stop(&self) -> bool {
549 let val = (self.0 >> 2usize) & 0x01;
550 val != 0
551 }
552 #[doc = "TIM4 stop in debug"]
553 #[inline(always)]
554 pub fn set_dbg_tim4_stop(&mut self, val: bool) {
555 self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
556 }
557 #[doc = "TIM5 stop in debug"]
558 #[inline(always)]
559 pub const fn dbg_tim5_stop(&self) -> bool {
560 let val = (self.0 >> 3usize) & 0x01;
561 val != 0
562 }
563 #[doc = "TIM5 stop in debug"]
564 #[inline(always)]
565 pub fn set_dbg_tim5_stop(&mut self, val: bool) {
566 self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize);
567 }
568 #[doc = "TIM6 stop in debug"]
569 #[inline(always)]
570 pub const fn dbg_tim6_stop(&self) -> bool {
571 let val = (self.0 >> 4usize) & 0x01;
572 val != 0
573 }
574 #[doc = "TIM6 stop in debug"]
575 #[inline(always)]
576 pub fn set_dbg_tim6_stop(&mut self, val: bool) {
577 self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
578 }
579 #[doc = "TIM7 stop in debug"]
580 #[inline(always)]
581 pub const fn dbg_tim7_stop(&self) -> bool {
582 let val = (self.0 >> 5usize) & 0x01;
583 val != 0
584 }
585 #[doc = "TIM7 stop in debug"]
586 #[inline(always)]
587 pub fn set_dbg_tim7_stop(&mut self, val: bool) {
588 self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize);
589 }
590 #[doc = "Window watchdog counter stop in debug"]
591 #[inline(always)]
592 pub const fn dbg_wwdg_stop(&self) -> bool {
593 let val = (self.0 >> 11usize) & 0x01;
594 val != 0
595 }
596 #[doc = "Window watchdog counter stop in debug"]
597 #[inline(always)]
598 pub fn set_dbg_wwdg_stop(&mut self, val: bool) {
599 self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize);
600 }
601 #[doc = "Independent watchdog counter stop in debug"]
602 #[inline(always)]
603 pub const fn dbg_iwdg_stop(&self) -> bool {
604 let val = (self.0 >> 12usize) & 0x01;
605 val != 0
606 }
607 #[doc = "Independent watchdog counter stop in debug"]
608 #[inline(always)]
609 pub fn set_dbg_iwdg_stop(&mut self, val: bool) {
610 self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize);
611 }
612 #[doc = "I2C1 SMBUS timeout stop in debug"]
613 #[inline(always)]
614 pub const fn dbg_i2c1_stop(&self) -> bool {
615 let val = (self.0 >> 21usize) & 0x01;
616 val != 0
617 }
618 #[doc = "I2C1 SMBUS timeout stop in debug"]
619 #[inline(always)]
620 pub fn set_dbg_i2c1_stop(&mut self, val: bool) {
621 self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize);
622 }
623 #[doc = "I2C2 SMBUS timeout stop in debug"]
624 #[inline(always)]
625 pub const fn dbg_i2c2_stop(&self) -> bool {
626 let val = (self.0 >> 22usize) & 0x01;
627 val != 0
628 }
629 #[doc = "I2C2 SMBUS timeout stop in debug"]
630 #[inline(always)]
631 pub fn set_dbg_i2c2_stop(&mut self, val: bool) {
632 self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize);
633 }
634 }
635 impl Default for Apb1lfzr {
636 #[inline(always)]
637 fn default() -> Apb1lfzr {
638 Apb1lfzr(0)
639 }
640 }
641 impl core::fmt::Debug for Apb1lfzr {
642 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
643 f.debug_struct("Apb1lfzr")
644 .field("dbg_tim2_stop", &self.dbg_tim2_stop())
645 .field("dbg_tim3_stop", &self.dbg_tim3_stop())
646 .field("dbg_tim4_stop", &self.dbg_tim4_stop())
647 .field("dbg_tim5_stop", &self.dbg_tim5_stop())
648 .field("dbg_tim6_stop", &self.dbg_tim6_stop())
649 .field("dbg_tim7_stop", &self.dbg_tim7_stop())
650 .field("dbg_wwdg_stop", &self.dbg_wwdg_stop())
651 .field("dbg_iwdg_stop", &self.dbg_iwdg_stop())
652 .field("dbg_i2c1_stop", &self.dbg_i2c1_stop())
653 .field("dbg_i2c2_stop", &self.dbg_i2c2_stop())
654 .finish()
655 }
656 }
657 #[cfg(feature = "defmt")]
658 impl defmt::Format for Apb1lfzr {
659 fn format(&self, f: defmt::Formatter) {
660 #[derive(defmt :: Format)]
661 struct Apb1lfzr {
662 dbg_tim2_stop: bool,
663 dbg_tim3_stop: bool,
664 dbg_tim4_stop: bool,
665 dbg_tim5_stop: bool,
666 dbg_tim6_stop: bool,
667 dbg_tim7_stop: bool,
668 dbg_wwdg_stop: bool,
669 dbg_iwdg_stop: bool,
670 dbg_i2c1_stop: bool,
671 dbg_i2c2_stop: bool,
672 }
673 let proxy = Apb1lfzr {
674 dbg_tim2_stop: self.dbg_tim2_stop(),
675 dbg_tim3_stop: self.dbg_tim3_stop(),
676 dbg_tim4_stop: self.dbg_tim4_stop(),
677 dbg_tim5_stop: self.dbg_tim5_stop(),
678 dbg_tim6_stop: self.dbg_tim6_stop(),
679 dbg_tim7_stop: self.dbg_tim7_stop(),
680 dbg_wwdg_stop: self.dbg_wwdg_stop(),
681 dbg_iwdg_stop: self.dbg_iwdg_stop(),
682 dbg_i2c1_stop: self.dbg_i2c1_stop(),
683 dbg_i2c2_stop: self.dbg_i2c2_stop(),
684 };
685 defmt::write!(f, "{}", proxy)
686 }
687 }
688 #[doc = "Debug MCU APB2 peripheral freeze register"]
689 #[repr(transparent)]
690 #[derive(Copy, Clone, Eq, PartialEq)]
691 pub struct Apb2fzr(pub u32);
692 impl Apb2fzr {
693 #[doc = "TIM1 counter stopped when core is halted"]
694 #[inline(always)]
695 pub const fn dbg_tim1_stop(&self) -> bool {
696 let val = (self.0 >> 11usize) & 0x01;
697 val != 0
698 }
699 #[doc = "TIM1 counter stopped when core is halted"]
700 #[inline(always)]
701 pub fn set_dbg_tim1_stop(&mut self, val: bool) {
702 self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize);
703 }
704 #[doc = "TIM8 stop in debug"]
705 #[inline(always)]
706 pub const fn dbg_tim8_stop(&self) -> bool {
707 let val = (self.0 >> 13usize) & 0x01;
708 val != 0
709 }
710 #[doc = "TIM8 stop in debug"]
711 #[inline(always)]
712 pub fn set_dbg_tim8_stop(&mut self, val: bool) {
713 self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize);
714 }
715 #[doc = "TIM15 counter stopped when core is halted"]
716 #[inline(always)]
717 pub const fn dbg_tim15_stop(&self) -> bool {
718 let val = (self.0 >> 16usize) & 0x01;
719 val != 0
720 }
721 #[doc = "TIM15 counter stopped when core is halted"]
722 #[inline(always)]
723 pub fn set_dbg_tim15_stop(&mut self, val: bool) {
724 self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize);
725 }
726 #[doc = "TIM16 counter stopped when core is halted"]
727 #[inline(always)]
728 pub const fn dbg_tim16_stop(&self) -> bool {
729 let val = (self.0 >> 17usize) & 0x01;
730 val != 0
731 }
732 #[doc = "TIM16 counter stopped when core is halted"]
733 #[inline(always)]
734 pub fn set_dbg_tim16_stop(&mut self, val: bool) {
735 self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize);
736 }
737 #[doc = "DBG_TIM17_STOP"]
738 #[inline(always)]
739 pub const fn dbg_tim17_stop(&self) -> bool {
740 let val = (self.0 >> 18usize) & 0x01;
741 val != 0
742 }
743 #[doc = "DBG_TIM17_STOP"]
744 #[inline(always)]
745 pub fn set_dbg_tim17_stop(&mut self, val: bool) {
746 self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize);
747 }
748 }
749 impl Default for Apb2fzr {
750 #[inline(always)]
751 fn default() -> Apb2fzr {
752 Apb2fzr(0)
753 }
754 }
755 impl core::fmt::Debug for Apb2fzr {
756 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
757 f.debug_struct("Apb2fzr")
758 .field("dbg_tim1_stop", &self.dbg_tim1_stop())
759 .field("dbg_tim8_stop", &self.dbg_tim8_stop())
760 .field("dbg_tim15_stop", &self.dbg_tim15_stop())
761 .field("dbg_tim16_stop", &self.dbg_tim16_stop())
762 .field("dbg_tim17_stop", &self.dbg_tim17_stop())
763 .finish()
764 }
765 }
766 #[cfg(feature = "defmt")]
767 impl defmt::Format for Apb2fzr {
768 fn format(&self, f: defmt::Formatter) {
769 #[derive(defmt :: Format)]
770 struct Apb2fzr {
771 dbg_tim1_stop: bool,
772 dbg_tim8_stop: bool,
773 dbg_tim15_stop: bool,
774 dbg_tim16_stop: bool,
775 dbg_tim17_stop: bool,
776 }
777 let proxy = Apb2fzr {
778 dbg_tim1_stop: self.dbg_tim1_stop(),
779 dbg_tim8_stop: self.dbg_tim8_stop(),
780 dbg_tim15_stop: self.dbg_tim15_stop(),
781 dbg_tim16_stop: self.dbg_tim16_stop(),
782 dbg_tim17_stop: self.dbg_tim17_stop(),
783 };
784 defmt::write!(f, "{}", proxy)
785 }
786 }
787 #[doc = "Debug MCU APB3 peripheral freeze register"]
788 #[repr(transparent)]
789 #[derive(Copy, Clone, Eq, PartialEq)]
790 pub struct Apb3fzr(pub u32);
791 impl Apb3fzr {
792 #[doc = "I2C3 stop in debug"]
793 #[inline(always)]
794 pub const fn dbg_i2c3_stop(&self) -> bool {
795 let val = (self.0 >> 10usize) & 0x01;
796 val != 0
797 }
798 #[doc = "I2C3 stop in debug"]
799 #[inline(always)]
800 pub fn set_dbg_i2c3_stop(&mut self, val: bool) {
801 self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize);
802 }
803 #[doc = "LPTIM1 stop in debug"]
804 #[inline(always)]
805 pub const fn dbg_lptim1_stop(&self) -> bool {
806 let val = (self.0 >> 17usize) & 0x01;
807 val != 0
808 }
809 #[doc = "LPTIM1 stop in debug"]
810 #[inline(always)]
811 pub fn set_dbg_lptim1_stop(&mut self, val: bool) {
812 self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize);
813 }
814 #[doc = "LPTIM3 stop in debug"]
815 #[inline(always)]
816 pub const fn dbg_lptim3_stop(&self) -> bool {
817 let val = (self.0 >> 18usize) & 0x01;
818 val != 0
819 }
820 #[doc = "LPTIM3 stop in debug"]
821 #[inline(always)]
822 pub fn set_dbg_lptim3_stop(&mut self, val: bool) {
823 self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize);
824 }
825 #[doc = "LPTIM4 stop in debug"]
826 #[inline(always)]
827 pub const fn dbg_lptim4_stop(&self) -> bool {
828 let val = (self.0 >> 19usize) & 0x01;
829 val != 0
830 }
831 #[doc = "LPTIM4 stop in debug"]
832 #[inline(always)]
833 pub fn set_dbg_lptim4_stop(&mut self, val: bool) {
834 self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize);
835 }
836 #[doc = "RTC stop in debug"]
837 #[inline(always)]
838 pub const fn dbg_rtc_stop(&self) -> bool {
839 let val = (self.0 >> 30usize) & 0x01;
840 val != 0
841 }
842 #[doc = "RTC stop in debug"]
843 #[inline(always)]
844 pub fn set_dbg_rtc_stop(&mut self, val: bool) {
845 self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize);
846 }
847 }
848 impl Default for Apb3fzr {
849 #[inline(always)]
850 fn default() -> Apb3fzr {
851 Apb3fzr(0)
852 }
853 }
854 impl core::fmt::Debug for Apb3fzr {
855 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
856 f.debug_struct("Apb3fzr")
857 .field("dbg_i2c3_stop", &self.dbg_i2c3_stop())
858 .field("dbg_lptim1_stop", &self.dbg_lptim1_stop())
859 .field("dbg_lptim3_stop", &self.dbg_lptim3_stop())
860 .field("dbg_lptim4_stop", &self.dbg_lptim4_stop())
861 .field("dbg_rtc_stop", &self.dbg_rtc_stop())
862 .finish()
863 }
864 }
865 #[cfg(feature = "defmt")]
866 impl defmt::Format for Apb3fzr {
867 fn format(&self, f: defmt::Formatter) {
868 #[derive(defmt :: Format)]
869 struct Apb3fzr {
870 dbg_i2c3_stop: bool,
871 dbg_lptim1_stop: bool,
872 dbg_lptim3_stop: bool,
873 dbg_lptim4_stop: bool,
874 dbg_rtc_stop: bool,
875 }
876 let proxy = Apb3fzr {
877 dbg_i2c3_stop: self.dbg_i2c3_stop(),
878 dbg_lptim1_stop: self.dbg_lptim1_stop(),
879 dbg_lptim3_stop: self.dbg_lptim3_stop(),
880 dbg_lptim4_stop: self.dbg_lptim4_stop(),
881 dbg_rtc_stop: self.dbg_rtc_stop(),
882 };
883 defmt::write!(f, "{}", proxy)
884 }
885 }
886 #[doc = "Debug MCU CoreSight component identity register 0"]
887 #[repr(transparent)]
888 #[derive(Copy, Clone, Eq, PartialEq)]
889 pub struct Cidr0(pub u32);
890 impl Cidr0 {
891 #[doc = "component identification bits \\[7:0\\]"]
892 #[inline(always)]
893 pub const fn preamble(&self) -> u8 {
894 let val = (self.0 >> 0usize) & 0xff;
895 val as u8
896 }
897 #[doc = "component identification bits \\[7:0\\]"]
898 #[inline(always)]
899 pub fn set_preamble(&mut self, val: u8) {
900 self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize);
901 }
902 }
903 impl Default for Cidr0 {
904 #[inline(always)]
905 fn default() -> Cidr0 {
906 Cidr0(0)
907 }
908 }
909 impl core::fmt::Debug for Cidr0 {
910 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
911 f.debug_struct("Cidr0").field("preamble", &self.preamble()).finish()
912 }
913 }
914 #[cfg(feature = "defmt")]
915 impl defmt::Format for Cidr0 {
916 fn format(&self, f: defmt::Formatter) {
917 #[derive(defmt :: Format)]
918 struct Cidr0 {
919 preamble: u8,
920 }
921 let proxy = Cidr0 {
922 preamble: self.preamble(),
923 };
924 defmt::write!(f, "{}", proxy)
925 }
926 }
927 #[doc = "Debug MCU CoreSight component identity register 1"]
928 #[repr(transparent)]
929 #[derive(Copy, Clone, Eq, PartialEq)]
930 pub struct Cidr1(pub u32);
931 impl Cidr1 {
932 #[doc = "component identification bits \\[11:8\\]"]
933 #[inline(always)]
934 pub const fn preamble(&self) -> u8 {
935 let val = (self.0 >> 0usize) & 0x0f;
936 val as u8
937 }
938 #[doc = "component identification bits \\[11:8\\]"]
939 #[inline(always)]
940 pub fn set_preamble(&mut self, val: u8) {
941 self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize);
942 }
943 #[doc = "component identification bits \\[15:12\\]
944- component class"]
945 #[inline(always)]
946 pub const fn class(&self) -> u8 {
947 let val = (self.0 >> 4usize) & 0x0f;
948 val as u8
949 }
950 #[doc = "component identification bits \\[15:12\\]
951- component class"]
952 #[inline(always)]
953 pub fn set_class(&mut self, val: u8) {
954 self.0 = (self.0 & !(0x0f << 4usize)) | (((val as u32) & 0x0f) << 4usize);
955 }
956 }
957 impl Default for Cidr1 {
958 #[inline(always)]
959 fn default() -> Cidr1 {
960 Cidr1(0)
961 }
962 }
963 impl core::fmt::Debug for Cidr1 {
964 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
965 f.debug_struct("Cidr1")
966 .field("preamble", &self.preamble())
967 .field("class", &self.class())
968 .finish()
969 }
970 }
971 #[cfg(feature = "defmt")]
972 impl defmt::Format for Cidr1 {
973 fn format(&self, f: defmt::Formatter) {
974 #[derive(defmt :: Format)]
975 struct Cidr1 {
976 preamble: u8,
977 class: u8,
978 }
979 let proxy = Cidr1 {
980 preamble: self.preamble(),
981 class: self.class(),
982 };
983 defmt::write!(f, "{}", proxy)
984 }
985 }
986 #[doc = "Debug MCU CoreSight component identity register 2"]
987 #[repr(transparent)]
988 #[derive(Copy, Clone, Eq, PartialEq)]
989 pub struct Cidr2(pub u32);
990 impl Cidr2 {
991 #[doc = "component identification bits \\[23:16\\]"]
992 #[inline(always)]
993 pub const fn preamble(&self) -> u8 {
994 let val = (self.0 >> 0usize) & 0xff;
995 val as u8
996 }
997 #[doc = "component identification bits \\[23:16\\]"]
998 #[inline(always)]
999 pub fn set_preamble(&mut self, val: u8) {
1000 self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize);
1001 }
1002 }
1003 impl Default for Cidr2 {
1004 #[inline(always)]
1005 fn default() -> Cidr2 {
1006 Cidr2(0)
1007 }
1008 }
1009 impl core::fmt::Debug for Cidr2 {
1010 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1011 f.debug_struct("Cidr2").field("preamble", &self.preamble()).finish()
1012 }
1013 }
1014 #[cfg(feature = "defmt")]
1015 impl defmt::Format for Cidr2 {
1016 fn format(&self, f: defmt::Formatter) {
1017 #[derive(defmt :: Format)]
1018 struct Cidr2 {
1019 preamble: u8,
1020 }
1021 let proxy = Cidr2 {
1022 preamble: self.preamble(),
1023 };
1024 defmt::write!(f, "{}", proxy)
1025 }
1026 }
1027 #[doc = "Debug MCU CoreSight component identity register 3"]
1028 #[repr(transparent)]
1029 #[derive(Copy, Clone, Eq, PartialEq)]
1030 pub struct Cidr3(pub u32);
1031 impl Cidr3 {
1032 #[doc = "component identification bits \\[31:24\\]"]
1033 #[inline(always)]
1034 pub const fn preamble(&self) -> u8 {
1035 let val = (self.0 >> 0usize) & 0xff;
1036 val as u8
1037 }
1038 #[doc = "component identification bits \\[31:24\\]"]
1039 #[inline(always)]
1040 pub fn set_preamble(&mut self, val: u8) {
1041 self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize);
1042 }
1043 }
1044 impl Default for Cidr3 {
1045 #[inline(always)]
1046 fn default() -> Cidr3 {
1047 Cidr3(0)
1048 }
1049 }
1050 impl core::fmt::Debug for Cidr3 {
1051 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1052 f.debug_struct("Cidr3").field("preamble", &self.preamble()).finish()
1053 }
1054 }
1055 #[cfg(feature = "defmt")]
1056 impl defmt::Format for Cidr3 {
1057 fn format(&self, f: defmt::Formatter) {
1058 #[derive(defmt :: Format)]
1059 struct Cidr3 {
1060 preamble: u8,
1061 }
1062 let proxy = Cidr3 {
1063 preamble: self.preamble(),
1064 };
1065 defmt::write!(f, "{}", proxy)
1066 }
1067 }
1068 #[doc = "Debug MCU configuration register"]
1069 #[repr(transparent)]
1070 #[derive(Copy, Clone, Eq, PartialEq)]
1071 pub struct Cr(pub u32);
1072 impl Cr {
1073 #[doc = "Debug Stop mode"]
1074 #[inline(always)]
1075 pub const fn dbg_stop(&self) -> bool {
1076 let val = (self.0 >> 1usize) & 0x01;
1077 val != 0
1078 }
1079 #[doc = "Debug Stop mode"]
1080 #[inline(always)]
1081 pub fn set_dbg_stop(&mut self, val: bool) {
1082 self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
1083 }
1084 #[doc = "Debug Standby mode"]
1085 #[inline(always)]
1086 pub const fn dbg_standby(&self) -> bool {
1087 let val = (self.0 >> 2usize) & 0x01;
1088 val != 0
1089 }
1090 #[doc = "Debug Standby mode"]
1091 #[inline(always)]
1092 pub fn set_dbg_standby(&mut self, val: bool) {
1093 self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
1094 }
1095 #[doc = "Trace pin assignment control"]
1096 #[inline(always)]
1097 pub const fn trace_ioen(&self) -> bool {
1098 let val = (self.0 >> 4usize) & 0x01;
1099 val != 0
1100 }
1101 #[doc = "Trace pin assignment control"]
1102 #[inline(always)]
1103 pub fn set_trace_ioen(&mut self, val: bool) {
1104 self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
1105 }
1106 #[doc = "trace port and clock enable"]
1107 #[inline(always)]
1108 pub const fn trace_en(&self) -> bool {
1109 let val = (self.0 >> 5usize) & 0x01;
1110 val != 0
1111 }
1112 #[doc = "trace port and clock enable"]
1113 #[inline(always)]
1114 pub fn set_trace_en(&mut self, val: bool) {
1115 self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize);
1116 }
1117 #[doc = "Trace pin assignment control"]
1118 #[inline(always)]
1119 pub const fn trace_mode(&self) -> u8 {
1120 let val = (self.0 >> 6usize) & 0x03;
1121 val as u8
1122 }
1123 #[doc = "Trace pin assignment control"]
1124 #[inline(always)]
1125 pub fn set_trace_mode(&mut self, val: u8) {
1126 self.0 = (self.0 & !(0x03 << 6usize)) | (((val as u32) & 0x03) << 6usize);
1127 }
1128 }
1129 impl Default for Cr {
1130 #[inline(always)]
1131 fn default() -> Cr {
1132 Cr(0)
1133 }
1134 }
1135 impl core::fmt::Debug for Cr {
1136 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1137 f.debug_struct("Cr")
1138 .field("dbg_stop", &self.dbg_stop())
1139 .field("dbg_standby", &self.dbg_standby())
1140 .field("trace_ioen", &self.trace_ioen())
1141 .field("trace_en", &self.trace_en())
1142 .field("trace_mode", &self.trace_mode())
1143 .finish()
1144 }
1145 }
1146 #[cfg(feature = "defmt")]
1147 impl defmt::Format for Cr {
1148 fn format(&self, f: defmt::Formatter) {
1149 #[derive(defmt :: Format)]
1150 struct Cr {
1151 dbg_stop: bool,
1152 dbg_standby: bool,
1153 trace_ioen: bool,
1154 trace_en: bool,
1155 trace_mode: u8,
1156 }
1157 let proxy = Cr {
1158 dbg_stop: self.dbg_stop(),
1159 dbg_standby: self.dbg_standby(),
1160 trace_ioen: self.trace_ioen(),
1161 trace_en: self.trace_en(),
1162 trace_mode: self.trace_mode(),
1163 };
1164 defmt::write!(f, "{}", proxy)
1165 }
1166 }
1167 #[doc = "DBGMCU debug device authentication register"]
1168 #[repr(transparent)]
1169 #[derive(Copy, Clone, Eq, PartialEq)]
1170 pub struct DbgmcuDbgAuthDevice(pub u32);
1171 impl DbgmcuDbgAuthDevice {
1172 #[doc = "Device specific ID Device specific ID used for RDP regression."]
1173 #[inline(always)]
1174 pub const fn auth_id(&self) -> u32 {
1175 let val = (self.0 >> 0usize) & 0xffff_ffff;
1176 val as u32
1177 }
1178 #[doc = "Device specific ID Device specific ID used for RDP regression."]
1179 #[inline(always)]
1180 pub fn set_auth_id(&mut self, val: u32) {
1181 self.0 = (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize);
1182 }
1183 }
1184 impl Default for DbgmcuDbgAuthDevice {
1185 #[inline(always)]
1186 fn default() -> DbgmcuDbgAuthDevice {
1187 DbgmcuDbgAuthDevice(0)
1188 }
1189 }
1190 impl core::fmt::Debug for DbgmcuDbgAuthDevice {
1191 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1192 f.debug_struct("DbgmcuDbgAuthDevice")
1193 .field("auth_id", &self.auth_id())
1194 .finish()
1195 }
1196 }
1197 #[cfg(feature = "defmt")]
1198 impl defmt::Format for DbgmcuDbgAuthDevice {
1199 fn format(&self, f: defmt::Formatter) {
1200 #[derive(defmt :: Format)]
1201 struct DbgmcuDbgAuthDevice {
1202 auth_id: u32,
1203 }
1204 let proxy = DbgmcuDbgAuthDevice {
1205 auth_id: self.auth_id(),
1206 };
1207 defmt::write!(f, "{}", proxy)
1208 }
1209 }
1210 #[doc = "DBGMCU debug host authentication register"]
1211 #[repr(transparent)]
1212 #[derive(Copy, Clone, Eq, PartialEq)]
1213 pub struct DbgmcuDbgAuthHost(pub u32);
1214 impl DbgmcuDbgAuthHost {
1215 #[doc = "Device authentication key The device specific 64-bit authentication key (OEM key) must be written to this register (in two successive 32-bit writes, least significant word first) to permit RDP regression. Writing a wrong key locks access to the device and prevent code execution from the Flash memory."]
1216 #[inline(always)]
1217 pub const fn auth_key(&self) -> u32 {
1218 let val = (self.0 >> 0usize) & 0xffff_ffff;
1219 val as u32
1220 }
1221 #[doc = "Device authentication key The device specific 64-bit authentication key (OEM key) must be written to this register (in two successive 32-bit writes, least significant word first) to permit RDP regression. Writing a wrong key locks access to the device and prevent code execution from the Flash memory."]
1222 #[inline(always)]
1223 pub fn set_auth_key(&mut self, val: u32) {
1224 self.0 = (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize);
1225 }
1226 }
1227 impl Default for DbgmcuDbgAuthHost {
1228 #[inline(always)]
1229 fn default() -> DbgmcuDbgAuthHost {
1230 DbgmcuDbgAuthHost(0)
1231 }
1232 }
1233 impl core::fmt::Debug for DbgmcuDbgAuthHost {
1234 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1235 f.debug_struct("DbgmcuDbgAuthHost")
1236 .field("auth_key", &self.auth_key())
1237 .finish()
1238 }
1239 }
1240 #[cfg(feature = "defmt")]
1241 impl defmt::Format for DbgmcuDbgAuthHost {
1242 fn format(&self, f: defmt::Formatter) {
1243 #[derive(defmt :: Format)]
1244 struct DbgmcuDbgAuthHost {
1245 auth_key: u32,
1246 }
1247 let proxy = DbgmcuDbgAuthHost {
1248 auth_key: self.auth_key(),
1249 };
1250 defmt::write!(f, "{}", proxy)
1251 }
1252 }
1253 #[doc = "DBGMCU status register"]
1254 #[repr(transparent)]
1255 #[derive(Copy, Clone, Eq, PartialEq)]
1256 pub struct DbgmcuSr(pub u32);
1257 impl DbgmcuSr {
1258 #[doc = "Bit n identifies whether access port AP n is present in device Bit n = 0: APn absent Bit n = 1: APn present"]
1259 #[inline(always)]
1260 pub const fn ap_present(&self) -> u8 {
1261 let val = (self.0 >> 0usize) & 0xff;
1262 val as u8
1263 }
1264 #[doc = "Bit n identifies whether access port AP n is present in device Bit n = 0: APn absent Bit n = 1: APn present"]
1265 #[inline(always)]
1266 pub fn set_ap_present(&mut self, val: u8) {
1267 self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize);
1268 }
1269 #[doc = "DECLARATION TO BE CONFIRMED by PRODUCT OWNER! Bit n identifies whether access port AP n is open (can be accessed via the debug port) or locked (debug access to the AP is blocked) Bit n = 0: APn locked Bit n = 1: APn enabled"]
1270 #[inline(always)]
1271 pub const fn ap_locked(&self) -> u8 {
1272 let val = (self.0 >> 8usize) & 0xff;
1273 val as u8
1274 }
1275 #[doc = "DECLARATION TO BE CONFIRMED by PRODUCT OWNER! Bit n identifies whether access port AP n is open (can be accessed via the debug port) or locked (debug access to the AP is blocked) Bit n = 0: APn locked Bit n = 1: APn enabled"]
1276 #[inline(always)]
1277 pub fn set_ap_locked(&mut self, val: u8) {
1278 self.0 = (self.0 & !(0xff << 8usize)) | (((val as u32) & 0xff) << 8usize);
1279 }
1280 }
1281 impl Default for DbgmcuSr {
1282 #[inline(always)]
1283 fn default() -> DbgmcuSr {
1284 DbgmcuSr(0)
1285 }
1286 }
1287 impl core::fmt::Debug for DbgmcuSr {
1288 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1289 f.debug_struct("DbgmcuSr")
1290 .field("ap_present", &self.ap_present())
1291 .field("ap_locked", &self.ap_locked())
1292 .finish()
1293 }
1294 }
1295 #[cfg(feature = "defmt")]
1296 impl defmt::Format for DbgmcuSr {
1297 fn format(&self, f: defmt::Formatter) {
1298 #[derive(defmt :: Format)]
1299 struct DbgmcuSr {
1300 ap_present: u8,
1301 ap_locked: u8,
1302 }
1303 let proxy = DbgmcuSr {
1304 ap_present: self.ap_present(),
1305 ap_locked: self.ap_locked(),
1306 };
1307 defmt::write!(f, "{}", proxy)
1308 }
1309 }
1310 #[doc = "DBGMCU_IDCODE"]
1311 #[repr(transparent)]
1312 #[derive(Copy, Clone, Eq, PartialEq)]
1313 pub struct Idcode(pub u32);
1314 impl Idcode {
1315 #[doc = "Device dentification"]
1316 #[inline(always)]
1317 pub const fn dev_id(&self) -> u16 {
1318 let val = (self.0 >> 0usize) & 0x0fff;
1319 val as u16
1320 }
1321 #[doc = "Device dentification"]
1322 #[inline(always)]
1323 pub fn set_dev_id(&mut self, val: u16) {
1324 self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize);
1325 }
1326 #[doc = "Revision"]
1327 #[inline(always)]
1328 pub const fn rev_id(&self) -> u16 {
1329 let val = (self.0 >> 16usize) & 0xffff;
1330 val as u16
1331 }
1332 #[doc = "Revision"]
1333 #[inline(always)]
1334 pub fn set_rev_id(&mut self, val: u16) {
1335 self.0 = (self.0 & !(0xffff << 16usize)) | (((val as u32) & 0xffff) << 16usize);
1336 }
1337 }
1338 impl Default for Idcode {
1339 #[inline(always)]
1340 fn default() -> Idcode {
1341 Idcode(0)
1342 }
1343 }
1344 impl core::fmt::Debug for Idcode {
1345 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1346 f.debug_struct("Idcode")
1347 .field("dev_id", &self.dev_id())
1348 .field("rev_id", &self.rev_id())
1349 .finish()
1350 }
1351 }
1352 #[cfg(feature = "defmt")]
1353 impl defmt::Format for Idcode {
1354 fn format(&self, f: defmt::Formatter) {
1355 #[derive(defmt :: Format)]
1356 struct Idcode {
1357 dev_id: u16,
1358 rev_id: u16,
1359 }
1360 let proxy = Idcode {
1361 dev_id: self.dev_id(),
1362 rev_id: self.rev_id(),
1363 };
1364 defmt::write!(f, "{}", proxy)
1365 }
1366 }
1367 #[doc = "Debug MCU CoreSight peripheral identity register 0"]
1368 #[repr(transparent)]
1369 #[derive(Copy, Clone, Eq, PartialEq)]
1370 pub struct Pidr0(pub u32);
1371 impl Pidr0 {
1372 #[doc = "part number bits \\[7:0\\]"]
1373 #[inline(always)]
1374 pub const fn partnum(&self) -> u8 {
1375 let val = (self.0 >> 0usize) & 0xff;
1376 val as u8
1377 }
1378 #[doc = "part number bits \\[7:0\\]"]
1379 #[inline(always)]
1380 pub fn set_partnum(&mut self, val: u8) {
1381 self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize);
1382 }
1383 }
1384 impl Default for Pidr0 {
1385 #[inline(always)]
1386 fn default() -> Pidr0 {
1387 Pidr0(0)
1388 }
1389 }
1390 impl core::fmt::Debug for Pidr0 {
1391 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1392 f.debug_struct("Pidr0").field("partnum", &self.partnum()).finish()
1393 }
1394 }
1395 #[cfg(feature = "defmt")]
1396 impl defmt::Format for Pidr0 {
1397 fn format(&self, f: defmt::Formatter) {
1398 #[derive(defmt :: Format)]
1399 struct Pidr0 {
1400 partnum: u8,
1401 }
1402 let proxy = Pidr0 {
1403 partnum: self.partnum(),
1404 };
1405 defmt::write!(f, "{}", proxy)
1406 }
1407 }
1408 #[doc = "Debug MCU CoreSight peripheral identity register 1"]
1409 #[repr(transparent)]
1410 #[derive(Copy, Clone, Eq, PartialEq)]
1411 pub struct Pidr1(pub u32);
1412 impl Pidr1 {
1413 #[doc = "part number bits \\[11:8\\]"]
1414 #[inline(always)]
1415 pub const fn partnum(&self) -> u8 {
1416 let val = (self.0 >> 0usize) & 0x0f;
1417 val as u8
1418 }
1419 #[doc = "part number bits \\[11:8\\]"]
1420 #[inline(always)]
1421 pub fn set_partnum(&mut self, val: u8) {
1422 self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize);
1423 }
1424 #[doc = "JEP106 identity code bits \\[3:0\\]"]
1425 #[inline(always)]
1426 pub const fn jep106id(&self) -> u8 {
1427 let val = (self.0 >> 4usize) & 0x0f;
1428 val as u8
1429 }
1430 #[doc = "JEP106 identity code bits \\[3:0\\]"]
1431 #[inline(always)]
1432 pub fn set_jep106id(&mut self, val: u8) {
1433 self.0 = (self.0 & !(0x0f << 4usize)) | (((val as u32) & 0x0f) << 4usize);
1434 }
1435 }
1436 impl Default for Pidr1 {
1437 #[inline(always)]
1438 fn default() -> Pidr1 {
1439 Pidr1(0)
1440 }
1441 }
1442 impl core::fmt::Debug for Pidr1 {
1443 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1444 f.debug_struct("Pidr1")
1445 .field("partnum", &self.partnum())
1446 .field("jep106id", &self.jep106id())
1447 .finish()
1448 }
1449 }
1450 #[cfg(feature = "defmt")]
1451 impl defmt::Format for Pidr1 {
1452 fn format(&self, f: defmt::Formatter) {
1453 #[derive(defmt :: Format)]
1454 struct Pidr1 {
1455 partnum: u8,
1456 jep106id: u8,
1457 }
1458 let proxy = Pidr1 {
1459 partnum: self.partnum(),
1460 jep106id: self.jep106id(),
1461 };
1462 defmt::write!(f, "{}", proxy)
1463 }
1464 }
1465 #[doc = "Debug MCU CoreSight peripheral identity register 2"]
1466 #[repr(transparent)]
1467 #[derive(Copy, Clone, Eq, PartialEq)]
1468 pub struct Pidr2(pub u32);
1469 impl Pidr2 {
1470 #[doc = "JEP106 identity code bits \\[6:4\\]"]
1471 #[inline(always)]
1472 pub const fn jep106id(&self) -> u8 {
1473 let val = (self.0 >> 0usize) & 0x07;
1474 val as u8
1475 }
1476 #[doc = "JEP106 identity code bits \\[6:4\\]"]
1477 #[inline(always)]
1478 pub fn set_jep106id(&mut self, val: u8) {
1479 self.0 = (self.0 & !(0x07 << 0usize)) | (((val as u32) & 0x07) << 0usize);
1480 }
1481 #[doc = "JEDEC assigned value"]
1482 #[inline(always)]
1483 pub const fn jedec(&self) -> bool {
1484 let val = (self.0 >> 3usize) & 0x01;
1485 val != 0
1486 }
1487 #[doc = "JEDEC assigned value"]
1488 #[inline(always)]
1489 pub fn set_jedec(&mut self, val: bool) {
1490 self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize);
1491 }
1492 #[doc = "component revision number"]
1493 #[inline(always)]
1494 pub const fn revision(&self) -> u8 {
1495 let val = (self.0 >> 4usize) & 0x0f;
1496 val as u8
1497 }
1498 #[doc = "component revision number"]
1499 #[inline(always)]
1500 pub fn set_revision(&mut self, val: u8) {
1501 self.0 = (self.0 & !(0x0f << 4usize)) | (((val as u32) & 0x0f) << 4usize);
1502 }
1503 }
1504 impl Default for Pidr2 {
1505 #[inline(always)]
1506 fn default() -> Pidr2 {
1507 Pidr2(0)
1508 }
1509 }
1510 impl core::fmt::Debug for Pidr2 {
1511 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1512 f.debug_struct("Pidr2")
1513 .field("jep106id", &self.jep106id())
1514 .field("jedec", &self.jedec())
1515 .field("revision", &self.revision())
1516 .finish()
1517 }
1518 }
1519 #[cfg(feature = "defmt")]
1520 impl defmt::Format for Pidr2 {
1521 fn format(&self, f: defmt::Formatter) {
1522 #[derive(defmt :: Format)]
1523 struct Pidr2 {
1524 jep106id: u8,
1525 jedec: bool,
1526 revision: u8,
1527 }
1528 let proxy = Pidr2 {
1529 jep106id: self.jep106id(),
1530 jedec: self.jedec(),
1531 revision: self.revision(),
1532 };
1533 defmt::write!(f, "{}", proxy)
1534 }
1535 }
1536 #[doc = "Debug MCU CoreSight peripheral identity register 3"]
1537 #[repr(transparent)]
1538 #[derive(Copy, Clone, Eq, PartialEq)]
1539 pub struct Pidr3(pub u32);
1540 impl Pidr3 {
1541 #[doc = "customer modified"]
1542 #[inline(always)]
1543 pub const fn cmod(&self) -> u8 {
1544 let val = (self.0 >> 0usize) & 0x0f;
1545 val as u8
1546 }
1547 #[doc = "customer modified"]
1548 #[inline(always)]
1549 pub fn set_cmod(&mut self, val: u8) {
1550 self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize);
1551 }
1552 #[doc = "metal fix version"]
1553 #[inline(always)]
1554 pub const fn revand(&self) -> u8 {
1555 let val = (self.0 >> 4usize) & 0x0f;
1556 val as u8
1557 }
1558 #[doc = "metal fix version"]
1559 #[inline(always)]
1560 pub fn set_revand(&mut self, val: u8) {
1561 self.0 = (self.0 & !(0x0f << 4usize)) | (((val as u32) & 0x0f) << 4usize);
1562 }
1563 }
1564 impl Default for Pidr3 {
1565 #[inline(always)]
1566 fn default() -> Pidr3 {
1567 Pidr3(0)
1568 }
1569 }
1570 impl core::fmt::Debug for Pidr3 {
1571 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1572 f.debug_struct("Pidr3")
1573 .field("cmod", &self.cmod())
1574 .field("revand", &self.revand())
1575 .finish()
1576 }
1577 }
1578 #[cfg(feature = "defmt")]
1579 impl defmt::Format for Pidr3 {
1580 fn format(&self, f: defmt::Formatter) {
1581 #[derive(defmt :: Format)]
1582 struct Pidr3 {
1583 cmod: u8,
1584 revand: u8,
1585 }
1586 let proxy = Pidr3 {
1587 cmod: self.cmod(),
1588 revand: self.revand(),
1589 };
1590 defmt::write!(f, "{}", proxy)
1591 }
1592 }
1593 #[doc = "Debug MCU CoreSight peripheral identity register 4"]
1594 #[repr(transparent)]
1595 #[derive(Copy, Clone, Eq, PartialEq)]
1596 pub struct Pidr4(pub u32);
1597 impl Pidr4 {
1598 #[doc = "JEP106 continuation code"]
1599 #[inline(always)]
1600 pub const fn jep106con(&self) -> u8 {
1601 let val = (self.0 >> 0usize) & 0x0f;
1602 val as u8
1603 }
1604 #[doc = "JEP106 continuation code"]
1605 #[inline(always)]
1606 pub fn set_jep106con(&mut self, val: u8) {
1607 self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize);
1608 }
1609 #[doc = "register file size"]
1610 #[inline(always)]
1611 pub const fn kcount_4(&self) -> u8 {
1612 let val = (self.0 >> 4usize) & 0x0f;
1613 val as u8
1614 }
1615 #[doc = "register file size"]
1616 #[inline(always)]
1617 pub fn set_kcount_4(&mut self, val: u8) {
1618 self.0 = (self.0 & !(0x0f << 4usize)) | (((val as u32) & 0x0f) << 4usize);
1619 }
1620 }
1621 impl Default for Pidr4 {
1622 #[inline(always)]
1623 fn default() -> Pidr4 {
1624 Pidr4(0)
1625 }
1626 }
1627 impl core::fmt::Debug for Pidr4 {
1628 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1629 f.debug_struct("Pidr4")
1630 .field("jep106con", &self.jep106con())
1631 .field("kcount_4", &self.kcount_4())
1632 .finish()
1633 }
1634 }
1635 #[cfg(feature = "defmt")]
1636 impl defmt::Format for Pidr4 {
1637 fn format(&self, f: defmt::Formatter) {
1638 #[derive(defmt :: Format)]
1639 struct Pidr4 {
1640 jep106con: u8,
1641 kcount_4: u8,
1642 }
1643 let proxy = Pidr4 {
1644 jep106con: self.jep106con(),
1645 kcount_4: self.kcount_4(),
1646 };
1647 defmt::write!(f, "{}", proxy)
1648 }
1649 }
1650}
1651