1#![allow(clippy::missing_safety_doc)]
2#![allow(clippy::identity_op)]
3#![allow(clippy::unnecessary_cast)]
4#![allow(clippy::erasing_op)]
5
6#[doc = "Independent watchdog"]
7#[derive(Copy, Clone, Eq, PartialEq)]
8pub struct Iwdg {
9 ptr: *mut u8,
10}
11unsafe impl Send for Iwdg {}
12unsafe impl Sync for Iwdg {}
13impl Iwdg {
14 #[inline(always)]
15 pub const unsafe fn from_ptr(ptr: *mut ()) -> Self {
16 Self { ptr: ptr as _ }
17 }
18 #[inline(always)]
19 pub const fn as_ptr(&self) -> *mut () {
20 self.ptr as _
21 }
22 #[doc = "Key register"]
23 #[inline(always)]
24 pub const fn kr(self) -> crate::common::Reg<regs::Kr, crate::common::RW> {
25 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0usize) as _) }
26 }
27 #[doc = "Prescaler register"]
28 #[inline(always)]
29 pub const fn pr(self) -> crate::common::Reg<regs::Pr, crate::common::RW> {
30 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x04usize) as _) }
31 }
32 #[doc = "Reload register"]
33 #[inline(always)]
34 pub const fn rlr(self) -> crate::common::Reg<regs::Rlr, crate::common::RW> {
35 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x08usize) as _) }
36 }
37 #[doc = "Status register"]
38 #[inline(always)]
39 pub const fn sr(self) -> crate::common::Reg<regs::Sr, crate::common::RW> {
40 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0cusize) as _) }
41 }
42 #[doc = "Window register"]
43 #[inline(always)]
44 pub const fn winr(self) -> crate::common::Reg<regs::Winr, crate::common::RW> {
45 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x10usize) as _) }
46 }
47 #[doc = "IWDG early wakeup interrupt register."]
48 #[inline(always)]
49 pub const fn ewcr(self) -> crate::common::Reg<regs::Ewcr, crate::common::RW> {
50 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x14usize) as _) }
51 }
52}
53pub mod regs {
54 #[doc = "IWDG early wakeup interrupt register."]
55 #[repr(transparent)]
56 #[derive(Copy, Clone, Eq, PartialEq)]
57 pub struct Ewcr(pub u32);
58 impl Ewcr {
59 #[doc = "Watchdog counter window value These bits are write access protected (see ). They are written by software to define at which position of the IWDCNT down-counter the early wakeup interrupt must be generated. The early interrupt is generated when the IWDCNT is lower or equal to EWIT\\[11:0\\]
60- 1. EWIT\\[11:0\\]
61must be bigger than 1. An interrupt is generated only if EWIE = 1. The EWU bit in the must be reset to be able to change the reload value. Note: Reading this register returns the Early wakeup comparator value and the Interrupt enable bit from the VDD voltage domain. This value may not be up to date/valid if a write operation to this register is ongoing, hence the value read from this register is valid only when the EWU bit in the is reset."]
62 #[inline(always)]
63 pub const fn ewit(&self) -> u16 {
64 let val = (self.0 >> 0usize) & 0x0fff;
65 val as u16
66 }
67 #[doc = "Watchdog counter window value These bits are write access protected (see ). They are written by software to define at which position of the IWDCNT down-counter the early wakeup interrupt must be generated. The early interrupt is generated when the IWDCNT is lower or equal to EWIT\\[11:0\\]
68- 1. EWIT\\[11:0\\]
69must be bigger than 1. An interrupt is generated only if EWIE = 1. The EWU bit in the must be reset to be able to change the reload value. Note: Reading this register returns the Early wakeup comparator value and the Interrupt enable bit from the VDD voltage domain. This value may not be up to date/valid if a write operation to this register is ongoing, hence the value read from this register is valid only when the EWU bit in the is reset."]
70 #[inline(always)]
71 pub fn set_ewit(&mut self, val: u16) {
72 self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize);
73 }
74 #[doc = "Watchdog early interrupt acknowledge The software must write a 1 into this bit in order to acknowledge the early wakeup interrupt and to clear the EWIF flag. Writing 0 has not effect, reading this flag returns a 0."]
75 #[inline(always)]
76 pub const fn ewic(&self) -> bool {
77 let val = (self.0 >> 14usize) & 0x01;
78 val != 0
79 }
80 #[doc = "Watchdog early interrupt acknowledge The software must write a 1 into this bit in order to acknowledge the early wakeup interrupt and to clear the EWIF flag. Writing 0 has not effect, reading this flag returns a 0."]
81 #[inline(always)]
82 pub fn set_ewic(&mut self, val: bool) {
83 self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize);
84 }
85 #[doc = "Watchdog early interrupt enable Set and reset by software. The EWU bit in the must be reset to be able to change the value of this bit."]
86 #[inline(always)]
87 pub const fn ewie(&self) -> bool {
88 let val = (self.0 >> 15usize) & 0x01;
89 val != 0
90 }
91 #[doc = "Watchdog early interrupt enable Set and reset by software. The EWU bit in the must be reset to be able to change the value of this bit."]
92 #[inline(always)]
93 pub fn set_ewie(&mut self, val: bool) {
94 self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize);
95 }
96 }
97 impl Default for Ewcr {
98 #[inline(always)]
99 fn default() -> Ewcr {
100 Ewcr(0)
101 }
102 }
103 impl core::fmt::Debug for Ewcr {
104 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
105 f.debug_struct("Ewcr")
106 .field("ewit", &self.ewit())
107 .field("ewic", &self.ewic())
108 .field("ewie", &self.ewie())
109 .finish()
110 }
111 }
112 #[cfg(feature = "defmt")]
113 impl defmt::Format for Ewcr {
114 fn format(&self, f: defmt::Formatter) {
115 #[derive(defmt :: Format)]
116 struct Ewcr {
117 ewit: u16,
118 ewic: bool,
119 ewie: bool,
120 }
121 let proxy = Ewcr {
122 ewit: self.ewit(),
123 ewic: self.ewic(),
124 ewie: self.ewie(),
125 };
126 defmt::write!(f, "{}", proxy)
127 }
128 }
129 #[doc = "Key register"]
130 #[repr(transparent)]
131 #[derive(Copy, Clone, Eq, PartialEq)]
132 pub struct Kr(pub u32);
133 impl Kr {
134 #[doc = "Key value (write only, read 0000h)"]
135 #[inline(always)]
136 pub const fn key(&self) -> super::vals::Key {
137 let val = (self.0 >> 0usize) & 0xffff;
138 super::vals::Key::from_bits(val as u16)
139 }
140 #[doc = "Key value (write only, read 0000h)"]
141 #[inline(always)]
142 pub fn set_key(&mut self, val: super::vals::Key) {
143 self.0 = (self.0 & !(0xffff << 0usize)) | (((val.to_bits() as u32) & 0xffff) << 0usize);
144 }
145 }
146 impl Default for Kr {
147 #[inline(always)]
148 fn default() -> Kr {
149 Kr(0)
150 }
151 }
152 impl core::fmt::Debug for Kr {
153 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
154 f.debug_struct("Kr").field("key", &self.key()).finish()
155 }
156 }
157 #[cfg(feature = "defmt")]
158 impl defmt::Format for Kr {
159 fn format(&self, f: defmt::Formatter) {
160 #[derive(defmt :: Format)]
161 struct Kr {
162 key: super::vals::Key,
163 }
164 let proxy = Kr { key: self.key() };
165 defmt::write!(f, "{}", proxy)
166 }
167 }
168 #[doc = "Prescaler register"]
169 #[repr(transparent)]
170 #[derive(Copy, Clone, Eq, PartialEq)]
171 pub struct Pr(pub u32);
172 impl Pr {
173 #[doc = "Prescaler divider"]
174 #[inline(always)]
175 pub const fn pr(&self) -> super::vals::Pr {
176 let val = (self.0 >> 0usize) & 0x0f;
177 super::vals::Pr::from_bits(val as u8)
178 }
179 #[doc = "Prescaler divider"]
180 #[inline(always)]
181 pub fn set_pr(&mut self, val: super::vals::Pr) {
182 self.0 = (self.0 & !(0x0f << 0usize)) | (((val.to_bits() as u32) & 0x0f) << 0usize);
183 }
184 }
185 impl Default for Pr {
186 #[inline(always)]
187 fn default() -> Pr {
188 Pr(0)
189 }
190 }
191 impl core::fmt::Debug for Pr {
192 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
193 f.debug_struct("Pr").field("pr", &self.pr()).finish()
194 }
195 }
196 #[cfg(feature = "defmt")]
197 impl defmt::Format for Pr {
198 fn format(&self, f: defmt::Formatter) {
199 #[derive(defmt :: Format)]
200 struct Pr {
201 pr: super::vals::Pr,
202 }
203 let proxy = Pr { pr: self.pr() };
204 defmt::write!(f, "{}", proxy)
205 }
206 }
207 #[doc = "Reload register"]
208 #[repr(transparent)]
209 #[derive(Copy, Clone, Eq, PartialEq)]
210 pub struct Rlr(pub u32);
211 impl Rlr {
212 #[doc = "Watchdog counter reload value"]
213 #[inline(always)]
214 pub const fn rl(&self) -> u16 {
215 let val = (self.0 >> 0usize) & 0x0fff;
216 val as u16
217 }
218 #[doc = "Watchdog counter reload value"]
219 #[inline(always)]
220 pub fn set_rl(&mut self, val: u16) {
221 self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize);
222 }
223 }
224 impl Default for Rlr {
225 #[inline(always)]
226 fn default() -> Rlr {
227 Rlr(0)
228 }
229 }
230 impl core::fmt::Debug for Rlr {
231 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
232 f.debug_struct("Rlr").field("rl", &self.rl()).finish()
233 }
234 }
235 #[cfg(feature = "defmt")]
236 impl defmt::Format for Rlr {
237 fn format(&self, f: defmt::Formatter) {
238 #[derive(defmt :: Format)]
239 struct Rlr {
240 rl: u16,
241 }
242 let proxy = Rlr { rl: self.rl() };
243 defmt::write!(f, "{}", proxy)
244 }
245 }
246 #[doc = "Status register"]
247 #[repr(transparent)]
248 #[derive(Copy, Clone, Eq, PartialEq)]
249 pub struct Sr(pub u32);
250 impl Sr {
251 #[doc = "Watchdog prescaler value update"]
252 #[inline(always)]
253 pub const fn pvu(&self) -> bool {
254 let val = (self.0 >> 0usize) & 0x01;
255 val != 0
256 }
257 #[doc = "Watchdog prescaler value update"]
258 #[inline(always)]
259 pub fn set_pvu(&mut self, val: bool) {
260 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
261 }
262 #[doc = "Watchdog counter reload value update"]
263 #[inline(always)]
264 pub const fn rvu(&self) -> bool {
265 let val = (self.0 >> 1usize) & 0x01;
266 val != 0
267 }
268 #[doc = "Watchdog counter reload value update"]
269 #[inline(always)]
270 pub fn set_rvu(&mut self, val: bool) {
271 self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
272 }
273 #[doc = "Watchdog counter window value update"]
274 #[inline(always)]
275 pub const fn wvu(&self) -> bool {
276 let val = (self.0 >> 2usize) & 0x01;
277 val != 0
278 }
279 #[doc = "Watchdog counter window value update"]
280 #[inline(always)]
281 pub fn set_wvu(&mut self, val: bool) {
282 self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
283 }
284 #[doc = "Watchdog interrupt comparator value update This bit is set by hardware to indicate that an update of the interrupt comparator value (EWIT\\[11:0\\]) or an update of the EWIE is ongoing. It is reset by hardware when the update operation is completed in the VDD voltage domain (takes up to three periods of the IWDG kernel clock iwdg_ker_ck). The EWIT\\[11:0\\]
285and EWIE fields can be updated only when EWU bit is reset."]
286 #[inline(always)]
287 pub const fn ewu(&self) -> bool {
288 let val = (self.0 >> 3usize) & 0x01;
289 val != 0
290 }
291 #[doc = "Watchdog interrupt comparator value update This bit is set by hardware to indicate that an update of the interrupt comparator value (EWIT\\[11:0\\]) or an update of the EWIE is ongoing. It is reset by hardware when the update operation is completed in the VDD voltage domain (takes up to three periods of the IWDG kernel clock iwdg_ker_ck). The EWIT\\[11:0\\]
292and EWIE fields can be updated only when EWU bit is reset."]
293 #[inline(always)]
294 pub fn set_ewu(&mut self, val: bool) {
295 self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize);
296 }
297 #[doc = "Watchdog early interrupt flag This bit is set to ‘1’ by hardware in order to indicate that an early interrupt is pending. This bit must be cleared by the software by writing the bit EWIC of IWDG_EWCR register to ‘1’."]
298 #[inline(always)]
299 pub const fn ewif(&self) -> bool {
300 let val = (self.0 >> 14usize) & 0x01;
301 val != 0
302 }
303 #[doc = "Watchdog early interrupt flag This bit is set to ‘1’ by hardware in order to indicate that an early interrupt is pending. This bit must be cleared by the software by writing the bit EWIC of IWDG_EWCR register to ‘1’."]
304 #[inline(always)]
305 pub fn set_ewif(&mut self, val: bool) {
306 self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize);
307 }
308 }
309 impl Default for Sr {
310 #[inline(always)]
311 fn default() -> Sr {
312 Sr(0)
313 }
314 }
315 impl core::fmt::Debug for Sr {
316 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
317 f.debug_struct("Sr")
318 .field("pvu", &self.pvu())
319 .field("rvu", &self.rvu())
320 .field("wvu", &self.wvu())
321 .field("ewu", &self.ewu())
322 .field("ewif", &self.ewif())
323 .finish()
324 }
325 }
326 #[cfg(feature = "defmt")]
327 impl defmt::Format for Sr {
328 fn format(&self, f: defmt::Formatter) {
329 #[derive(defmt :: Format)]
330 struct Sr {
331 pvu: bool,
332 rvu: bool,
333 wvu: bool,
334 ewu: bool,
335 ewif: bool,
336 }
337 let proxy = Sr {
338 pvu: self.pvu(),
339 rvu: self.rvu(),
340 wvu: self.wvu(),
341 ewu: self.ewu(),
342 ewif: self.ewif(),
343 };
344 defmt::write!(f, "{}", proxy)
345 }
346 }
347 #[doc = "Window register"]
348 #[repr(transparent)]
349 #[derive(Copy, Clone, Eq, PartialEq)]
350 pub struct Winr(pub u32);
351 impl Winr {
352 #[doc = "Watchdog counter window value"]
353 #[inline(always)]
354 pub const fn win(&self) -> u16 {
355 let val = (self.0 >> 0usize) & 0x0fff;
356 val as u16
357 }
358 #[doc = "Watchdog counter window value"]
359 #[inline(always)]
360 pub fn set_win(&mut self, val: u16) {
361 self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize);
362 }
363 }
364 impl Default for Winr {
365 #[inline(always)]
366 fn default() -> Winr {
367 Winr(0)
368 }
369 }
370 impl core::fmt::Debug for Winr {
371 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
372 f.debug_struct("Winr").field("win", &self.win()).finish()
373 }
374 }
375 #[cfg(feature = "defmt")]
376 impl defmt::Format for Winr {
377 fn format(&self, f: defmt::Formatter) {
378 #[derive(defmt :: Format)]
379 struct Winr {
380 win: u16,
381 }
382 let proxy = Winr { win: self.win() };
383 defmt::write!(f, "{}", proxy)
384 }
385 }
386}
387pub mod vals {
388 #[repr(transparent)]
389 #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)]
390 pub struct Key(pub u16);
391 impl Key {
392 #[doc = "Enable access to PR, RLR and WINR registers (0x5555)"]
393 pub const ENABLE: Self = Self(0x5555);
394 #[doc = "Reset the watchdog value (0xAAAA)"]
395 pub const RESET: Self = Self(0xaaaa);
396 #[doc = "Start the watchdog (0xCCCC)"]
397 pub const START: Self = Self(0xcccc);
398 }
399 impl Key {
400 pub const fn from_bits(val: u16) -> Key {
401 Self(val & 0xffff)
402 }
403 pub const fn to_bits(self) -> u16 {
404 self.0
405 }
406 }
407 impl core::fmt::Debug for Key {
408 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
409 match self.0 {
410 0x5555 => f.write_str("ENABLE"),
411 0xaaaa => f.write_str("RESET"),
412 0xcccc => f.write_str("START"),
413 other => core::write!(f, "0x{:02X}", other),
414 }
415 }
416 }
417 #[cfg(feature = "defmt")]
418 impl defmt::Format for Key {
419 fn format(&self, f: defmt::Formatter) {
420 match self.0 {
421 0x5555 => defmt::write!(f, "ENABLE"),
422 0xaaaa => defmt::write!(f, "RESET"),
423 0xcccc => defmt::write!(f, "START"),
424 other => defmt::write!(f, "0x{:02X}", other),
425 }
426 }
427 }
428 impl From<u16> for Key {
429 #[inline(always)]
430 fn from(val: u16) -> Key {
431 Key::from_bits(val)
432 }
433 }
434 impl From<Key> for u16 {
435 #[inline(always)]
436 fn from(val: Key) -> u16 {
437 Key::to_bits(val)
438 }
439 }
440 #[repr(u8)]
441 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
442 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
443 pub enum Pr {
444 #[doc = "Divider /4"]
445 DIVIDE_BY4 = 0x0,
446 #[doc = "Divider /8"]
447 DIVIDE_BY8 = 0x01,
448 #[doc = "Divider /16"]
449 DIVIDE_BY16 = 0x02,
450 #[doc = "Divider /32"]
451 DIVIDE_BY32 = 0x03,
452 #[doc = "Divider /64"]
453 DIVIDE_BY64 = 0x04,
454 #[doc = "Divider /128"]
455 DIVIDE_BY128 = 0x05,
456 #[doc = "Divider /256"]
457 DIVIDE_BY256 = 0x06,
458 #[doc = "Divider /512"]
459 DIVIDE_BY512 = 0x07,
460 #[doc = "Divider /1024"]
461 DIVIDE_BY1024 = 0x08,
462 _RESERVED_9 = 0x09,
463 _RESERVED_a = 0x0a,
464 _RESERVED_b = 0x0b,
465 _RESERVED_c = 0x0c,
466 _RESERVED_d = 0x0d,
467 _RESERVED_e = 0x0e,
468 _RESERVED_f = 0x0f,
469 }
470 impl Pr {
471 #[inline(always)]
472 pub const fn from_bits(val: u8) -> Pr {
473 unsafe { core::mem::transmute(val & 0x0f) }
474 }
475 #[inline(always)]
476 pub const fn to_bits(self) -> u8 {
477 unsafe { core::mem::transmute(self) }
478 }
479 }
480 impl From<u8> for Pr {
481 #[inline(always)]
482 fn from(val: u8) -> Pr {
483 Pr::from_bits(val)
484 }
485 }
486 impl From<Pr> for u8 {
487 #[inline(always)]
488 fn from(val: Pr) -> u8 {
489 Pr::to_bits(val)
490 }
491 }
492}
493