1#![allow(clippy::missing_safety_doc)]
2#![allow(clippy::identity_op)]
3#![allow(clippy::unnecessary_cast)]
4#![allow(clippy::erasing_op)]
5
6#[doc = "On-The-Fly Decryption engine."]
7#[derive(Copy, Clone, Eq, PartialEq)]
8pub struct Otfdec {
9 ptr: *mut u8,
10}
11unsafe impl Send for Otfdec {}
12unsafe impl Sync for Otfdec {}
13impl Otfdec {
14 #[inline(always)]
15 pub const unsafe fn from_ptr(ptr: *mut ()) -> Self {
16 Self { ptr: ptr as _ }
17 }
18 #[inline(always)]
19 pub const fn as_ptr(&self) -> *mut () {
20 self.ptr as _
21 }
22 #[doc = "OTFDEC control register."]
23 #[inline(always)]
24 pub const fn cr(self) -> crate::common::Reg<regs::Cr, crate::common::RW> {
25 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0usize) as _) }
26 }
27 #[doc = "OTFDEC_PRIVCFGR."]
28 #[inline(always)]
29 pub const fn privcfgr(self) -> crate::common::Reg<regs::Privcfgr, crate::common::RW> {
30 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x10usize) as _) }
31 }
32 #[inline(always)]
33 pub const fn region(self, n: usize) -> Region {
34 assert!(n < 4usize);
35 unsafe { Region::from_ptr(self.ptr.add(0x20usize + n * 48usize) as _) }
36 }
37 #[doc = "OTFDEC interrupt status register."]
38 #[inline(always)]
39 pub const fn isr(self) -> crate::common::Reg<regs::Isr, crate::common::RW> {
40 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0300usize) as _) }
41 }
42 #[doc = "OTFDEC interrupt clear register."]
43 #[inline(always)]
44 pub const fn icr(self) -> crate::common::Reg<regs::Icr, crate::common::RW> {
45 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0304usize) as _) }
46 }
47 #[doc = "OTFDEC interrupt enable register."]
48 #[inline(always)]
49 pub const fn ier(self) -> crate::common::Reg<regs::Ier, crate::common::RW> {
50 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0308usize) as _) }
51 }
52}
53#[derive(Copy, Clone, Eq, PartialEq)]
54pub struct Region {
55 ptr: *mut u8,
56}
57unsafe impl Send for Region {}
58unsafe impl Sync for Region {}
59impl Region {
60 #[inline(always)]
61 pub const unsafe fn from_ptr(ptr: *mut ()) -> Self {
62 Self { ptr: ptr as _ }
63 }
64 #[inline(always)]
65 pub const fn as_ptr(&self) -> *mut () {
66 self.ptr as _
67 }
68 #[doc = "OTFDEC region 3 configuration register."]
69 #[inline(always)]
70 pub const fn cfgr(self) -> crate::common::Reg<regs::RegionCfgr, crate::common::RW> {
71 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0usize) as _) }
72 }
73 #[doc = "OTFDEC region 3 start address register."]
74 #[inline(always)]
75 pub const fn startaddr(self) -> crate::common::Reg<u32, crate::common::RW> {
76 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x04usize) as _) }
77 }
78 #[doc = "OTFDEC region 3 end address register."]
79 #[inline(always)]
80 pub const fn endaddr(self) -> crate::common::Reg<u32, crate::common::RW> {
81 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x08usize) as _) }
82 }
83 #[doc = "OTFDEC region 3 nonce register 0."]
84 #[inline(always)]
85 pub const fn noncer(self, n: usize) -> crate::common::Reg<u32, crate::common::RW> {
86 assert!(n < 2usize);
87 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0cusize + n * 4usize) as _) }
88 }
89 #[doc = "OTFDEC region 3 key register 0."]
90 #[inline(always)]
91 pub const fn keyr(self, n: usize) -> crate::common::Reg<u32, crate::common::RW> {
92 assert!(n < 4usize);
93 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x14usize + n * 4usize) as _) }
94 }
95}
96pub mod regs {
97 #[doc = "OTFDEC control register."]
98 #[repr(transparent)]
99 #[derive(Copy, Clone, Eq, PartialEq)]
100 pub struct Cr(pub u32);
101 impl Cr {
102 #[doc = "Encryption mode bit When this bit is set, OTFDEC is used in encryption mode, during which application can write clear text data then read back encrypted data. When this bit is cleared (default), OTFDEC is used in decryption mode, during which application only read back decrypted data. For both modes, cryptographic context (keys, nonces, firmware versions) must be properly initialized. When this bit is set, only data accesses are allowed (zeros are returned otherwise, and XONEIF is set). When MODE = 11, enhanced encryption mode is automatically selected. Note: When ENC bit is set, no access to OCTOSPI must be done (registers and Memory‑mapped region)."]
103 #[inline(always)]
104 pub const fn enc(&self) -> super::vals::Enc {
105 let val = (self.0 >> 0usize) & 0x01;
106 super::vals::Enc::from_bits(val as u8)
107 }
108 #[doc = "Encryption mode bit When this bit is set, OTFDEC is used in encryption mode, during which application can write clear text data then read back encrypted data. When this bit is cleared (default), OTFDEC is used in decryption mode, during which application only read back decrypted data. For both modes, cryptographic context (keys, nonces, firmware versions) must be properly initialized. When this bit is set, only data accesses are allowed (zeros are returned otherwise, and XONEIF is set). When MODE = 11, enhanced encryption mode is automatically selected. Note: When ENC bit is set, no access to OCTOSPI must be done (registers and Memory‑mapped region)."]
109 #[inline(always)]
110 pub fn set_enc(&mut self, val: super::vals::Enc) {
111 self.0 = (self.0 & !(0x01 << 0usize)) | (((val.to_bits() as u32) & 0x01) << 0usize);
112 }
113 }
114 impl Default for Cr {
115 #[inline(always)]
116 fn default() -> Cr {
117 Cr(0)
118 }
119 }
120 impl core::fmt::Debug for Cr {
121 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
122 f.debug_struct("Cr").field("enc", &self.enc()).finish()
123 }
124 }
125 #[cfg(feature = "defmt")]
126 impl defmt::Format for Cr {
127 fn format(&self, f: defmt::Formatter) {
128 #[derive(defmt :: Format)]
129 struct Cr {
130 enc: super::vals::Enc,
131 }
132 let proxy = Cr { enc: self.enc() };
133 defmt::write!(f, "{}", proxy)
134 }
135 }
136 #[doc = "OTFDEC interrupt clear register."]
137 #[repr(transparent)]
138 #[derive(Copy, Clone, Eq, PartialEq)]
139 pub struct Icr(pub u32);
140 impl Icr {
141 #[doc = "Security error interrupt flag clear This bit is written by application, and always read as 0."]
142 #[inline(always)]
143 pub const fn seif(&self) -> bool {
144 let val = (self.0 >> 0usize) & 0x01;
145 val != 0
146 }
147 #[doc = "Security error interrupt flag clear This bit is written by application, and always read as 0."]
148 #[inline(always)]
149 pub fn set_seif(&mut self, val: bool) {
150 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
151 }
152 #[doc = "Execute-only execute-never error interrupt flag clear This bit is written by application, and always read as 0."]
153 #[inline(always)]
154 pub const fn xoneif(&self) -> bool {
155 let val = (self.0 >> 1usize) & 0x01;
156 val != 0
157 }
158 #[doc = "Execute-only execute-never error interrupt flag clear This bit is written by application, and always read as 0."]
159 #[inline(always)]
160 pub fn set_xoneif(&mut self, val: bool) {
161 self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
162 }
163 #[doc = "Key error interrupt flag clear This bit is written by application, and always read as 0. Note: Clearing KEIF does not solve the source of the problem (bad key registers). To be able to access again any encrypted region, OTFDEC key registers must be properly initialized again."]
164 #[inline(always)]
165 pub const fn keif(&self) -> bool {
166 let val = (self.0 >> 2usize) & 0x01;
167 val != 0
168 }
169 #[doc = "Key error interrupt flag clear This bit is written by application, and always read as 0. Note: Clearing KEIF does not solve the source of the problem (bad key registers). To be able to access again any encrypted region, OTFDEC key registers must be properly initialized again."]
170 #[inline(always)]
171 pub fn set_keif(&mut self, val: bool) {
172 self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
173 }
174 }
175 impl Default for Icr {
176 #[inline(always)]
177 fn default() -> Icr {
178 Icr(0)
179 }
180 }
181 impl core::fmt::Debug for Icr {
182 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
183 f.debug_struct("Icr")
184 .field("seif", &self.seif())
185 .field("xoneif", &self.xoneif())
186 .field("keif", &self.keif())
187 .finish()
188 }
189 }
190 #[cfg(feature = "defmt")]
191 impl defmt::Format for Icr {
192 fn format(&self, f: defmt::Formatter) {
193 #[derive(defmt :: Format)]
194 struct Icr {
195 seif: bool,
196 xoneif: bool,
197 keif: bool,
198 }
199 let proxy = Icr {
200 seif: self.seif(),
201 xoneif: self.xoneif(),
202 keif: self.keif(),
203 };
204 defmt::write!(f, "{}", proxy)
205 }
206 }
207 #[doc = "OTFDEC interrupt enable register."]
208 #[repr(transparent)]
209 #[derive(Copy, Clone, Eq, PartialEq)]
210 pub struct Ier(pub u32);
211 impl Ier {
212 #[doc = "Security error interrupt enable This bit is read and written by application. It controls the OTFDEC interrupt generation when SEIF flag status is set."]
213 #[inline(always)]
214 pub const fn seie(&self) -> bool {
215 let val = (self.0 >> 0usize) & 0x01;
216 val != 0
217 }
218 #[doc = "Security error interrupt enable This bit is read and written by application. It controls the OTFDEC interrupt generation when SEIF flag status is set."]
219 #[inline(always)]
220 pub fn set_seie(&mut self, val: bool) {
221 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
222 }
223 #[doc = "Execute-only execute-never error interrupt enable This bit is read and written by application. It controls the OTFDEC interrupt generation when XONEIF flag status is set."]
224 #[inline(always)]
225 pub const fn xoneie(&self) -> bool {
226 let val = (self.0 >> 1usize) & 0x01;
227 val != 0
228 }
229 #[doc = "Execute-only execute-never error interrupt enable This bit is read and written by application. It controls the OTFDEC interrupt generation when XONEIF flag status is set."]
230 #[inline(always)]
231 pub fn set_xoneie(&mut self, val: bool) {
232 self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
233 }
234 #[doc = "Key error interrupt enable This bit is read and written by application. It controls the OTFDEC interrupt generation when KEIF flag status is set."]
235 #[inline(always)]
236 pub const fn keie(&self) -> bool {
237 let val = (self.0 >> 2usize) & 0x01;
238 val != 0
239 }
240 #[doc = "Key error interrupt enable This bit is read and written by application. It controls the OTFDEC interrupt generation when KEIF flag status is set."]
241 #[inline(always)]
242 pub fn set_keie(&mut self, val: bool) {
243 self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
244 }
245 }
246 impl Default for Ier {
247 #[inline(always)]
248 fn default() -> Ier {
249 Ier(0)
250 }
251 }
252 impl core::fmt::Debug for Ier {
253 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
254 f.debug_struct("Ier")
255 .field("seie", &self.seie())
256 .field("xoneie", &self.xoneie())
257 .field("keie", &self.keie())
258 .finish()
259 }
260 }
261 #[cfg(feature = "defmt")]
262 impl defmt::Format for Ier {
263 fn format(&self, f: defmt::Formatter) {
264 #[derive(defmt :: Format)]
265 struct Ier {
266 seie: bool,
267 xoneie: bool,
268 keie: bool,
269 }
270 let proxy = Ier {
271 seie: self.seie(),
272 xoneie: self.xoneie(),
273 keie: self.keie(),
274 };
275 defmt::write!(f, "{}", proxy)
276 }
277 }
278 #[doc = "OTFDEC interrupt status register."]
279 #[repr(transparent)]
280 #[derive(Copy, Clone, Eq, PartialEq)]
281 pub struct Isr(pub u32);
282 impl Isr {
283 #[doc = "Security error interrupt flag status This bit is set by hardware and read only by application. This bit is set when at least one security error has been detected. This bit is cleared when application sets in OTFDEC_ICR the corresponding bit to 1."]
284 #[inline(always)]
285 pub const fn seif(&self) -> bool {
286 let val = (self.0 >> 0usize) & 0x01;
287 val != 0
288 }
289 #[doc = "Security error interrupt flag status This bit is set by hardware and read only by application. This bit is set when at least one security error has been detected. This bit is cleared when application sets in OTFDEC_ICR the corresponding bit to 1."]
290 #[inline(always)]
291 pub fn set_seif(&mut self, val: bool) {
292 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
293 }
294 #[doc = "Execute-only execute-never error interrupt flag status This bit is set by hardware and read only by application. This bit is set when a read access and not an instruction fetch is detected on any encrypted region with MODE bits set to 11. Lastly, XONEIF is also set when an execute access is detected while encryption mode is enabled. This bit is cleared when application sets in OTFDEC_ICR the corresponding bit to 1."]
295 #[inline(always)]
296 pub const fn xoneif(&self) -> bool {
297 let val = (self.0 >> 1usize) & 0x01;
298 val != 0
299 }
300 #[doc = "Execute-only execute-never error interrupt flag status This bit is set by hardware and read only by application. This bit is set when a read access and not an instruction fetch is detected on any encrypted region with MODE bits set to 11. Lastly, XONEIF is also set when an execute access is detected while encryption mode is enabled. This bit is cleared when application sets in OTFDEC_ICR the corresponding bit to 1."]
301 #[inline(always)]
302 pub fn set_xoneif(&mut self, val: bool) {
303 self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
304 }
305 #[doc = "Key error interrupt flag status This bit is set by hardware and read only by application. The bit is set when a read access occurs on an encrypted region, while its key registers is null or not properly initialized (KEYCRC = 0x0). This bit is cleared when the application sets in OTFDEC_ICR the corresponding bit to 1. After KEIF is set any subsequent read to the region with bad key registers returns a zeroed value. This state remains until those key registers are properly initialized (KEYCRC not zero)."]
306 #[inline(always)]
307 pub const fn keif(&self) -> bool {
308 let val = (self.0 >> 2usize) & 0x01;
309 val != 0
310 }
311 #[doc = "Key error interrupt flag status This bit is set by hardware and read only by application. The bit is set when a read access occurs on an encrypted region, while its key registers is null or not properly initialized (KEYCRC = 0x0). This bit is cleared when the application sets in OTFDEC_ICR the corresponding bit to 1. After KEIF is set any subsequent read to the region with bad key registers returns a zeroed value. This state remains until those key registers are properly initialized (KEYCRC not zero)."]
312 #[inline(always)]
313 pub fn set_keif(&mut self, val: bool) {
314 self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
315 }
316 }
317 impl Default for Isr {
318 #[inline(always)]
319 fn default() -> Isr {
320 Isr(0)
321 }
322 }
323 impl core::fmt::Debug for Isr {
324 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
325 f.debug_struct("Isr")
326 .field("seif", &self.seif())
327 .field("xoneif", &self.xoneif())
328 .field("keif", &self.keif())
329 .finish()
330 }
331 }
332 #[cfg(feature = "defmt")]
333 impl defmt::Format for Isr {
334 fn format(&self, f: defmt::Formatter) {
335 #[derive(defmt :: Format)]
336 struct Isr {
337 seif: bool,
338 xoneif: bool,
339 keif: bool,
340 }
341 let proxy = Isr {
342 seif: self.seif(),
343 xoneif: self.xoneif(),
344 keif: self.keif(),
345 };
346 defmt::write!(f, "{}", proxy)
347 }
348 }
349 #[doc = "OTFDEC_PRIVCFGR."]
350 #[repr(transparent)]
351 #[derive(Copy, Clone, Eq, PartialEq)]
352 pub struct Privcfgr(pub u32);
353 impl Privcfgr {
354 #[doc = "Privileged access protection. Unprivileged read accesses to registers return zeros Unprivileged write accesses to registers are ignored. Note: This bit can only be written in privileged mode. There is no limitations on reads."]
355 #[inline(always)]
356 pub const fn priv_(&self) -> bool {
357 let val = (self.0 >> 0usize) & 0x01;
358 val != 0
359 }
360 #[doc = "Privileged access protection. Unprivileged read accesses to registers return zeros Unprivileged write accesses to registers are ignored. Note: This bit can only be written in privileged mode. There is no limitations on reads."]
361 #[inline(always)]
362 pub fn set_priv_(&mut self, val: bool) {
363 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
364 }
365 }
366 impl Default for Privcfgr {
367 #[inline(always)]
368 fn default() -> Privcfgr {
369 Privcfgr(0)
370 }
371 }
372 impl core::fmt::Debug for Privcfgr {
373 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
374 f.debug_struct("Privcfgr").field("priv_", &self.priv_()).finish()
375 }
376 }
377 #[cfg(feature = "defmt")]
378 impl defmt::Format for Privcfgr {
379 fn format(&self, f: defmt::Formatter) {
380 #[derive(defmt :: Format)]
381 struct Privcfgr {
382 priv_: bool,
383 }
384 let proxy = Privcfgr { priv_: self.priv_() };
385 defmt::write!(f, "{}", proxy)
386 }
387 }
388 #[doc = "OTFDEC region 3 configuration register."]
389 #[repr(transparent)]
390 #[derive(Copy, Clone, Eq, PartialEq)]
391 pub struct RegionCfgr(pub u32);
392 impl RegionCfgr {
393 #[doc = "region on-the-fly decryption enable Note: Garbage is decrypted if region context (version, key, nonce) is not valid when this bit is set."]
394 #[inline(always)]
395 pub const fn reg_en(&self) -> bool {
396 let val = (self.0 >> 0usize) & 0x01;
397 val != 0
398 }
399 #[doc = "region on-the-fly decryption enable Note: Garbage is decrypted if region context (version, key, nonce) is not valid when this bit is set."]
400 #[inline(always)]
401 pub fn set_reg_en(&mut self, val: bool) {
402 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
403 }
404 #[doc = "region config lock Note: This bit is set once. If this bit is set, it can only be reset to 0 if OTFDEC is reset. Setting this bit forces KEYLOCK bit to 1."]
405 #[inline(always)]
406 pub const fn configlock(&self) -> bool {
407 let val = (self.0 >> 1usize) & 0x01;
408 val != 0
409 }
410 #[doc = "region config lock Note: This bit is set once. If this bit is set, it can only be reset to 0 if OTFDEC is reset. Setting this bit forces KEYLOCK bit to 1."]
411 #[inline(always)]
412 pub fn set_configlock(&mut self, val: bool) {
413 self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
414 }
415 #[doc = "region key lock Note: This bit is set once: if this bit is set, it can only be reset to 0 if the OTFDEC is reset."]
416 #[inline(always)]
417 pub const fn keylock(&self) -> bool {
418 let val = (self.0 >> 2usize) & 0x01;
419 val != 0
420 }
421 #[doc = "region key lock Note: This bit is set once: if this bit is set, it can only be reset to 0 if the OTFDEC is reset."]
422 #[inline(always)]
423 pub fn set_keylock(&mut self, val: bool) {
424 self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
425 }
426 #[doc = "operating mode This bitfield selects the OTFDEC operating mode for this region: Others: Reserved When MODE ≠ 11, the standard AES encryption mode is activated. When either of the MODE bits are changed, the region key and associated CRC are zeroed."]
427 #[inline(always)]
428 pub const fn mode(&self) -> super::vals::Mode {
429 let val = (self.0 >> 4usize) & 0x03;
430 super::vals::Mode::from_bits(val as u8)
431 }
432 #[doc = "operating mode This bitfield selects the OTFDEC operating mode for this region: Others: Reserved When MODE ≠ 11, the standard AES encryption mode is activated. When either of the MODE bits are changed, the region key and associated CRC are zeroed."]
433 #[inline(always)]
434 pub fn set_mode(&mut self, val: super::vals::Mode) {
435 self.0 = (self.0 & !(0x03 << 4usize)) | (((val.to_bits() as u32) & 0x03) << 4usize);
436 }
437 #[doc = "region key 8-bit CRC When KEYLOCK = 0, KEYCRC bitfield is automatically computed by hardware while loading the key of this region in this exact sequence: KEYR0 then KEYR1 then KEYR2 then finally KEYR3 (all written once). A new computation starts as soon as a new valid sequence is initiated, and KEYCRC is read as zero until a valid sequence is completed. When KEYLOCK = 1, KEYCRC remains unchanged until the next reset. CRC computation is an 8-bit checksum using the standard CRC-8-CCITT algorithm X8 + X2 + X + 1 (according the convention). Source code is available in . This field is read only. Note: CRC information is updated only after the last bit of the key has been written."]
438 #[inline(always)]
439 pub const fn keycrc(&self) -> u8 {
440 let val = (self.0 >> 8usize) & 0xff;
441 val as u8
442 }
443 #[doc = "region key 8-bit CRC When KEYLOCK = 0, KEYCRC bitfield is automatically computed by hardware while loading the key of this region in this exact sequence: KEYR0 then KEYR1 then KEYR2 then finally KEYR3 (all written once). A new computation starts as soon as a new valid sequence is initiated, and KEYCRC is read as zero until a valid sequence is completed. When KEYLOCK = 1, KEYCRC remains unchanged until the next reset. CRC computation is an 8-bit checksum using the standard CRC-8-CCITT algorithm X8 + X2 + X + 1 (according the convention). Source code is available in . This field is read only. Note: CRC information is updated only after the last bit of the key has been written."]
444 #[inline(always)]
445 pub fn set_keycrc(&mut self, val: u8) {
446 self.0 = (self.0 & !(0xff << 8usize)) | (((val as u32) & 0xff) << 8usize);
447 }
448 #[doc = "region firmware version This 16-bit bitfield must be correctly initialized before the region corresponding REG_EN bit is set in OTFDEC_RxCFGR."]
449 #[inline(always)]
450 pub const fn reg_version(&self) -> u16 {
451 let val = (self.0 >> 16usize) & 0xffff;
452 val as u16
453 }
454 #[doc = "region firmware version This 16-bit bitfield must be correctly initialized before the region corresponding REG_EN bit is set in OTFDEC_RxCFGR."]
455 #[inline(always)]
456 pub fn set_reg_version(&mut self, val: u16) {
457 self.0 = (self.0 & !(0xffff << 16usize)) | (((val as u32) & 0xffff) << 16usize);
458 }
459 }
460 impl Default for RegionCfgr {
461 #[inline(always)]
462 fn default() -> RegionCfgr {
463 RegionCfgr(0)
464 }
465 }
466 impl core::fmt::Debug for RegionCfgr {
467 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
468 f.debug_struct("RegionCfgr")
469 .field("reg_en", &self.reg_en())
470 .field("configlock", &self.configlock())
471 .field("keylock", &self.keylock())
472 .field("mode", &self.mode())
473 .field("keycrc", &self.keycrc())
474 .field("reg_version", &self.reg_version())
475 .finish()
476 }
477 }
478 #[cfg(feature = "defmt")]
479 impl defmt::Format for RegionCfgr {
480 fn format(&self, f: defmt::Formatter) {
481 #[derive(defmt :: Format)]
482 struct RegionCfgr {
483 reg_en: bool,
484 configlock: bool,
485 keylock: bool,
486 mode: super::vals::Mode,
487 keycrc: u8,
488 reg_version: u16,
489 }
490 let proxy = RegionCfgr {
491 reg_en: self.reg_en(),
492 configlock: self.configlock(),
493 keylock: self.keylock(),
494 mode: self.mode(),
495 keycrc: self.keycrc(),
496 reg_version: self.reg_version(),
497 };
498 defmt::write!(f, "{}", proxy)
499 }
500 }
501}
502pub mod vals {
503 #[repr(u8)]
504 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
505 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
506 pub enum Enc {
507 #[doc = "OTFDEC working in decryption mode"]
508 DECRYPTION = 0x0,
509 #[doc = "OTFDEC working in encryption mode"]
510 ENCRYPTION = 0x01,
511 }
512 impl Enc {
513 #[inline(always)]
514 pub const fn from_bits(val: u8) -> Enc {
515 unsafe { core::mem::transmute(val & 0x01) }
516 }
517 #[inline(always)]
518 pub const fn to_bits(self) -> u8 {
519 unsafe { core::mem::transmute(self) }
520 }
521 }
522 impl From<u8> for Enc {
523 #[inline(always)]
524 fn from(val: u8) -> Enc {
525 Enc::from_bits(val)
526 }
527 }
528 impl From<Enc> for u8 {
529 #[inline(always)]
530 fn from(val: Enc) -> u8 {
531 Enc::to_bits(val)
532 }
533 }
534 #[repr(u8)]
535 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
536 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
537 pub enum Mode {
538 _RESERVED_0 = 0x0,
539 _RESERVED_1 = 0x01,
540 #[doc = "All read accesses are decrypted (instruction or data)."]
541 STANDARD = 0x02,
542 #[doc = "Enhanced encryption mode is activated, and only instruction accesses are decrypted"]
543 ENHANCED = 0x03,
544 }
545 impl Mode {
546 #[inline(always)]
547 pub const fn from_bits(val: u8) -> Mode {
548 unsafe { core::mem::transmute(val & 0x03) }
549 }
550 #[inline(always)]
551 pub const fn to_bits(self) -> u8 {
552 unsafe { core::mem::transmute(self) }
553 }
554 }
555 impl From<u8> for Mode {
556 #[inline(always)]
557 fn from(val: u8) -> Mode {
558 Mode::from_bits(val)
559 }
560 }
561 impl From<Mode> for u8 {
562 #[inline(always)]
563 fn from(val: Mode) -> u8 {
564 Mode::to_bits(val)
565 }
566 }
567}
568