1#![allow(clippy::missing_safety_doc)]
2#![allow(clippy::identity_op)]
3#![allow(clippy::unnecessary_cast)]
4#![allow(clippy::erasing_op)]
5
6#[doc = "Power control"]
7#[derive(Copy, Clone, Eq, PartialEq)]
8pub struct Pwr {
9 ptr: *mut u8,
10}
11unsafe impl Send for Pwr {}
12unsafe impl Sync for Pwr {}
13impl Pwr {
14 #[inline(always)]
15 pub const unsafe fn from_ptr(ptr: *mut ()) -> Self {
16 Self { ptr: ptr as _ }
17 }
18 #[inline(always)]
19 pub const fn as_ptr(&self) -> *mut () {
20 self.ptr as _
21 }
22 #[doc = "control register 1"]
23 #[inline(always)]
24 pub const fn cr1(self) -> crate::common::Reg<regs::Cr1, crate::common::RW> {
25 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0usize) as _) }
26 }
27 #[doc = "control register 2"]
28 #[inline(always)]
29 pub const fn cr2(self) -> crate::common::Reg<regs::Cr2, crate::common::RW> {
30 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x04usize) as _) }
31 }
32 #[doc = "control register 3"]
33 #[inline(always)]
34 pub const fn cr3(self) -> crate::common::Reg<regs::Cr3, crate::common::RW> {
35 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x08usize) as _) }
36 }
37 #[doc = "voltage scaling register"]
38 #[inline(always)]
39 pub const fn vosr(self) -> crate::common::Reg<regs::Vosr, crate::common::RW> {
40 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0cusize) as _) }
41 }
42 #[doc = "supply voltage monitoring control register"]
43 #[inline(always)]
44 pub const fn svmcr(self) -> crate::common::Reg<regs::Svmcr, crate::common::RW> {
45 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x10usize) as _) }
46 }
47 #[doc = "wakeup control register 1"]
48 #[inline(always)]
49 pub const fn wucr1(self) -> crate::common::Reg<regs::Wucr1, crate::common::RW> {
50 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x14usize) as _) }
51 }
52 #[doc = "wakeup control register 2"]
53 #[inline(always)]
54 pub const fn wucr2(self) -> crate::common::Reg<regs::Wucr2, crate::common::RW> {
55 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x18usize) as _) }
56 }
57 #[doc = "wakeup control register 3"]
58 #[inline(always)]
59 pub const fn wucr3(self) -> crate::common::Reg<regs::Wucr3, crate::common::RW> {
60 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x1cusize) as _) }
61 }
62 #[doc = "Backup domain control register 1"]
63 #[inline(always)]
64 pub const fn bdcr1(self) -> crate::common::Reg<regs::Bdcr1, crate::common::RW> {
65 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x20usize) as _) }
66 }
67 #[doc = "Backup domain control register 2"]
68 #[inline(always)]
69 pub const fn bdcr2(self) -> crate::common::Reg<regs::Bdcr2, crate::common::RW> {
70 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x24usize) as _) }
71 }
72 #[doc = "disable Backup domain register"]
73 #[inline(always)]
74 pub const fn dbpcr(self) -> crate::common::Reg<regs::Dbpcr, crate::common::RW> {
75 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x28usize) as _) }
76 }
77 #[doc = "USB Type-C™ and Power Delivery register"]
78 #[inline(always)]
79 pub const fn ucpdr(self) -> crate::common::Reg<regs::Ucpdr, crate::common::RW> {
80 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x2cusize) as _) }
81 }
82 #[doc = "security configuration register"]
83 #[inline(always)]
84 pub const fn seccfgr(self) -> crate::common::Reg<regs::Seccfgr, crate::common::RW> {
85 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x30usize) as _) }
86 }
87 #[doc = "privilege control register"]
88 #[inline(always)]
89 pub const fn privcfgr(self) -> crate::common::Reg<regs::Privcfgr, crate::common::RW> {
90 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x34usize) as _) }
91 }
92 #[doc = "status register"]
93 #[inline(always)]
94 pub const fn sr(self) -> crate::common::Reg<regs::Sr, crate::common::RW> {
95 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x38usize) as _) }
96 }
97 #[inline(always)]
98 pub const fn svmsr(self) -> crate::common::Reg<regs::Svmsr, crate::common::RW> {
99 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x3cusize) as _) }
100 }
101 #[doc = "Backup domain status register"]
102 #[inline(always)]
103 pub const fn bdsr(self) -> crate::common::Reg<regs::Bdsr, crate::common::RW> {
104 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x40usize) as _) }
105 }
106 #[doc = "wakeup status register"]
107 #[inline(always)]
108 pub const fn wusr(self) -> crate::common::Reg<regs::Wusr, crate::common::RW> {
109 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x44usize) as _) }
110 }
111 #[doc = "wakeup status clear register"]
112 #[inline(always)]
113 pub const fn wuscr(self) -> crate::common::Reg<regs::Wuscr, crate::common::RW> {
114 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x48usize) as _) }
115 }
116 #[doc = "apply pull configuration register"]
117 #[inline(always)]
118 pub const fn apcr(self) -> crate::common::Reg<regs::Apcr, crate::common::RW> {
119 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x4cusize) as _) }
120 }
121 #[doc = "Power Port pull-up control register"]
122 #[inline(always)]
123 pub const fn pucr(self, n: usize) -> crate::common::Reg<regs::Pcr, crate::common::RW> {
124 assert!(n < 9usize);
125 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x50usize + n * 8usize) as _) }
126 }
127 #[doc = "Power Port pull-down control register"]
128 #[inline(always)]
129 pub const fn pdcr(self, n: usize) -> crate::common::Reg<regs::Pcr, crate::common::RW> {
130 assert!(n < 9usize);
131 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x54usize + n * 8usize) as _) }
132 }
133}
134pub mod regs {
135 #[doc = "apply pull configuration register"]
136 #[repr(transparent)]
137 #[derive(Copy, Clone, Eq, PartialEq)]
138 pub struct Apcr(pub u32);
139 impl Apcr {
140 #[doc = "Apply pull-up and pull-down configuration When this bit is set, the I/O pull-up and pull-down configurations defined in PUCRx and PDCRx are applied. When this bit is cleared, PUCRx and PDCRx are not applied to the I/Os."]
141 #[inline(always)]
142 pub const fn apc(&self) -> bool {
143 let val = (self.0 >> 0usize) & 0x01;
144 val != 0
145 }
146 #[doc = "Apply pull-up and pull-down configuration When this bit is set, the I/O pull-up and pull-down configurations defined in PUCRx and PDCRx are applied. When this bit is cleared, PUCRx and PDCRx are not applied to the I/Os."]
147 #[inline(always)]
148 pub fn set_apc(&mut self, val: bool) {
149 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
150 }
151 }
152 impl Default for Apcr {
153 #[inline(always)]
154 fn default() -> Apcr {
155 Apcr(0)
156 }
157 }
158 impl core::fmt::Debug for Apcr {
159 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
160 f.debug_struct("Apcr").field("apc", &self.apc()).finish()
161 }
162 }
163 #[cfg(feature = "defmt")]
164 impl defmt::Format for Apcr {
165 fn format(&self, f: defmt::Formatter) {
166 #[derive(defmt :: Format)]
167 struct Apcr {
168 apc: bool,
169 }
170 let proxy = Apcr { apc: self.apc() };
171 defmt::write!(f, "{}", proxy)
172 }
173 }
174 #[doc = "Backup domain control register 1"]
175 #[repr(transparent)]
176 #[derive(Copy, Clone, Eq, PartialEq)]
177 pub struct Bdcr1(pub u32);
178 impl Bdcr1 {
179 #[doc = "Backup RAM retention in Standby and VBAT modes When this bit is set, the backup RAM content is kept in Standby and VBAT modes. If BREN is reset, the backup RAM can still be used in Run, Sleep and Stop modes. However, its content is lost in Standby, Shutdown and VBAT modes. This bit can be written only when the regulator is LDO, which must be configured before switching to SMPS. Note: Backup RAM cannot be preserved in Shutdown mode."]
180 #[inline(always)]
181 pub const fn bren(&self) -> bool {
182 let val = (self.0 >> 0usize) & 0x01;
183 val != 0
184 }
185 #[doc = "Backup RAM retention in Standby and VBAT modes When this bit is set, the backup RAM content is kept in Standby and VBAT modes. If BREN is reset, the backup RAM can still be used in Run, Sleep and Stop modes. However, its content is lost in Standby, Shutdown and VBAT modes. This bit can be written only when the regulator is LDO, which must be configured before switching to SMPS. Note: Backup RAM cannot be preserved in Shutdown mode."]
186 #[inline(always)]
187 pub fn set_bren(&mut self, val: bool) {
188 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
189 }
190 #[doc = "Backup domain voltage and temperature monitoring enable"]
191 #[inline(always)]
192 pub const fn monen(&self) -> bool {
193 let val = (self.0 >> 4usize) & 0x01;
194 val != 0
195 }
196 #[doc = "Backup domain voltage and temperature monitoring enable"]
197 #[inline(always)]
198 pub fn set_monen(&mut self, val: bool) {
199 self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
200 }
201 }
202 impl Default for Bdcr1 {
203 #[inline(always)]
204 fn default() -> Bdcr1 {
205 Bdcr1(0)
206 }
207 }
208 impl core::fmt::Debug for Bdcr1 {
209 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
210 f.debug_struct("Bdcr1")
211 .field("bren", &self.bren())
212 .field("monen", &self.monen())
213 .finish()
214 }
215 }
216 #[cfg(feature = "defmt")]
217 impl defmt::Format for Bdcr1 {
218 fn format(&self, f: defmt::Formatter) {
219 #[derive(defmt :: Format)]
220 struct Bdcr1 {
221 bren: bool,
222 monen: bool,
223 }
224 let proxy = Bdcr1 {
225 bren: self.bren(),
226 monen: self.monen(),
227 };
228 defmt::write!(f, "{}", proxy)
229 }
230 }
231 #[doc = "Backup domain control register 2"]
232 #[repr(transparent)]
233 #[derive(Copy, Clone, Eq, PartialEq)]
234 pub struct Bdcr2(pub u32);
235 impl Bdcr2 {
236 #[doc = "VBAT charging enable"]
237 #[inline(always)]
238 pub const fn vbe(&self) -> super::vals::Vbe {
239 let val = (self.0 >> 0usize) & 0x01;
240 super::vals::Vbe::from_bits(val as u8)
241 }
242 #[doc = "VBAT charging enable"]
243 #[inline(always)]
244 pub fn set_vbe(&mut self, val: super::vals::Vbe) {
245 self.0 = (self.0 & !(0x01 << 0usize)) | (((val.to_bits() as u32) & 0x01) << 0usize);
246 }
247 #[doc = "VBAT charging resistor selection"]
248 #[inline(always)]
249 pub const fn vbrs(&self) -> super::vals::Vbrs {
250 let val = (self.0 >> 1usize) & 0x01;
251 super::vals::Vbrs::from_bits(val as u8)
252 }
253 #[doc = "VBAT charging resistor selection"]
254 #[inline(always)]
255 pub fn set_vbrs(&mut self, val: super::vals::Vbrs) {
256 self.0 = (self.0 & !(0x01 << 1usize)) | (((val.to_bits() as u32) & 0x01) << 1usize);
257 }
258 }
259 impl Default for Bdcr2 {
260 #[inline(always)]
261 fn default() -> Bdcr2 {
262 Bdcr2(0)
263 }
264 }
265 impl core::fmt::Debug for Bdcr2 {
266 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
267 f.debug_struct("Bdcr2")
268 .field("vbe", &self.vbe())
269 .field("vbrs", &self.vbrs())
270 .finish()
271 }
272 }
273 #[cfg(feature = "defmt")]
274 impl defmt::Format for Bdcr2 {
275 fn format(&self, f: defmt::Formatter) {
276 #[derive(defmt :: Format)]
277 struct Bdcr2 {
278 vbe: super::vals::Vbe,
279 vbrs: super::vals::Vbrs,
280 }
281 let proxy = Bdcr2 {
282 vbe: self.vbe(),
283 vbrs: self.vbrs(),
284 };
285 defmt::write!(f, "{}", proxy)
286 }
287 }
288 #[doc = "Backup domain status register"]
289 #[repr(transparent)]
290 #[derive(Copy, Clone, Eq, PartialEq)]
291 pub struct Bdsr(pub u32);
292 impl Bdsr {
293 #[doc = "Backup domain voltage level monitoring versus high threshold"]
294 #[inline(always)]
295 pub const fn vbath(&self) -> super::vals::Vbath {
296 let val = (self.0 >> 1usize) & 0x01;
297 super::vals::Vbath::from_bits(val as u8)
298 }
299 #[doc = "Backup domain voltage level monitoring versus high threshold"]
300 #[inline(always)]
301 pub fn set_vbath(&mut self, val: super::vals::Vbath) {
302 self.0 = (self.0 & !(0x01 << 1usize)) | (((val.to_bits() as u32) & 0x01) << 1usize);
303 }
304 #[doc = "Temperature level monitoring versus low threshold"]
305 #[inline(always)]
306 pub const fn templ(&self) -> super::vals::Templ {
307 let val = (self.0 >> 2usize) & 0x01;
308 super::vals::Templ::from_bits(val as u8)
309 }
310 #[doc = "Temperature level monitoring versus low threshold"]
311 #[inline(always)]
312 pub fn set_templ(&mut self, val: super::vals::Templ) {
313 self.0 = (self.0 & !(0x01 << 2usize)) | (((val.to_bits() as u32) & 0x01) << 2usize);
314 }
315 #[doc = "Temperature level monitoring versus high threshold"]
316 #[inline(always)]
317 pub const fn temph(&self) -> super::vals::Temph {
318 let val = (self.0 >> 3usize) & 0x01;
319 super::vals::Temph::from_bits(val as u8)
320 }
321 #[doc = "Temperature level monitoring versus high threshold"]
322 #[inline(always)]
323 pub fn set_temph(&mut self, val: super::vals::Temph) {
324 self.0 = (self.0 & !(0x01 << 3usize)) | (((val.to_bits() as u32) & 0x01) << 3usize);
325 }
326 }
327 impl Default for Bdsr {
328 #[inline(always)]
329 fn default() -> Bdsr {
330 Bdsr(0)
331 }
332 }
333 impl core::fmt::Debug for Bdsr {
334 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
335 f.debug_struct("Bdsr")
336 .field("vbath", &self.vbath())
337 .field("templ", &self.templ())
338 .field("temph", &self.temph())
339 .finish()
340 }
341 }
342 #[cfg(feature = "defmt")]
343 impl defmt::Format for Bdsr {
344 fn format(&self, f: defmt::Formatter) {
345 #[derive(defmt :: Format)]
346 struct Bdsr {
347 vbath: super::vals::Vbath,
348 templ: super::vals::Templ,
349 temph: super::vals::Temph,
350 }
351 let proxy = Bdsr {
352 vbath: self.vbath(),
353 templ: self.templ(),
354 temph: self.temph(),
355 };
356 defmt::write!(f, "{}", proxy)
357 }
358 }
359 #[doc = "control register 1"]
360 #[repr(transparent)]
361 #[derive(Copy, Clone, Eq, PartialEq)]
362 pub struct Cr1(pub u32);
363 impl Cr1 {
364 #[doc = "Low-power mode selection These bits select the low-power mode entered when the CPU enters the Deepsleep mode. 10x: Standby mode (Standby mode also entered if LPMS=11X in CR1 with BREN=1 in BDCR1) 11x: Shutdown mode if BREN = 0 in BDCR1"]
365 #[inline(always)]
366 pub const fn lpms(&self) -> super::vals::Lpms {
367 let val = (self.0 >> 0usize) & 0x07;
368 super::vals::Lpms::from_bits(val as u8)
369 }
370 #[doc = "Low-power mode selection These bits select the low-power mode entered when the CPU enters the Deepsleep mode. 10x: Standby mode (Standby mode also entered if LPMS=11X in CR1 with BREN=1 in BDCR1) 11x: Shutdown mode if BREN = 0 in BDCR1"]
371 #[inline(always)]
372 pub fn set_lpms(&mut self, val: super::vals::Lpms) {
373 self.0 = (self.0 & !(0x07 << 0usize)) | (((val.to_bits() as u32) & 0x07) << 0usize);
374 }
375 #[doc = "SRAM2 page 1 retention in Stop 3 and Standby modes This bit is used to keep the SRAM2 page 1 content in Stop 3 and Standby modes. The SRAM2 page 1 corresponds to the first 8 Kbytes of the SRAM2 (from SRAM2 base address to SRAM2 base address + 0x1FFF). Note: This bit has no effect in Shutdown mode."]
376 #[inline(always)]
377 pub const fn rrsb1(&self) -> bool {
378 let val = (self.0 >> 5usize) & 0x01;
379 val != 0
380 }
381 #[doc = "SRAM2 page 1 retention in Stop 3 and Standby modes This bit is used to keep the SRAM2 page 1 content in Stop 3 and Standby modes. The SRAM2 page 1 corresponds to the first 8 Kbytes of the SRAM2 (from SRAM2 base address to SRAM2 base address + 0x1FFF). Note: This bit has no effect in Shutdown mode."]
382 #[inline(always)]
383 pub fn set_rrsb1(&mut self, val: bool) {
384 self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize);
385 }
386 #[doc = "SRAM2 page 2 retention in Stop 3 and Standby modes This bit is used to keep the SRAM2 page 2 content in Stop 3 and Standby modes. The SRAM2 page 2 corresponds to the last 56 Kbytes of the SRAM2 (from SRAM2 base address + 0x2000 to SRAM2 base address + 0xFFFF). Note: This bit has no effect in Shutdown mode."]
387 #[inline(always)]
388 pub const fn rrsb2(&self) -> bool {
389 let val = (self.0 >> 6usize) & 0x01;
390 val != 0
391 }
392 #[doc = "SRAM2 page 2 retention in Stop 3 and Standby modes This bit is used to keep the SRAM2 page 2 content in Stop 3 and Standby modes. The SRAM2 page 2 corresponds to the last 56 Kbytes of the SRAM2 (from SRAM2 base address + 0x2000 to SRAM2 base address + 0xFFFF). Note: This bit has no effect in Shutdown mode."]
393 #[inline(always)]
394 pub fn set_rrsb2(&mut self, val: bool) {
395 self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize);
396 }
397 #[doc = "BOR ultra-low power mode This bit is used to reduce the consumption by configuring the BOR in discontinuous mode. This bit must be set to reach the lowest power consumption in the low-power modes."]
398 #[inline(always)]
399 pub const fn ulpmen(&self) -> bool {
400 let val = (self.0 >> 7usize) & 0x01;
401 val != 0
402 }
403 #[doc = "BOR ultra-low power mode This bit is used to reduce the consumption by configuring the BOR in discontinuous mode. This bit must be set to reach the lowest power consumption in the low-power modes."]
404 #[inline(always)]
405 pub fn set_ulpmen(&mut self, val: bool) {
406 self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize);
407 }
408 #[doc = "SRAM1 power down This bit is used to reduce the consumption by powering off the SRAM1."]
409 #[inline(always)]
410 pub const fn sram1pd(&self) -> super::vals::Srampd {
411 let val = (self.0 >> 8usize) & 0x01;
412 super::vals::Srampd::from_bits(val as u8)
413 }
414 #[doc = "SRAM1 power down This bit is used to reduce the consumption by powering off the SRAM1."]
415 #[inline(always)]
416 pub fn set_sram1pd(&mut self, val: super::vals::Srampd) {
417 self.0 = (self.0 & !(0x01 << 8usize)) | (((val.to_bits() as u32) & 0x01) << 8usize);
418 }
419 #[doc = "SRAM2 power down This bit is used to reduce the consumption by powering off the SRAM2."]
420 #[inline(always)]
421 pub const fn sram2pd(&self) -> super::vals::Srampd {
422 let val = (self.0 >> 9usize) & 0x01;
423 super::vals::Srampd::from_bits(val as u8)
424 }
425 #[doc = "SRAM2 power down This bit is used to reduce the consumption by powering off the SRAM2."]
426 #[inline(always)]
427 pub fn set_sram2pd(&mut self, val: super::vals::Srampd) {
428 self.0 = (self.0 & !(0x01 << 9usize)) | (((val.to_bits() as u32) & 0x01) << 9usize);
429 }
430 #[doc = "SRAM3 power down This bit is used to reduce the consumption by powering off the SRAM3."]
431 #[inline(always)]
432 pub const fn sram3pd(&self) -> super::vals::Srampd {
433 let val = (self.0 >> 10usize) & 0x01;
434 super::vals::Srampd::from_bits(val as u8)
435 }
436 #[doc = "SRAM3 power down This bit is used to reduce the consumption by powering off the SRAM3."]
437 #[inline(always)]
438 pub fn set_sram3pd(&mut self, val: super::vals::Srampd) {
439 self.0 = (self.0 & !(0x01 << 10usize)) | (((val.to_bits() as u32) & 0x01) << 10usize);
440 }
441 #[doc = "SRAM4 power down This bit is used to reduce the consumption by powering off the SRAM4."]
442 #[inline(always)]
443 pub const fn sram4pd(&self) -> super::vals::Srampd {
444 let val = (self.0 >> 11usize) & 0x01;
445 super::vals::Srampd::from_bits(val as u8)
446 }
447 #[doc = "SRAM4 power down This bit is used to reduce the consumption by powering off the SRAM4."]
448 #[inline(always)]
449 pub fn set_sram4pd(&mut self, val: super::vals::Srampd) {
450 self.0 = (self.0 & !(0x01 << 11usize)) | (((val.to_bits() as u32) & 0x01) << 11usize);
451 }
452 }
453 impl Default for Cr1 {
454 #[inline(always)]
455 fn default() -> Cr1 {
456 Cr1(0)
457 }
458 }
459 impl core::fmt::Debug for Cr1 {
460 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
461 f.debug_struct("Cr1")
462 .field("lpms", &self.lpms())
463 .field("rrsb1", &self.rrsb1())
464 .field("rrsb2", &self.rrsb2())
465 .field("ulpmen", &self.ulpmen())
466 .field("sram1pd", &self.sram1pd())
467 .field("sram2pd", &self.sram2pd())
468 .field("sram3pd", &self.sram3pd())
469 .field("sram4pd", &self.sram4pd())
470 .finish()
471 }
472 }
473 #[cfg(feature = "defmt")]
474 impl defmt::Format for Cr1 {
475 fn format(&self, f: defmt::Formatter) {
476 #[derive(defmt :: Format)]
477 struct Cr1 {
478 lpms: super::vals::Lpms,
479 rrsb1: bool,
480 rrsb2: bool,
481 ulpmen: bool,
482 sram1pd: super::vals::Srampd,
483 sram2pd: super::vals::Srampd,
484 sram3pd: super::vals::Srampd,
485 sram4pd: super::vals::Srampd,
486 }
487 let proxy = Cr1 {
488 lpms: self.lpms(),
489 rrsb1: self.rrsb1(),
490 rrsb2: self.rrsb2(),
491 ulpmen: self.ulpmen(),
492 sram1pd: self.sram1pd(),
493 sram2pd: self.sram2pd(),
494 sram3pd: self.sram3pd(),
495 sram4pd: self.sram4pd(),
496 };
497 defmt::write!(f, "{}", proxy)
498 }
499 }
500 #[doc = "control register 2"]
501 #[repr(transparent)]
502 #[derive(Copy, Clone, Eq, PartialEq)]
503 pub struct Cr2(pub u32);
504 impl Cr2 {
505 #[doc = "SRAM1 page 1 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
506 #[inline(always)]
507 pub const fn sram1pds1(&self) -> super::vals::Pds {
508 let val = (self.0 >> 0usize) & 0x01;
509 super::vals::Pds::from_bits(val as u8)
510 }
511 #[doc = "SRAM1 page 1 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
512 #[inline(always)]
513 pub fn set_sram1pds1(&mut self, val: super::vals::Pds) {
514 self.0 = (self.0 & !(0x01 << 0usize)) | (((val.to_bits() as u32) & 0x01) << 0usize);
515 }
516 #[doc = "SRAM1 page 2 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
517 #[inline(always)]
518 pub const fn sram1pds2(&self) -> super::vals::Pds {
519 let val = (self.0 >> 1usize) & 0x01;
520 super::vals::Pds::from_bits(val as u8)
521 }
522 #[doc = "SRAM1 page 2 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
523 #[inline(always)]
524 pub fn set_sram1pds2(&mut self, val: super::vals::Pds) {
525 self.0 = (self.0 & !(0x01 << 1usize)) | (((val.to_bits() as u32) & 0x01) << 1usize);
526 }
527 #[doc = "SRAM1 page 3 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
528 #[inline(always)]
529 pub const fn sram1pds3(&self) -> super::vals::Pds {
530 let val = (self.0 >> 2usize) & 0x01;
531 super::vals::Pds::from_bits(val as u8)
532 }
533 #[doc = "SRAM1 page 3 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
534 #[inline(always)]
535 pub fn set_sram1pds3(&mut self, val: super::vals::Pds) {
536 self.0 = (self.0 & !(0x01 << 2usize)) | (((val.to_bits() as u32) & 0x01) << 2usize);
537 }
538 #[doc = "SRAM2 page 1 (8 Kbytes) power-down in Stop modes (Stop 0, 1, 2) Note: The SRAM2 page 1 retention in Stop 3 is controlled by RRSB1 bit in CR1."]
539 #[inline(always)]
540 pub const fn sram2pds1(&self) -> super::vals::Pds {
541 let val = (self.0 >> 4usize) & 0x01;
542 super::vals::Pds::from_bits(val as u8)
543 }
544 #[doc = "SRAM2 page 1 (8 Kbytes) power-down in Stop modes (Stop 0, 1, 2) Note: The SRAM2 page 1 retention in Stop 3 is controlled by RRSB1 bit in CR1."]
545 #[inline(always)]
546 pub fn set_sram2pds1(&mut self, val: super::vals::Pds) {
547 self.0 = (self.0 & !(0x01 << 4usize)) | (((val.to_bits() as u32) & 0x01) << 4usize);
548 }
549 #[doc = "SRAM2 page 2 (56 Kbytes) power-down in Stop modes (Stop 0, 1, 2) Note: The SRAM2 page 2 retention in Stop 3 is controlled by RRSB2 bit in CR1."]
550 #[inline(always)]
551 pub const fn sram2pds2(&self) -> super::vals::Pds {
552 let val = (self.0 >> 5usize) & 0x01;
553 super::vals::Pds::from_bits(val as u8)
554 }
555 #[doc = "SRAM2 page 2 (56 Kbytes) power-down in Stop modes (Stop 0, 1, 2) Note: The SRAM2 page 2 retention in Stop 3 is controlled by RRSB2 bit in CR1."]
556 #[inline(always)]
557 pub fn set_sram2pds2(&mut self, val: super::vals::Pds) {
558 self.0 = (self.0 & !(0x01 << 5usize)) | (((val.to_bits() as u32) & 0x01) << 5usize);
559 }
560 #[doc = "SRAM4 power-down in Stop modes (Stop 0, 1, 2, 3)"]
561 #[inline(always)]
562 pub const fn sram4pds(&self) -> super::vals::Pds {
563 let val = (self.0 >> 6usize) & 0x01;
564 super::vals::Pds::from_bits(val as u8)
565 }
566 #[doc = "SRAM4 power-down in Stop modes (Stop 0, 1, 2, 3)"]
567 #[inline(always)]
568 pub fn set_sram4pds(&mut self, val: super::vals::Pds) {
569 self.0 = (self.0 & !(0x01 << 6usize)) | (((val.to_bits() as u32) & 0x01) << 6usize);
570 }
571 #[doc = "ICACHE SRAM power-down in Stop modes (Stop 0, 1, 2, 3)"]
572 #[inline(always)]
573 pub const fn icrampds(&self) -> super::vals::Pds {
574 let val = (self.0 >> 8usize) & 0x01;
575 super::vals::Pds::from_bits(val as u8)
576 }
577 #[doc = "ICACHE SRAM power-down in Stop modes (Stop 0, 1, 2, 3)"]
578 #[inline(always)]
579 pub fn set_icrampds(&mut self, val: super::vals::Pds) {
580 self.0 = (self.0 & !(0x01 << 8usize)) | (((val.to_bits() as u32) & 0x01) << 8usize);
581 }
582 #[doc = "DCACHE1 SRAM power-down in Stop modes (Stop 0, 1, 2, 3)"]
583 #[inline(always)]
584 pub const fn dc1rampds(&self) -> super::vals::Pds {
585 let val = (self.0 >> 9usize) & 0x01;
586 super::vals::Pds::from_bits(val as u8)
587 }
588 #[doc = "DCACHE1 SRAM power-down in Stop modes (Stop 0, 1, 2, 3)"]
589 #[inline(always)]
590 pub fn set_dc1rampds(&mut self, val: super::vals::Pds) {
591 self.0 = (self.0 & !(0x01 << 9usize)) | (((val.to_bits() as u32) & 0x01) << 9usize);
592 }
593 #[doc = "DMA2D SRAM power-down in Stop modes (Stop 0, 1, 2, 3)"]
594 #[inline(always)]
595 pub const fn dma2drampds(&self) -> super::vals::Pds {
596 let val = (self.0 >> 10usize) & 0x01;
597 super::vals::Pds::from_bits(val as u8)
598 }
599 #[doc = "DMA2D SRAM power-down in Stop modes (Stop 0, 1, 2, 3)"]
600 #[inline(always)]
601 pub fn set_dma2drampds(&mut self, val: super::vals::Pds) {
602 self.0 = (self.0 & !(0x01 << 10usize)) | (((val.to_bits() as u32) & 0x01) << 10usize);
603 }
604 #[doc = "FMAC, FDCAN and USB peripherals SRAM power-down in Stop modes (Stop0,1,2,3)"]
605 #[inline(always)]
606 pub const fn prampds(&self) -> super::vals::Pds {
607 let val = (self.0 >> 11usize) & 0x01;
608 super::vals::Pds::from_bits(val as u8)
609 }
610 #[doc = "FMAC, FDCAN and USB peripherals SRAM power-down in Stop modes (Stop0,1,2,3)"]
611 #[inline(always)]
612 pub fn set_prampds(&mut self, val: super::vals::Pds) {
613 self.0 = (self.0 & !(0x01 << 11usize)) | (((val.to_bits() as u32) & 0x01) << 11usize);
614 }
615 #[doc = "PKA SRAM power-down"]
616 #[inline(always)]
617 pub const fn pkarampds(&self) -> super::vals::Pds {
618 let val = (self.0 >> 12usize) & 0x01;
619 super::vals::Pds::from_bits(val as u8)
620 }
621 #[doc = "PKA SRAM power-down"]
622 #[inline(always)]
623 pub fn set_pkarampds(&mut self, val: super::vals::Pds) {
624 self.0 = (self.0 & !(0x01 << 12usize)) | (((val.to_bits() as u32) & 0x01) << 12usize);
625 }
626 #[doc = "SRAM4 fast wakeup from Stop 0, Stop 1 and Stop 2 modes This bit is used to obtain the best trade-off between low-power consumption and wakeup time. SRAM4 wakeup time increases the wakeup time when exiting Stop 0, 1 and 2 modes, and also increases the LPDMA access time to SRAM4 during Stop modes."]
627 #[inline(always)]
628 pub const fn sram4fwu(&self) -> super::vals::Sramfwu {
629 let val = (self.0 >> 13usize) & 0x01;
630 super::vals::Sramfwu::from_bits(val as u8)
631 }
632 #[doc = "SRAM4 fast wakeup from Stop 0, Stop 1 and Stop 2 modes This bit is used to obtain the best trade-off between low-power consumption and wakeup time. SRAM4 wakeup time increases the wakeup time when exiting Stop 0, 1 and 2 modes, and also increases the LPDMA access time to SRAM4 during Stop modes."]
633 #[inline(always)]
634 pub fn set_sram4fwu(&mut self, val: super::vals::Sramfwu) {
635 self.0 = (self.0 & !(0x01 << 13usize)) | (((val.to_bits() as u32) & 0x01) << 13usize);
636 }
637 #[doc = "Flash memory fast wakeup from Stop 0 and Stop 1 modes This bit is used to obtain the best trade-off between low-power consumption and wakeup time when exiting the Stop 0 or Stop 1 modes. When this bit is set, the Flash memory remains in normal mode in Stop 0 and Stop 1 modes, which offers a faster startup time with higher consumption."]
638 #[inline(always)]
639 pub const fn flashfwu(&self) -> super::vals::Flashfwu {
640 let val = (self.0 >> 14usize) & 0x01;
641 super::vals::Flashfwu::from_bits(val as u8)
642 }
643 #[doc = "Flash memory fast wakeup from Stop 0 and Stop 1 modes This bit is used to obtain the best trade-off between low-power consumption and wakeup time when exiting the Stop 0 or Stop 1 modes. When this bit is set, the Flash memory remains in normal mode in Stop 0 and Stop 1 modes, which offers a faster startup time with higher consumption."]
644 #[inline(always)]
645 pub fn set_flashfwu(&mut self, val: super::vals::Flashfwu) {
646 self.0 = (self.0 & !(0x01 << 14usize)) | (((val.to_bits() as u32) & 0x01) << 14usize);
647 }
648 #[doc = "SRAM3 page 1 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
649 #[inline(always)]
650 pub const fn sram3pds1(&self) -> super::vals::Pds {
651 let val = (self.0 >> 16usize) & 0x01;
652 super::vals::Pds::from_bits(val as u8)
653 }
654 #[doc = "SRAM3 page 1 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
655 #[inline(always)]
656 pub fn set_sram3pds1(&mut self, val: super::vals::Pds) {
657 self.0 = (self.0 & !(0x01 << 16usize)) | (((val.to_bits() as u32) & 0x01) << 16usize);
658 }
659 #[doc = "SRAM3 page 2 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
660 #[inline(always)]
661 pub const fn sram3pds2(&self) -> super::vals::Pds {
662 let val = (self.0 >> 17usize) & 0x01;
663 super::vals::Pds::from_bits(val as u8)
664 }
665 #[doc = "SRAM3 page 2 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
666 #[inline(always)]
667 pub fn set_sram3pds2(&mut self, val: super::vals::Pds) {
668 self.0 = (self.0 & !(0x01 << 17usize)) | (((val.to_bits() as u32) & 0x01) << 17usize);
669 }
670 #[doc = "SRAM3 page 3 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
671 #[inline(always)]
672 pub const fn sram3pds3(&self) -> super::vals::Pds {
673 let val = (self.0 >> 18usize) & 0x01;
674 super::vals::Pds::from_bits(val as u8)
675 }
676 #[doc = "SRAM3 page 3 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
677 #[inline(always)]
678 pub fn set_sram3pds3(&mut self, val: super::vals::Pds) {
679 self.0 = (self.0 & !(0x01 << 18usize)) | (((val.to_bits() as u32) & 0x01) << 18usize);
680 }
681 #[doc = "SRAM3 page 4 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
682 #[inline(always)]
683 pub const fn sram3pds4(&self) -> super::vals::Pds {
684 let val = (self.0 >> 19usize) & 0x01;
685 super::vals::Pds::from_bits(val as u8)
686 }
687 #[doc = "SRAM3 page 4 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
688 #[inline(always)]
689 pub fn set_sram3pds4(&mut self, val: super::vals::Pds) {
690 self.0 = (self.0 & !(0x01 << 19usize)) | (((val.to_bits() as u32) & 0x01) << 19usize);
691 }
692 #[doc = "SRAM3 page 5 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
693 #[inline(always)]
694 pub const fn sram3pds5(&self) -> super::vals::Pds {
695 let val = (self.0 >> 20usize) & 0x01;
696 super::vals::Pds::from_bits(val as u8)
697 }
698 #[doc = "SRAM3 page 5 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
699 #[inline(always)]
700 pub fn set_sram3pds5(&mut self, val: super::vals::Pds) {
701 self.0 = (self.0 & !(0x01 << 20usize)) | (((val.to_bits() as u32) & 0x01) << 20usize);
702 }
703 #[doc = "SRAM3 page 6 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
704 #[inline(always)]
705 pub const fn sram3pds6(&self) -> super::vals::Pds {
706 let val = (self.0 >> 21usize) & 0x01;
707 super::vals::Pds::from_bits(val as u8)
708 }
709 #[doc = "SRAM3 page 6 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
710 #[inline(always)]
711 pub fn set_sram3pds6(&mut self, val: super::vals::Pds) {
712 self.0 = (self.0 & !(0x01 << 21usize)) | (((val.to_bits() as u32) & 0x01) << 21usize);
713 }
714 #[doc = "SRAM3 page 7 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
715 #[inline(always)]
716 pub const fn sram3pds7(&self) -> super::vals::Pds {
717 let val = (self.0 >> 22usize) & 0x01;
718 super::vals::Pds::from_bits(val as u8)
719 }
720 #[doc = "SRAM3 page 7 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
721 #[inline(always)]
722 pub fn set_sram3pds7(&mut self, val: super::vals::Pds) {
723 self.0 = (self.0 & !(0x01 << 22usize)) | (((val.to_bits() as u32) & 0x01) << 22usize);
724 }
725 #[doc = "SRAM3 page 8 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
726 #[inline(always)]
727 pub const fn sram3pds8(&self) -> super::vals::Pds {
728 let val = (self.0 >> 23usize) & 0x01;
729 super::vals::Pds::from_bits(val as u8)
730 }
731 #[doc = "SRAM3 page 8 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)"]
732 #[inline(always)]
733 pub fn set_sram3pds8(&mut self, val: super::vals::Pds) {
734 self.0 = (self.0 & !(0x01 << 23usize)) | (((val.to_bits() as u32) & 0x01) << 23usize);
735 }
736 #[doc = "SmartRun domain in Run mode"]
737 #[inline(always)]
738 pub const fn srdrun(&self) -> bool {
739 let val = (self.0 >> 31usize) & 0x01;
740 val != 0
741 }
742 #[doc = "SmartRun domain in Run mode"]
743 #[inline(always)]
744 pub fn set_srdrun(&mut self, val: bool) {
745 self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize);
746 }
747 }
748 impl Default for Cr2 {
749 #[inline(always)]
750 fn default() -> Cr2 {
751 Cr2(0)
752 }
753 }
754 impl core::fmt::Debug for Cr2 {
755 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
756 f.debug_struct("Cr2")
757 .field("sram1pds1", &self.sram1pds1())
758 .field("sram1pds2", &self.sram1pds2())
759 .field("sram1pds3", &self.sram1pds3())
760 .field("sram2pds1", &self.sram2pds1())
761 .field("sram2pds2", &self.sram2pds2())
762 .field("sram4pds", &self.sram4pds())
763 .field("icrampds", &self.icrampds())
764 .field("dc1rampds", &self.dc1rampds())
765 .field("dma2drampds", &self.dma2drampds())
766 .field("prampds", &self.prampds())
767 .field("pkarampds", &self.pkarampds())
768 .field("sram4fwu", &self.sram4fwu())
769 .field("flashfwu", &self.flashfwu())
770 .field("sram3pds1", &self.sram3pds1())
771 .field("sram3pds2", &self.sram3pds2())
772 .field("sram3pds3", &self.sram3pds3())
773 .field("sram3pds4", &self.sram3pds4())
774 .field("sram3pds5", &self.sram3pds5())
775 .field("sram3pds6", &self.sram3pds6())
776 .field("sram3pds7", &self.sram3pds7())
777 .field("sram3pds8", &self.sram3pds8())
778 .field("srdrun", &self.srdrun())
779 .finish()
780 }
781 }
782 #[cfg(feature = "defmt")]
783 impl defmt::Format for Cr2 {
784 fn format(&self, f: defmt::Formatter) {
785 #[derive(defmt :: Format)]
786 struct Cr2 {
787 sram1pds1: super::vals::Pds,
788 sram1pds2: super::vals::Pds,
789 sram1pds3: super::vals::Pds,
790 sram2pds1: super::vals::Pds,
791 sram2pds2: super::vals::Pds,
792 sram4pds: super::vals::Pds,
793 icrampds: super::vals::Pds,
794 dc1rampds: super::vals::Pds,
795 dma2drampds: super::vals::Pds,
796 prampds: super::vals::Pds,
797 pkarampds: super::vals::Pds,
798 sram4fwu: super::vals::Sramfwu,
799 flashfwu: super::vals::Flashfwu,
800 sram3pds1: super::vals::Pds,
801 sram3pds2: super::vals::Pds,
802 sram3pds3: super::vals::Pds,
803 sram3pds4: super::vals::Pds,
804 sram3pds5: super::vals::Pds,
805 sram3pds6: super::vals::Pds,
806 sram3pds7: super::vals::Pds,
807 sram3pds8: super::vals::Pds,
808 srdrun: bool,
809 }
810 let proxy = Cr2 {
811 sram1pds1: self.sram1pds1(),
812 sram1pds2: self.sram1pds2(),
813 sram1pds3: self.sram1pds3(),
814 sram2pds1: self.sram2pds1(),
815 sram2pds2: self.sram2pds2(),
816 sram4pds: self.sram4pds(),
817 icrampds: self.icrampds(),
818 dc1rampds: self.dc1rampds(),
819 dma2drampds: self.dma2drampds(),
820 prampds: self.prampds(),
821 pkarampds: self.pkarampds(),
822 sram4fwu: self.sram4fwu(),
823 flashfwu: self.flashfwu(),
824 sram3pds1: self.sram3pds1(),
825 sram3pds2: self.sram3pds2(),
826 sram3pds3: self.sram3pds3(),
827 sram3pds4: self.sram3pds4(),
828 sram3pds5: self.sram3pds5(),
829 sram3pds6: self.sram3pds6(),
830 sram3pds7: self.sram3pds7(),
831 sram3pds8: self.sram3pds8(),
832 srdrun: self.srdrun(),
833 };
834 defmt::write!(f, "{}", proxy)
835 }
836 }
837 #[doc = "control register 3"]
838 #[repr(transparent)]
839 #[derive(Copy, Clone, Eq, PartialEq)]
840 pub struct Cr3(pub u32);
841 impl Cr3 {
842 #[doc = "Regulator selection Note: REGSEL is reserved and must be kept at reset value in packages without SMPS."]
843 #[inline(always)]
844 pub const fn regsel(&self) -> super::vals::Regsel {
845 let val = (self.0 >> 1usize) & 0x01;
846 super::vals::Regsel::from_bits(val as u8)
847 }
848 #[doc = "Regulator selection Note: REGSEL is reserved and must be kept at reset value in packages without SMPS."]
849 #[inline(always)]
850 pub fn set_regsel(&mut self, val: super::vals::Regsel) {
851 self.0 = (self.0 & !(0x01 << 1usize)) | (((val.to_bits() as u32) & 0x01) << 1usize);
852 }
853 #[doc = "Fast soft start"]
854 #[inline(always)]
855 pub const fn fsten(&self) -> bool {
856 let val = (self.0 >> 2usize) & 0x01;
857 val != 0
858 }
859 #[doc = "Fast soft start"]
860 #[inline(always)]
861 pub fn set_fsten(&mut self, val: bool) {
862 self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
863 }
864 }
865 impl Default for Cr3 {
866 #[inline(always)]
867 fn default() -> Cr3 {
868 Cr3(0)
869 }
870 }
871 impl core::fmt::Debug for Cr3 {
872 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
873 f.debug_struct("Cr3")
874 .field("regsel", &self.regsel())
875 .field("fsten", &self.fsten())
876 .finish()
877 }
878 }
879 #[cfg(feature = "defmt")]
880 impl defmt::Format for Cr3 {
881 fn format(&self, f: defmt::Formatter) {
882 #[derive(defmt :: Format)]
883 struct Cr3 {
884 regsel: super::vals::Regsel,
885 fsten: bool,
886 }
887 let proxy = Cr3 {
888 regsel: self.regsel(),
889 fsten: self.fsten(),
890 };
891 defmt::write!(f, "{}", proxy)
892 }
893 }
894 #[doc = "disable Backup domain register"]
895 #[repr(transparent)]
896 #[derive(Copy, Clone, Eq, PartialEq)]
897 pub struct Dbpcr(pub u32);
898 impl Dbpcr {
899 #[doc = "Disable Backup domain write protection In reset state, all registers and SRAM in Backup domain are protected against parasitic write access. This bit must be set to enable the write access to these registers."]
900 #[inline(always)]
901 pub const fn dbp(&self) -> bool {
902 let val = (self.0 >> 0usize) & 0x01;
903 val != 0
904 }
905 #[doc = "Disable Backup domain write protection In reset state, all registers and SRAM in Backup domain are protected against parasitic write access. This bit must be set to enable the write access to these registers."]
906 #[inline(always)]
907 pub fn set_dbp(&mut self, val: bool) {
908 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
909 }
910 }
911 impl Default for Dbpcr {
912 #[inline(always)]
913 fn default() -> Dbpcr {
914 Dbpcr(0)
915 }
916 }
917 impl core::fmt::Debug for Dbpcr {
918 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
919 f.debug_struct("Dbpcr").field("dbp", &self.dbp()).finish()
920 }
921 }
922 #[cfg(feature = "defmt")]
923 impl defmt::Format for Dbpcr {
924 fn format(&self, f: defmt::Formatter) {
925 #[derive(defmt :: Format)]
926 struct Dbpcr {
927 dbp: bool,
928 }
929 let proxy = Dbpcr { dbp: self.dbp() };
930 defmt::write!(f, "{}", proxy)
931 }
932 }
933 #[doc = "Power Port pull control register"]
934 #[repr(transparent)]
935 #[derive(Copy, Clone, Eq, PartialEq)]
936 pub struct Pcr(pub u32);
937 impl Pcr {
938 #[doc = "Port pull bit y (y=0..15)"]
939 #[inline(always)]
940 pub const fn p(&self, n: usize) -> bool {
941 assert!(n < 16usize);
942 let offs = 0usize + n * 1usize;
943 let val = (self.0 >> offs) & 0x01;
944 val != 0
945 }
946 #[doc = "Port pull bit y (y=0..15)"]
947 #[inline(always)]
948 pub fn set_p(&mut self, n: usize, val: bool) {
949 assert!(n < 16usize);
950 let offs = 0usize + n * 1usize;
951 self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs);
952 }
953 }
954 impl Default for Pcr {
955 #[inline(always)]
956 fn default() -> Pcr {
957 Pcr(0)
958 }
959 }
960 impl core::fmt::Debug for Pcr {
961 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
962 f.debug_struct("Pcr")
963 .field(
964 "p",
965 &[
966 self.p(0usize),
967 self.p(1usize),
968 self.p(2usize),
969 self.p(3usize),
970 self.p(4usize),
971 self.p(5usize),
972 self.p(6usize),
973 self.p(7usize),
974 self.p(8usize),
975 self.p(9usize),
976 self.p(10usize),
977 self.p(11usize),
978 self.p(12usize),
979 self.p(13usize),
980 self.p(14usize),
981 self.p(15usize),
982 ],
983 )
984 .finish()
985 }
986 }
987 #[cfg(feature = "defmt")]
988 impl defmt::Format for Pcr {
989 fn format(&self, f: defmt::Formatter) {
990 #[derive(defmt :: Format)]
991 struct Pcr {
992 p: [bool; 16usize],
993 }
994 let proxy = Pcr {
995 p: [
996 self.p(0usize),
997 self.p(1usize),
998 self.p(2usize),
999 self.p(3usize),
1000 self.p(4usize),
1001 self.p(5usize),
1002 self.p(6usize),
1003 self.p(7usize),
1004 self.p(8usize),
1005 self.p(9usize),
1006 self.p(10usize),
1007 self.p(11usize),
1008 self.p(12usize),
1009 self.p(13usize),
1010 self.p(14usize),
1011 self.p(15usize),
1012 ],
1013 };
1014 defmt::write!(f, "{}", proxy)
1015 }
1016 }
1017 #[doc = "privilege control register"]
1018 #[repr(transparent)]
1019 #[derive(Copy, Clone, Eq, PartialEq)]
1020 pub struct Privcfgr(pub u32);
1021 impl Privcfgr {
1022 #[doc = "secure functions privilege configuration This bit is set and reset by software. It can be written only by a secure privileged access."]
1023 #[inline(always)]
1024 pub const fn spriv(&self) -> bool {
1025 let val = (self.0 >> 0usize) & 0x01;
1026 val != 0
1027 }
1028 #[doc = "secure functions privilege configuration This bit is set and reset by software. It can be written only by a secure privileged access."]
1029 #[inline(always)]
1030 pub fn set_spriv(&mut self, val: bool) {
1031 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
1032 }
1033 #[doc = "non-secure functions privilege configuration This bit is set and reset by software. It can be written only by privileged access, secure or non-secure."]
1034 #[inline(always)]
1035 pub const fn nspriv(&self) -> bool {
1036 let val = (self.0 >> 1usize) & 0x01;
1037 val != 0
1038 }
1039 #[doc = "non-secure functions privilege configuration This bit is set and reset by software. It can be written only by privileged access, secure or non-secure."]
1040 #[inline(always)]
1041 pub fn set_nspriv(&mut self, val: bool) {
1042 self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
1043 }
1044 }
1045 impl Default for Privcfgr {
1046 #[inline(always)]
1047 fn default() -> Privcfgr {
1048 Privcfgr(0)
1049 }
1050 }
1051 impl core::fmt::Debug for Privcfgr {
1052 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1053 f.debug_struct("Privcfgr")
1054 .field("spriv", &self.spriv())
1055 .field("nspriv", &self.nspriv())
1056 .finish()
1057 }
1058 }
1059 #[cfg(feature = "defmt")]
1060 impl defmt::Format for Privcfgr {
1061 fn format(&self, f: defmt::Formatter) {
1062 #[derive(defmt :: Format)]
1063 struct Privcfgr {
1064 spriv: bool,
1065 nspriv: bool,
1066 }
1067 let proxy = Privcfgr {
1068 spriv: self.spriv(),
1069 nspriv: self.nspriv(),
1070 };
1071 defmt::write!(f, "{}", proxy)
1072 }
1073 }
1074 #[doc = "security configuration register"]
1075 #[repr(transparent)]
1076 #[derive(Copy, Clone, Eq, PartialEq)]
1077 pub struct Seccfgr(pub u32);
1078 impl Seccfgr {
1079 #[doc = "WUP1 secure protection"]
1080 #[inline(always)]
1081 pub const fn wup1sec(&self, n: usize) -> bool {
1082 assert!(n < 8usize);
1083 let offs = 0usize + n * 1usize;
1084 let val = (self.0 >> offs) & 0x01;
1085 val != 0
1086 }
1087 #[doc = "WUP1 secure protection"]
1088 #[inline(always)]
1089 pub fn set_wup1sec(&mut self, n: usize, val: bool) {
1090 assert!(n < 8usize);
1091 let offs = 0usize + n * 1usize;
1092 self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs);
1093 }
1094 #[doc = "Low-power modes secure protection"]
1095 #[inline(always)]
1096 pub const fn lpmsec(&self) -> bool {
1097 let val = (self.0 >> 12usize) & 0x01;
1098 val != 0
1099 }
1100 #[doc = "Low-power modes secure protection"]
1101 #[inline(always)]
1102 pub fn set_lpmsec(&mut self, val: bool) {
1103 self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize);
1104 }
1105 #[doc = "Voltage detection and monitoring secure protection"]
1106 #[inline(always)]
1107 pub const fn vdmsec(&self) -> bool {
1108 let val = (self.0 >> 13usize) & 0x01;
1109 val != 0
1110 }
1111 #[doc = "Voltage detection and monitoring secure protection"]
1112 #[inline(always)]
1113 pub fn set_vdmsec(&mut self, val: bool) {
1114 self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize);
1115 }
1116 #[doc = "Backup domain secure protection"]
1117 #[inline(always)]
1118 pub const fn vbsec(&self) -> bool {
1119 let val = (self.0 >> 14usize) & 0x01;
1120 val != 0
1121 }
1122 #[doc = "Backup domain secure protection"]
1123 #[inline(always)]
1124 pub fn set_vbsec(&mut self, val: bool) {
1125 self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize);
1126 }
1127 #[doc = "Pull-up/pull-down secure protection"]
1128 #[inline(always)]
1129 pub const fn apcsec(&self) -> bool {
1130 let val = (self.0 >> 15usize) & 0x01;
1131 val != 0
1132 }
1133 #[doc = "Pull-up/pull-down secure protection"]
1134 #[inline(always)]
1135 pub fn set_apcsec(&mut self, val: bool) {
1136 self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize);
1137 }
1138 }
1139 impl Default for Seccfgr {
1140 #[inline(always)]
1141 fn default() -> Seccfgr {
1142 Seccfgr(0)
1143 }
1144 }
1145 impl core::fmt::Debug for Seccfgr {
1146 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1147 f.debug_struct("Seccfgr")
1148 .field(
1149 "wup1sec",
1150 &[
1151 self.wup1sec(0usize),
1152 self.wup1sec(1usize),
1153 self.wup1sec(2usize),
1154 self.wup1sec(3usize),
1155 self.wup1sec(4usize),
1156 self.wup1sec(5usize),
1157 self.wup1sec(6usize),
1158 self.wup1sec(7usize),
1159 ],
1160 )
1161 .field("lpmsec", &self.lpmsec())
1162 .field("vdmsec", &self.vdmsec())
1163 .field("vbsec", &self.vbsec())
1164 .field("apcsec", &self.apcsec())
1165 .finish()
1166 }
1167 }
1168 #[cfg(feature = "defmt")]
1169 impl defmt::Format for Seccfgr {
1170 fn format(&self, f: defmt::Formatter) {
1171 #[derive(defmt :: Format)]
1172 struct Seccfgr {
1173 wup1sec: [bool; 8usize],
1174 lpmsec: bool,
1175 vdmsec: bool,
1176 vbsec: bool,
1177 apcsec: bool,
1178 }
1179 let proxy = Seccfgr {
1180 wup1sec: [
1181 self.wup1sec(0usize),
1182 self.wup1sec(1usize),
1183 self.wup1sec(2usize),
1184 self.wup1sec(3usize),
1185 self.wup1sec(4usize),
1186 self.wup1sec(5usize),
1187 self.wup1sec(6usize),
1188 self.wup1sec(7usize),
1189 ],
1190 lpmsec: self.lpmsec(),
1191 vdmsec: self.vdmsec(),
1192 vbsec: self.vbsec(),
1193 apcsec: self.apcsec(),
1194 };
1195 defmt::write!(f, "{}", proxy)
1196 }
1197 }
1198 #[doc = "status register"]
1199 #[repr(transparent)]
1200 #[derive(Copy, Clone, Eq, PartialEq)]
1201 pub struct Sr(pub u32);
1202 impl Sr {
1203 #[doc = "Clear Stop and Standby flags This bit is protected against non-secure access when LPMSEC=1 in SECCFGR. This bit is protected against unprivileged access when LPMSEC=1 and SPRIV=1 in PRIVCFGR, or when LPMSEC=0 and NSPRIV=1. Writing 1 to this bit clears the STOPF and SBF flags."]
1204 #[inline(always)]
1205 pub const fn cssf(&self) -> bool {
1206 let val = (self.0 >> 0usize) & 0x01;
1207 val != 0
1208 }
1209 #[doc = "Clear Stop and Standby flags This bit is protected against non-secure access when LPMSEC=1 in SECCFGR. This bit is protected against unprivileged access when LPMSEC=1 and SPRIV=1 in PRIVCFGR, or when LPMSEC=0 and NSPRIV=1. Writing 1 to this bit clears the STOPF and SBF flags."]
1210 #[inline(always)]
1211 pub fn set_cssf(&mut self, val: bool) {
1212 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
1213 }
1214 #[doc = "Stop flag This bit is set by hardware when the device enters a Stop mode, and is cleared by software by writing 1 to the CSSF bit."]
1215 #[inline(always)]
1216 pub const fn stopf(&self) -> bool {
1217 let val = (self.0 >> 1usize) & 0x01;
1218 val != 0
1219 }
1220 #[doc = "Stop flag This bit is set by hardware when the device enters a Stop mode, and is cleared by software by writing 1 to the CSSF bit."]
1221 #[inline(always)]
1222 pub fn set_stopf(&mut self, val: bool) {
1223 self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
1224 }
1225 #[doc = "Standby flag This bit is set by hardware when the device enters the Standby mode, and is cleared by writing 1 to the CSSF bit, or by a power-on reset. It is not cleared by the system reset."]
1226 #[inline(always)]
1227 pub const fn sbf(&self) -> bool {
1228 let val = (self.0 >> 2usize) & 0x01;
1229 val != 0
1230 }
1231 #[doc = "Standby flag This bit is set by hardware when the device enters the Standby mode, and is cleared by writing 1 to the CSSF bit, or by a power-on reset. It is not cleared by the system reset."]
1232 #[inline(always)]
1233 pub fn set_sbf(&mut self, val: bool) {
1234 self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
1235 }
1236 }
1237 impl Default for Sr {
1238 #[inline(always)]
1239 fn default() -> Sr {
1240 Sr(0)
1241 }
1242 }
1243 impl core::fmt::Debug for Sr {
1244 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1245 f.debug_struct("Sr")
1246 .field("cssf", &self.cssf())
1247 .field("stopf", &self.stopf())
1248 .field("sbf", &self.sbf())
1249 .finish()
1250 }
1251 }
1252 #[cfg(feature = "defmt")]
1253 impl defmt::Format for Sr {
1254 fn format(&self, f: defmt::Formatter) {
1255 #[derive(defmt :: Format)]
1256 struct Sr {
1257 cssf: bool,
1258 stopf: bool,
1259 sbf: bool,
1260 }
1261 let proxy = Sr {
1262 cssf: self.cssf(),
1263 stopf: self.stopf(),
1264 sbf: self.sbf(),
1265 };
1266 defmt::write!(f, "{}", proxy)
1267 }
1268 }
1269 #[doc = "supply voltage monitoring control register"]
1270 #[repr(transparent)]
1271 #[derive(Copy, Clone, Eq, PartialEq)]
1272 pub struct Svmcr(pub u32);
1273 impl Svmcr {
1274 #[doc = "Power voltage detector enable"]
1275 #[inline(always)]
1276 pub const fn pvde(&self) -> bool {
1277 let val = (self.0 >> 4usize) & 0x01;
1278 val != 0
1279 }
1280 #[doc = "Power voltage detector enable"]
1281 #[inline(always)]
1282 pub fn set_pvde(&mut self, val: bool) {
1283 self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
1284 }
1285 #[doc = "Power voltage detector level selection These bits select the voltage threshold detected by the power voltage detector:"]
1286 #[inline(always)]
1287 pub const fn pvdls(&self) -> super::vals::Pvdls {
1288 let val = (self.0 >> 5usize) & 0x07;
1289 super::vals::Pvdls::from_bits(val as u8)
1290 }
1291 #[doc = "Power voltage detector level selection These bits select the voltage threshold detected by the power voltage detector:"]
1292 #[inline(always)]
1293 pub fn set_pvdls(&mut self, val: super::vals::Pvdls) {
1294 self.0 = (self.0 & !(0x07 << 5usize)) | (((val.to_bits() as u32) & 0x07) << 5usize);
1295 }
1296 #[doc = "VDDUSB independent USB voltage monitor enable"]
1297 #[inline(always)]
1298 pub const fn uvmen(&self) -> bool {
1299 let val = (self.0 >> 24usize) & 0x01;
1300 val != 0
1301 }
1302 #[doc = "VDDUSB independent USB voltage monitor enable"]
1303 #[inline(always)]
1304 pub fn set_uvmen(&mut self, val: bool) {
1305 self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize);
1306 }
1307 #[doc = "VDDIO2 independent I/Os voltage monitor enable"]
1308 #[inline(always)]
1309 pub const fn io2vmen(&self) -> bool {
1310 let val = (self.0 >> 25usize) & 0x01;
1311 val != 0
1312 }
1313 #[doc = "VDDIO2 independent I/Os voltage monitor enable"]
1314 #[inline(always)]
1315 pub fn set_io2vmen(&mut self, val: bool) {
1316 self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize);
1317 }
1318 #[doc = "VDDA independent analog supply voltage monitor 1 enable (1.6V threshold)"]
1319 #[inline(always)]
1320 pub const fn avm1en(&self) -> bool {
1321 let val = (self.0 >> 26usize) & 0x01;
1322 val != 0
1323 }
1324 #[doc = "VDDA independent analog supply voltage monitor 1 enable (1.6V threshold)"]
1325 #[inline(always)]
1326 pub fn set_avm1en(&mut self, val: bool) {
1327 self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize);
1328 }
1329 #[doc = "VDDA independent analog supply voltage monitor 2 enable (1.8V threshold)"]
1330 #[inline(always)]
1331 pub const fn avm2en(&self) -> bool {
1332 let val = (self.0 >> 27usize) & 0x01;
1333 val != 0
1334 }
1335 #[doc = "VDDA independent analog supply voltage monitor 2 enable (1.8V threshold)"]
1336 #[inline(always)]
1337 pub fn set_avm2en(&mut self, val: bool) {
1338 self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize);
1339 }
1340 #[doc = "VDDUSB independent USB supply valid"]
1341 #[inline(always)]
1342 pub const fn usv(&self) -> bool {
1343 let val = (self.0 >> 28usize) & 0x01;
1344 val != 0
1345 }
1346 #[doc = "VDDUSB independent USB supply valid"]
1347 #[inline(always)]
1348 pub fn set_usv(&mut self, val: bool) {
1349 self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize);
1350 }
1351 #[doc = "VDDIO2 independent I/Os supply valid This bit is used to validate the VDDIO2 supply for electrical and logical isolation purpose. Setting this bit is mandatory to use PG\\[15:2\\]. If VDDIO2 is not always present in the application, the VDDIO2 voltage monitor can be used to determine whether this supply is ready or not."]
1352 #[inline(always)]
1353 pub const fn io2sv(&self) -> bool {
1354 let val = (self.0 >> 29usize) & 0x01;
1355 val != 0
1356 }
1357 #[doc = "VDDIO2 independent I/Os supply valid This bit is used to validate the VDDIO2 supply for electrical and logical isolation purpose. Setting this bit is mandatory to use PG\\[15:2\\]. If VDDIO2 is not always present in the application, the VDDIO2 voltage monitor can be used to determine whether this supply is ready or not."]
1358 #[inline(always)]
1359 pub fn set_io2sv(&mut self, val: bool) {
1360 self.0 = (self.0 & !(0x01 << 29usize)) | (((val as u32) & 0x01) << 29usize);
1361 }
1362 #[doc = "VDDA independent analog supply valid"]
1363 #[inline(always)]
1364 pub const fn asv(&self) -> bool {
1365 let val = (self.0 >> 30usize) & 0x01;
1366 val != 0
1367 }
1368 #[doc = "VDDA independent analog supply valid"]
1369 #[inline(always)]
1370 pub fn set_asv(&mut self, val: bool) {
1371 self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize);
1372 }
1373 }
1374 impl Default for Svmcr {
1375 #[inline(always)]
1376 fn default() -> Svmcr {
1377 Svmcr(0)
1378 }
1379 }
1380 impl core::fmt::Debug for Svmcr {
1381 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1382 f.debug_struct("Svmcr")
1383 .field("pvde", &self.pvde())
1384 .field("pvdls", &self.pvdls())
1385 .field("uvmen", &self.uvmen())
1386 .field("io2vmen", &self.io2vmen())
1387 .field("avm1en", &self.avm1en())
1388 .field("avm2en", &self.avm2en())
1389 .field("usv", &self.usv())
1390 .field("io2sv", &self.io2sv())
1391 .field("asv", &self.asv())
1392 .finish()
1393 }
1394 }
1395 #[cfg(feature = "defmt")]
1396 impl defmt::Format for Svmcr {
1397 fn format(&self, f: defmt::Formatter) {
1398 #[derive(defmt :: Format)]
1399 struct Svmcr {
1400 pvde: bool,
1401 pvdls: super::vals::Pvdls,
1402 uvmen: bool,
1403 io2vmen: bool,
1404 avm1en: bool,
1405 avm2en: bool,
1406 usv: bool,
1407 io2sv: bool,
1408 asv: bool,
1409 }
1410 let proxy = Svmcr {
1411 pvde: self.pvde(),
1412 pvdls: self.pvdls(),
1413 uvmen: self.uvmen(),
1414 io2vmen: self.io2vmen(),
1415 avm1en: self.avm1en(),
1416 avm2en: self.avm2en(),
1417 usv: self.usv(),
1418 io2sv: self.io2sv(),
1419 asv: self.asv(),
1420 };
1421 defmt::write!(f, "{}", proxy)
1422 }
1423 }
1424 #[repr(transparent)]
1425 #[derive(Copy, Clone, Eq, PartialEq)]
1426 pub struct Svmsr(pub u32);
1427 impl Svmsr {
1428 #[doc = "Regulator selection"]
1429 #[inline(always)]
1430 pub const fn regs(&self) -> super::vals::Regsel {
1431 let val = (self.0 >> 1usize) & 0x01;
1432 super::vals::Regsel::from_bits(val as u8)
1433 }
1434 #[doc = "Regulator selection"]
1435 #[inline(always)]
1436 pub fn set_regs(&mut self, val: super::vals::Regsel) {
1437 self.0 = (self.0 & !(0x01 << 1usize)) | (((val.to_bits() as u32) & 0x01) << 1usize);
1438 }
1439 #[doc = "VDD voltage detector output"]
1440 #[inline(always)]
1441 pub const fn pvdo(&self) -> super::vals::Pvdo {
1442 let val = (self.0 >> 4usize) & 0x01;
1443 super::vals::Pvdo::from_bits(val as u8)
1444 }
1445 #[doc = "VDD voltage detector output"]
1446 #[inline(always)]
1447 pub fn set_pvdo(&mut self, val: super::vals::Pvdo) {
1448 self.0 = (self.0 & !(0x01 << 4usize)) | (((val.to_bits() as u32) & 0x01) << 4usize);
1449 }
1450 #[doc = "Voltage level ready for currently used VOS"]
1451 #[inline(always)]
1452 pub const fn actvosrdy(&self) -> bool {
1453 let val = (self.0 >> 15usize) & 0x01;
1454 val != 0
1455 }
1456 #[doc = "Voltage level ready for currently used VOS"]
1457 #[inline(always)]
1458 pub fn set_actvosrdy(&mut self, val: bool) {
1459 self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize);
1460 }
1461 #[doc = "VOS currently applied to VCORE This field provides the last VOS value."]
1462 #[inline(always)]
1463 pub const fn actvos(&self) -> super::vals::Actvos {
1464 let val = (self.0 >> 16usize) & 0x03;
1465 super::vals::Actvos::from_bits(val as u8)
1466 }
1467 #[doc = "VOS currently applied to VCORE This field provides the last VOS value."]
1468 #[inline(always)]
1469 pub fn set_actvos(&mut self, val: super::vals::Actvos) {
1470 self.0 = (self.0 & !(0x03 << 16usize)) | (((val.to_bits() as u32) & 0x03) << 16usize);
1471 }
1472 #[doc = "VDDUSB ready"]
1473 #[inline(always)]
1474 pub const fn vddusbrdy(&self) -> bool {
1475 let val = (self.0 >> 24usize) & 0x01;
1476 val != 0
1477 }
1478 #[doc = "VDDUSB ready"]
1479 #[inline(always)]
1480 pub fn set_vddusbrdy(&mut self, val: bool) {
1481 self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize);
1482 }
1483 #[doc = "VDDIO2 ready"]
1484 #[inline(always)]
1485 pub const fn vddio2rdy(&self) -> bool {
1486 let val = (self.0 >> 25usize) & 0x01;
1487 val != 0
1488 }
1489 #[doc = "VDDIO2 ready"]
1490 #[inline(always)]
1491 pub fn set_vddio2rdy(&mut self, val: bool) {
1492 self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize);
1493 }
1494 #[doc = "VDDA ready versus 1.6V voltage monitor"]
1495 #[inline(always)]
1496 pub const fn vdda1rdy(&self) -> bool {
1497 let val = (self.0 >> 26usize) & 0x01;
1498 val != 0
1499 }
1500 #[doc = "VDDA ready versus 1.6V voltage monitor"]
1501 #[inline(always)]
1502 pub fn set_vdda1rdy(&mut self, val: bool) {
1503 self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize);
1504 }
1505 #[doc = "VDDA ready versus 1.8V voltage monitor"]
1506 #[inline(always)]
1507 pub const fn vdda2rdy(&self) -> bool {
1508 let val = (self.0 >> 27usize) & 0x01;
1509 val != 0
1510 }
1511 #[doc = "VDDA ready versus 1.8V voltage monitor"]
1512 #[inline(always)]
1513 pub fn set_vdda2rdy(&mut self, val: bool) {
1514 self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize);
1515 }
1516 }
1517 impl Default for Svmsr {
1518 #[inline(always)]
1519 fn default() -> Svmsr {
1520 Svmsr(0)
1521 }
1522 }
1523 impl core::fmt::Debug for Svmsr {
1524 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1525 f.debug_struct("Svmsr")
1526 .field("regs", &self.regs())
1527 .field("pvdo", &self.pvdo())
1528 .field("actvosrdy", &self.actvosrdy())
1529 .field("actvos", &self.actvos())
1530 .field("vddusbrdy", &self.vddusbrdy())
1531 .field("vddio2rdy", &self.vddio2rdy())
1532 .field("vdda1rdy", &self.vdda1rdy())
1533 .field("vdda2rdy", &self.vdda2rdy())
1534 .finish()
1535 }
1536 }
1537 #[cfg(feature = "defmt")]
1538 impl defmt::Format for Svmsr {
1539 fn format(&self, f: defmt::Formatter) {
1540 #[derive(defmt :: Format)]
1541 struct Svmsr {
1542 regs: super::vals::Regsel,
1543 pvdo: super::vals::Pvdo,
1544 actvosrdy: bool,
1545 actvos: super::vals::Actvos,
1546 vddusbrdy: bool,
1547 vddio2rdy: bool,
1548 vdda1rdy: bool,
1549 vdda2rdy: bool,
1550 }
1551 let proxy = Svmsr {
1552 regs: self.regs(),
1553 pvdo: self.pvdo(),
1554 actvosrdy: self.actvosrdy(),
1555 actvos: self.actvos(),
1556 vddusbrdy: self.vddusbrdy(),
1557 vddio2rdy: self.vddio2rdy(),
1558 vdda1rdy: self.vdda1rdy(),
1559 vdda2rdy: self.vdda2rdy(),
1560 };
1561 defmt::write!(f, "{}", proxy)
1562 }
1563 }
1564 #[doc = "USB Type-C™ and Power Delivery register"]
1565 #[repr(transparent)]
1566 #[derive(Copy, Clone, Eq, PartialEq)]
1567 pub struct Ucpdr(pub u32);
1568 impl Ucpdr {
1569 #[doc = "UCPD dead battery disable After exiting reset, the USB Type-C “dead battery” behavior is enabled, which may have a pull-down effect on CC1 and CC2 pins. It is recommended to disable it in all cases, either to stop this pull-down or to handover control to the UCPD (the UCPD must be initialized before doing the disable)."]
1570 #[inline(always)]
1571 pub const fn ucpd_dbdis(&self) -> bool {
1572 let val = (self.0 >> 0usize) & 0x01;
1573 val != 0
1574 }
1575 #[doc = "UCPD dead battery disable After exiting reset, the USB Type-C “dead battery” behavior is enabled, which may have a pull-down effect on CC1 and CC2 pins. It is recommended to disable it in all cases, either to stop this pull-down or to handover control to the UCPD (the UCPD must be initialized before doing the disable)."]
1576 #[inline(always)]
1577 pub fn set_ucpd_dbdis(&mut self, val: bool) {
1578 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
1579 }
1580 #[doc = "UCPD Standby mode When set, this bit is used to memorize the UCPD configuration in Standby mode. This bit must be written to 1 just before entering Standby mode when using UCPD. It must be written to 0 after exiting the Standby mode and before writing any UCPD registers."]
1581 #[inline(always)]
1582 pub const fn ucpd_stby(&self) -> bool {
1583 let val = (self.0 >> 1usize) & 0x01;
1584 val != 0
1585 }
1586 #[doc = "UCPD Standby mode When set, this bit is used to memorize the UCPD configuration in Standby mode. This bit must be written to 1 just before entering Standby mode when using UCPD. It must be written to 0 after exiting the Standby mode and before writing any UCPD registers."]
1587 #[inline(always)]
1588 pub fn set_ucpd_stby(&mut self, val: bool) {
1589 self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
1590 }
1591 }
1592 impl Default for Ucpdr {
1593 #[inline(always)]
1594 fn default() -> Ucpdr {
1595 Ucpdr(0)
1596 }
1597 }
1598 impl core::fmt::Debug for Ucpdr {
1599 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1600 f.debug_struct("Ucpdr")
1601 .field("ucpd_dbdis", &self.ucpd_dbdis())
1602 .field("ucpd_stby", &self.ucpd_stby())
1603 .finish()
1604 }
1605 }
1606 #[cfg(feature = "defmt")]
1607 impl defmt::Format for Ucpdr {
1608 fn format(&self, f: defmt::Formatter) {
1609 #[derive(defmt :: Format)]
1610 struct Ucpdr {
1611 ucpd_dbdis: bool,
1612 ucpd_stby: bool,
1613 }
1614 let proxy = Ucpdr {
1615 ucpd_dbdis: self.ucpd_dbdis(),
1616 ucpd_stby: self.ucpd_stby(),
1617 };
1618 defmt::write!(f, "{}", proxy)
1619 }
1620 }
1621 #[doc = "voltage scaling register"]
1622 #[repr(transparent)]
1623 #[derive(Copy, Clone, Eq, PartialEq)]
1624 pub struct Vosr(pub u32);
1625 impl Vosr {
1626 #[doc = "OTG_HS EPOD booster ready This bit is set to one by hardware when the power booster startup time is reached. The OTG_HS clock can be provided only after this bit is set."]
1627 #[inline(always)]
1628 pub const fn usbboostrdy(&self) -> bool {
1629 let val = (self.0 >> 13usize) & 0x01;
1630 val != 0
1631 }
1632 #[doc = "OTG_HS EPOD booster ready This bit is set to one by hardware when the power booster startup time is reached. The OTG_HS clock can be provided only after this bit is set."]
1633 #[inline(always)]
1634 pub fn set_usbboostrdy(&mut self, val: bool) {
1635 self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize);
1636 }
1637 #[doc = "EPOD booster ready This bit is set to 1 by hardware when the power booster startup time is reached. The system clock frequency can be switched higher than 50 MHz only after this bit is set."]
1638 #[inline(always)]
1639 pub const fn boostrdy(&self) -> bool {
1640 let val = (self.0 >> 14usize) & 0x01;
1641 val != 0
1642 }
1643 #[doc = "EPOD booster ready This bit is set to 1 by hardware when the power booster startup time is reached. The system clock frequency can be switched higher than 50 MHz only after this bit is set."]
1644 #[inline(always)]
1645 pub fn set_boostrdy(&mut self, val: bool) {
1646 self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize);
1647 }
1648 #[doc = "Ready bit for VCORE voltage scaling output selection"]
1649 #[inline(always)]
1650 pub const fn vosrdy(&self) -> bool {
1651 let val = (self.0 >> 15usize) & 0x01;
1652 val != 0
1653 }
1654 #[doc = "Ready bit for VCORE voltage scaling output selection"]
1655 #[inline(always)]
1656 pub fn set_vosrdy(&mut self, val: bool) {
1657 self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize);
1658 }
1659 #[doc = "Voltage scaling range selection This field is protected against non-secure access when SYSCLKSEC=1 in RCC_SECCFGR. It is protected against unprivileged access when SYSCLKSEC=1 in RCC_SECCFGR and SPRIV=1 in PRIVCFGR, or when SYSCLKSEC=0 and NSPRIV=1."]
1660 #[inline(always)]
1661 pub const fn vos(&self) -> super::vals::Vos {
1662 let val = (self.0 >> 16usize) & 0x03;
1663 super::vals::Vos::from_bits(val as u8)
1664 }
1665 #[doc = "Voltage scaling range selection This field is protected against non-secure access when SYSCLKSEC=1 in RCC_SECCFGR. It is protected against unprivileged access when SYSCLKSEC=1 in RCC_SECCFGR and SPRIV=1 in PRIVCFGR, or when SYSCLKSEC=0 and NSPRIV=1."]
1666 #[inline(always)]
1667 pub fn set_vos(&mut self, val: super::vals::Vos) {
1668 self.0 = (self.0 & !(0x03 << 16usize)) | (((val.to_bits() as u32) & 0x03) << 16usize);
1669 }
1670 #[doc = "EPOD booster enable"]
1671 #[inline(always)]
1672 pub const fn boosten(&self) -> bool {
1673 let val = (self.0 >> 18usize) & 0x01;
1674 val != 0
1675 }
1676 #[doc = "EPOD booster enable"]
1677 #[inline(always)]
1678 pub fn set_boosten(&mut self, val: bool) {
1679 self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize);
1680 }
1681 #[doc = "OTG_HS power enable"]
1682 #[inline(always)]
1683 pub const fn usbpwren(&self) -> bool {
1684 let val = (self.0 >> 19usize) & 0x01;
1685 val != 0
1686 }
1687 #[doc = "OTG_HS power enable"]
1688 #[inline(always)]
1689 pub fn set_usbpwren(&mut self, val: bool) {
1690 self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize);
1691 }
1692 #[doc = "OTG_HS EPOD booster enable"]
1693 #[inline(always)]
1694 pub const fn usbboosten(&self) -> bool {
1695 let val = (self.0 >> 20usize) & 0x01;
1696 val != 0
1697 }
1698 #[doc = "OTG_HS EPOD booster enable"]
1699 #[inline(always)]
1700 pub fn set_usbboosten(&mut self, val: bool) {
1701 self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize);
1702 }
1703 #[doc = "OTG_HS VDD11USB disable"]
1704 #[inline(always)]
1705 pub const fn vdd11usbdis(&self) -> bool {
1706 let val = (self.0 >> 21usize) & 0x01;
1707 val != 0
1708 }
1709 #[doc = "OTG_HS VDD11USB disable"]
1710 #[inline(always)]
1711 pub fn set_vdd11usbdis(&mut self, val: bool) {
1712 self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize);
1713 }
1714 }
1715 impl Default for Vosr {
1716 #[inline(always)]
1717 fn default() -> Vosr {
1718 Vosr(0)
1719 }
1720 }
1721 impl core::fmt::Debug for Vosr {
1722 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1723 f.debug_struct("Vosr")
1724 .field("usbboostrdy", &self.usbboostrdy())
1725 .field("boostrdy", &self.boostrdy())
1726 .field("vosrdy", &self.vosrdy())
1727 .field("vos", &self.vos())
1728 .field("boosten", &self.boosten())
1729 .field("usbpwren", &self.usbpwren())
1730 .field("usbboosten", &self.usbboosten())
1731 .field("vdd11usbdis", &self.vdd11usbdis())
1732 .finish()
1733 }
1734 }
1735 #[cfg(feature = "defmt")]
1736 impl defmt::Format for Vosr {
1737 fn format(&self, f: defmt::Formatter) {
1738 #[derive(defmt :: Format)]
1739 struct Vosr {
1740 usbboostrdy: bool,
1741 boostrdy: bool,
1742 vosrdy: bool,
1743 vos: super::vals::Vos,
1744 boosten: bool,
1745 usbpwren: bool,
1746 usbboosten: bool,
1747 vdd11usbdis: bool,
1748 }
1749 let proxy = Vosr {
1750 usbboostrdy: self.usbboostrdy(),
1751 boostrdy: self.boostrdy(),
1752 vosrdy: self.vosrdy(),
1753 vos: self.vos(),
1754 boosten: self.boosten(),
1755 usbpwren: self.usbpwren(),
1756 usbboosten: self.usbboosten(),
1757 vdd11usbdis: self.vdd11usbdis(),
1758 };
1759 defmt::write!(f, "{}", proxy)
1760 }
1761 }
1762 #[doc = "wakeup control register 1"]
1763 #[repr(transparent)]
1764 #[derive(Copy, Clone, Eq, PartialEq)]
1765 pub struct Wucr1(pub u32);
1766 impl Wucr1 {
1767 #[doc = "Wakeup pin WKUP1 enable"]
1768 #[inline(always)]
1769 pub const fn wupen(&self, n: usize) -> bool {
1770 assert!(n < 8usize);
1771 let offs = 0usize + n * 1usize;
1772 let val = (self.0 >> offs) & 0x01;
1773 val != 0
1774 }
1775 #[doc = "Wakeup pin WKUP1 enable"]
1776 #[inline(always)]
1777 pub fn set_wupen(&mut self, n: usize, val: bool) {
1778 assert!(n < 8usize);
1779 let offs = 0usize + n * 1usize;
1780 self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs);
1781 }
1782 }
1783 impl Default for Wucr1 {
1784 #[inline(always)]
1785 fn default() -> Wucr1 {
1786 Wucr1(0)
1787 }
1788 }
1789 impl core::fmt::Debug for Wucr1 {
1790 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1791 f.debug_struct("Wucr1")
1792 .field(
1793 "wupen",
1794 &[
1795 self.wupen(0usize),
1796 self.wupen(1usize),
1797 self.wupen(2usize),
1798 self.wupen(3usize),
1799 self.wupen(4usize),
1800 self.wupen(5usize),
1801 self.wupen(6usize),
1802 self.wupen(7usize),
1803 ],
1804 )
1805 .finish()
1806 }
1807 }
1808 #[cfg(feature = "defmt")]
1809 impl defmt::Format for Wucr1 {
1810 fn format(&self, f: defmt::Formatter) {
1811 #[derive(defmt :: Format)]
1812 struct Wucr1 {
1813 wupen: [bool; 8usize],
1814 }
1815 let proxy = Wucr1 {
1816 wupen: [
1817 self.wupen(0usize),
1818 self.wupen(1usize),
1819 self.wupen(2usize),
1820 self.wupen(3usize),
1821 self.wupen(4usize),
1822 self.wupen(5usize),
1823 self.wupen(6usize),
1824 self.wupen(7usize),
1825 ],
1826 };
1827 defmt::write!(f, "{}", proxy)
1828 }
1829 }
1830 #[doc = "wakeup control register 2"]
1831 #[repr(transparent)]
1832 #[derive(Copy, Clone, Eq, PartialEq)]
1833 pub struct Wucr2(pub u32);
1834 impl Wucr2 {
1835 #[doc = "Wakeup pin WKUP1 polarity. This bit must be configured when WUPEN1 = 0."]
1836 #[inline(always)]
1837 pub const fn wupp(&self, n: usize) -> super::vals::Wupp {
1838 assert!(n < 8usize);
1839 let offs = 0usize + n * 1usize;
1840 let val = (self.0 >> offs) & 0x01;
1841 super::vals::Wupp::from_bits(val as u8)
1842 }
1843 #[doc = "Wakeup pin WKUP1 polarity. This bit must be configured when WUPEN1 = 0."]
1844 #[inline(always)]
1845 pub fn set_wupp(&mut self, n: usize, val: super::vals::Wupp) {
1846 assert!(n < 8usize);
1847 let offs = 0usize + n * 1usize;
1848 self.0 = (self.0 & !(0x01 << offs)) | (((val.to_bits() as u32) & 0x01) << offs);
1849 }
1850 }
1851 impl Default for Wucr2 {
1852 #[inline(always)]
1853 fn default() -> Wucr2 {
1854 Wucr2(0)
1855 }
1856 }
1857 impl core::fmt::Debug for Wucr2 {
1858 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1859 f.debug_struct("Wucr2")
1860 .field(
1861 "wupp",
1862 &[
1863 self.wupp(0usize),
1864 self.wupp(1usize),
1865 self.wupp(2usize),
1866 self.wupp(3usize),
1867 self.wupp(4usize),
1868 self.wupp(5usize),
1869 self.wupp(6usize),
1870 self.wupp(7usize),
1871 ],
1872 )
1873 .finish()
1874 }
1875 }
1876 #[cfg(feature = "defmt")]
1877 impl defmt::Format for Wucr2 {
1878 fn format(&self, f: defmt::Formatter) {
1879 #[derive(defmt :: Format)]
1880 struct Wucr2 {
1881 wupp: [super::vals::Wupp; 8usize],
1882 }
1883 let proxy = Wucr2 {
1884 wupp: [
1885 self.wupp(0usize),
1886 self.wupp(1usize),
1887 self.wupp(2usize),
1888 self.wupp(3usize),
1889 self.wupp(4usize),
1890 self.wupp(5usize),
1891 self.wupp(6usize),
1892 self.wupp(7usize),
1893 ],
1894 };
1895 defmt::write!(f, "{}", proxy)
1896 }
1897 }
1898 #[doc = "wakeup control register 3"]
1899 #[repr(transparent)]
1900 #[derive(Copy, Clone, Eq, PartialEq)]
1901 pub struct Wucr3(pub u32);
1902 impl Wucr3 {
1903 #[doc = "Wakeup pin WKUP1 selection This field must be configured when WUPEN1 = 0."]
1904 #[inline(always)]
1905 pub const fn wusel1(&self) -> super::vals::Wusel {
1906 let val = (self.0 >> 0usize) & 0x03;
1907 super::vals::Wusel::from_bits(val as u8)
1908 }
1909 #[doc = "Wakeup pin WKUP1 selection This field must be configured when WUPEN1 = 0."]
1910 #[inline(always)]
1911 pub fn set_wusel1(&mut self, val: super::vals::Wusel) {
1912 self.0 = (self.0 & !(0x03 << 0usize)) | (((val.to_bits() as u32) & 0x03) << 0usize);
1913 }
1914 #[doc = "Wakeup pin WKUP2 selection This field must be configured when WUPEN2 = 0."]
1915 #[inline(always)]
1916 pub const fn wusel2(&self) -> super::vals::Wusel {
1917 let val = (self.0 >> 2usize) & 0x03;
1918 super::vals::Wusel::from_bits(val as u8)
1919 }
1920 #[doc = "Wakeup pin WKUP2 selection This field must be configured when WUPEN2 = 0."]
1921 #[inline(always)]
1922 pub fn set_wusel2(&mut self, val: super::vals::Wusel) {
1923 self.0 = (self.0 & !(0x03 << 2usize)) | (((val.to_bits() as u32) & 0x03) << 2usize);
1924 }
1925 #[doc = "Wakeup pin WKUP3 selection This field must be configured when WUPEN3 = 0."]
1926 #[inline(always)]
1927 pub const fn wusel3(&self) -> super::vals::Wusel {
1928 let val = (self.0 >> 4usize) & 0x03;
1929 super::vals::Wusel::from_bits(val as u8)
1930 }
1931 #[doc = "Wakeup pin WKUP3 selection This field must be configured when WUPEN3 = 0."]
1932 #[inline(always)]
1933 pub fn set_wusel3(&mut self, val: super::vals::Wusel) {
1934 self.0 = (self.0 & !(0x03 << 4usize)) | (((val.to_bits() as u32) & 0x03) << 4usize);
1935 }
1936 #[doc = "Wakeup pin WKUP4 selection This field must be configured when WUPEN4 = 0."]
1937 #[inline(always)]
1938 pub const fn wusel4(&self) -> super::vals::Wusel {
1939 let val = (self.0 >> 6usize) & 0x03;
1940 super::vals::Wusel::from_bits(val as u8)
1941 }
1942 #[doc = "Wakeup pin WKUP4 selection This field must be configured when WUPEN4 = 0."]
1943 #[inline(always)]
1944 pub fn set_wusel4(&mut self, val: super::vals::Wusel) {
1945 self.0 = (self.0 & !(0x03 << 6usize)) | (((val.to_bits() as u32) & 0x03) << 6usize);
1946 }
1947 #[doc = "Wakeup pin WKUP5 selection This field must be configured when WUPEN5 = 0."]
1948 #[inline(always)]
1949 pub const fn wusel5(&self) -> super::vals::Wusel {
1950 let val = (self.0 >> 8usize) & 0x03;
1951 super::vals::Wusel::from_bits(val as u8)
1952 }
1953 #[doc = "Wakeup pin WKUP5 selection This field must be configured when WUPEN5 = 0."]
1954 #[inline(always)]
1955 pub fn set_wusel5(&mut self, val: super::vals::Wusel) {
1956 self.0 = (self.0 & !(0x03 << 8usize)) | (((val.to_bits() as u32) & 0x03) << 8usize);
1957 }
1958 #[doc = "Wakeup pin WKUP6 selection This field must be configured when WUPEN6 = 0."]
1959 #[inline(always)]
1960 pub const fn wusel6(&self) -> super::vals::Wusel {
1961 let val = (self.0 >> 10usize) & 0x03;
1962 super::vals::Wusel::from_bits(val as u8)
1963 }
1964 #[doc = "Wakeup pin WKUP6 selection This field must be configured when WUPEN6 = 0."]
1965 #[inline(always)]
1966 pub fn set_wusel6(&mut self, val: super::vals::Wusel) {
1967 self.0 = (self.0 & !(0x03 << 10usize)) | (((val.to_bits() as u32) & 0x03) << 10usize);
1968 }
1969 #[doc = "Wakeup pin WKUP7 selection This field must be configured when WUPEN7 = 0."]
1970 #[inline(always)]
1971 pub const fn wusel7(&self) -> super::vals::Wusel {
1972 let val = (self.0 >> 12usize) & 0x03;
1973 super::vals::Wusel::from_bits(val as u8)
1974 }
1975 #[doc = "Wakeup pin WKUP7 selection This field must be configured when WUPEN7 = 0."]
1976 #[inline(always)]
1977 pub fn set_wusel7(&mut self, val: super::vals::Wusel) {
1978 self.0 = (self.0 & !(0x03 << 12usize)) | (((val.to_bits() as u32) & 0x03) << 12usize);
1979 }
1980 #[doc = "Wakeup pin WKUP8 selection This field must be configured when WUPEN8 = 0."]
1981 #[inline(always)]
1982 pub const fn wusel8(&self) -> super::vals::Wusel {
1983 let val = (self.0 >> 14usize) & 0x03;
1984 super::vals::Wusel::from_bits(val as u8)
1985 }
1986 #[doc = "Wakeup pin WKUP8 selection This field must be configured when WUPEN8 = 0."]
1987 #[inline(always)]
1988 pub fn set_wusel8(&mut self, val: super::vals::Wusel) {
1989 self.0 = (self.0 & !(0x03 << 14usize)) | (((val.to_bits() as u32) & 0x03) << 14usize);
1990 }
1991 }
1992 impl Default for Wucr3 {
1993 #[inline(always)]
1994 fn default() -> Wucr3 {
1995 Wucr3(0)
1996 }
1997 }
1998 impl core::fmt::Debug for Wucr3 {
1999 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2000 f.debug_struct("Wucr3")
2001 .field("wusel1", &self.wusel1())
2002 .field("wusel2", &self.wusel2())
2003 .field("wusel3", &self.wusel3())
2004 .field("wusel4", &self.wusel4())
2005 .field("wusel5", &self.wusel5())
2006 .field("wusel6", &self.wusel6())
2007 .field("wusel7", &self.wusel7())
2008 .field("wusel8", &self.wusel8())
2009 .finish()
2010 }
2011 }
2012 #[cfg(feature = "defmt")]
2013 impl defmt::Format for Wucr3 {
2014 fn format(&self, f: defmt::Formatter) {
2015 #[derive(defmt :: Format)]
2016 struct Wucr3 {
2017 wusel1: super::vals::Wusel,
2018 wusel2: super::vals::Wusel,
2019 wusel3: super::vals::Wusel,
2020 wusel4: super::vals::Wusel,
2021 wusel5: super::vals::Wusel,
2022 wusel6: super::vals::Wusel,
2023 wusel7: super::vals::Wusel,
2024 wusel8: super::vals::Wusel,
2025 }
2026 let proxy = Wucr3 {
2027 wusel1: self.wusel1(),
2028 wusel2: self.wusel2(),
2029 wusel3: self.wusel3(),
2030 wusel4: self.wusel4(),
2031 wusel5: self.wusel5(),
2032 wusel6: self.wusel6(),
2033 wusel7: self.wusel7(),
2034 wusel8: self.wusel8(),
2035 };
2036 defmt::write!(f, "{}", proxy)
2037 }
2038 }
2039 #[doc = "wakeup status clear register"]
2040 #[repr(transparent)]
2041 #[derive(Copy, Clone, Eq, PartialEq)]
2042 pub struct Wuscr(pub u32);
2043 impl Wuscr {
2044 #[doc = "Wakeup flag 1 Writing 1 to this bit clears the WUF1 flag in WUSR."]
2045 #[inline(always)]
2046 pub const fn cwuf1(&self) -> bool {
2047 let val = (self.0 >> 0usize) & 0x01;
2048 val != 0
2049 }
2050 #[doc = "Wakeup flag 1 Writing 1 to this bit clears the WUF1 flag in WUSR."]
2051 #[inline(always)]
2052 pub fn set_cwuf1(&mut self, val: bool) {
2053 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
2054 }
2055 #[doc = "Wakeup flag 2 Writing 1 to this bit clears the WUF2 flag in WUSR."]
2056 #[inline(always)]
2057 pub const fn cwuf2(&self) -> bool {
2058 let val = (self.0 >> 1usize) & 0x01;
2059 val != 0
2060 }
2061 #[doc = "Wakeup flag 2 Writing 1 to this bit clears the WUF2 flag in WUSR."]
2062 #[inline(always)]
2063 pub fn set_cwuf2(&mut self, val: bool) {
2064 self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
2065 }
2066 #[doc = "Wakeup flag 3 Writing 1 to this bit clears the WUF3 flag in WUSR."]
2067 #[inline(always)]
2068 pub const fn cwuf3(&self) -> bool {
2069 let val = (self.0 >> 2usize) & 0x01;
2070 val != 0
2071 }
2072 #[doc = "Wakeup flag 3 Writing 1 to this bit clears the WUF3 flag in WUSR."]
2073 #[inline(always)]
2074 pub fn set_cwuf3(&mut self, val: bool) {
2075 self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
2076 }
2077 #[doc = "Wakeup flag 4 Writing 1 to this bit clears the WUF4 flag in WUSR."]
2078 #[inline(always)]
2079 pub const fn cwuf4(&self) -> bool {
2080 let val = (self.0 >> 3usize) & 0x01;
2081 val != 0
2082 }
2083 #[doc = "Wakeup flag 4 Writing 1 to this bit clears the WUF4 flag in WUSR."]
2084 #[inline(always)]
2085 pub fn set_cwuf4(&mut self, val: bool) {
2086 self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize);
2087 }
2088 #[doc = "Wakeup flag 5 Writing 1 to this bit clears the WUF5 flag in WUSR."]
2089 #[inline(always)]
2090 pub const fn cwuf5(&self) -> bool {
2091 let val = (self.0 >> 4usize) & 0x01;
2092 val != 0
2093 }
2094 #[doc = "Wakeup flag 5 Writing 1 to this bit clears the WUF5 flag in WUSR."]
2095 #[inline(always)]
2096 pub fn set_cwuf5(&mut self, val: bool) {
2097 self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
2098 }
2099 #[doc = "Wakeup flag 6 Writing 1 to this bit clears the WUF6 flag in WUSR."]
2100 #[inline(always)]
2101 pub const fn cwuf6(&self) -> bool {
2102 let val = (self.0 >> 5usize) & 0x01;
2103 val != 0
2104 }
2105 #[doc = "Wakeup flag 6 Writing 1 to this bit clears the WUF6 flag in WUSR."]
2106 #[inline(always)]
2107 pub fn set_cwuf6(&mut self, val: bool) {
2108 self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize);
2109 }
2110 #[doc = "Wakeup flag 7 Writing 1 to this bit clears the WUF7 flag in WUSR."]
2111 #[inline(always)]
2112 pub const fn cwuf7(&self) -> bool {
2113 let val = (self.0 >> 6usize) & 0x01;
2114 val != 0
2115 }
2116 #[doc = "Wakeup flag 7 Writing 1 to this bit clears the WUF7 flag in WUSR."]
2117 #[inline(always)]
2118 pub fn set_cwuf7(&mut self, val: bool) {
2119 self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize);
2120 }
2121 #[doc = "Wakeup flag 8 Writing 1 to this bit clears the WUF8 flag in WUSR."]
2122 #[inline(always)]
2123 pub const fn cwuf8(&self) -> bool {
2124 let val = (self.0 >> 7usize) & 0x01;
2125 val != 0
2126 }
2127 #[doc = "Wakeup flag 8 Writing 1 to this bit clears the WUF8 flag in WUSR."]
2128 #[inline(always)]
2129 pub fn set_cwuf8(&mut self, val: bool) {
2130 self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize);
2131 }
2132 }
2133 impl Default for Wuscr {
2134 #[inline(always)]
2135 fn default() -> Wuscr {
2136 Wuscr(0)
2137 }
2138 }
2139 impl core::fmt::Debug for Wuscr {
2140 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2141 f.debug_struct("Wuscr")
2142 .field("cwuf1", &self.cwuf1())
2143 .field("cwuf2", &self.cwuf2())
2144 .field("cwuf3", &self.cwuf3())
2145 .field("cwuf4", &self.cwuf4())
2146 .field("cwuf5", &self.cwuf5())
2147 .field("cwuf6", &self.cwuf6())
2148 .field("cwuf7", &self.cwuf7())
2149 .field("cwuf8", &self.cwuf8())
2150 .finish()
2151 }
2152 }
2153 #[cfg(feature = "defmt")]
2154 impl defmt::Format for Wuscr {
2155 fn format(&self, f: defmt::Formatter) {
2156 #[derive(defmt :: Format)]
2157 struct Wuscr {
2158 cwuf1: bool,
2159 cwuf2: bool,
2160 cwuf3: bool,
2161 cwuf4: bool,
2162 cwuf5: bool,
2163 cwuf6: bool,
2164 cwuf7: bool,
2165 cwuf8: bool,
2166 }
2167 let proxy = Wuscr {
2168 cwuf1: self.cwuf1(),
2169 cwuf2: self.cwuf2(),
2170 cwuf3: self.cwuf3(),
2171 cwuf4: self.cwuf4(),
2172 cwuf5: self.cwuf5(),
2173 cwuf6: self.cwuf6(),
2174 cwuf7: self.cwuf7(),
2175 cwuf8: self.cwuf8(),
2176 };
2177 defmt::write!(f, "{}", proxy)
2178 }
2179 }
2180 #[doc = "wakeup status register"]
2181 #[repr(transparent)]
2182 #[derive(Copy, Clone, Eq, PartialEq)]
2183 pub struct Wusr(pub u32);
2184 impl Wusr {
2185 #[doc = "Wakeup flag 1 This bit is set when a wakeup event is detected on WKUP1 pin. This bit is cleared by writing 1 in the CWUF1 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN1=0."]
2186 #[inline(always)]
2187 pub const fn wuf1(&self) -> bool {
2188 let val = (self.0 >> 0usize) & 0x01;
2189 val != 0
2190 }
2191 #[doc = "Wakeup flag 1 This bit is set when a wakeup event is detected on WKUP1 pin. This bit is cleared by writing 1 in the CWUF1 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN1=0."]
2192 #[inline(always)]
2193 pub fn set_wuf1(&mut self, val: bool) {
2194 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
2195 }
2196 #[doc = "Wakeup flag 2 This bit is set when a wakeup event is detected on WKUP2 pin. This bit is cleared by writing 1 in the CWUF2 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN2=0."]
2197 #[inline(always)]
2198 pub const fn wuf2(&self) -> bool {
2199 let val = (self.0 >> 1usize) & 0x01;
2200 val != 0
2201 }
2202 #[doc = "Wakeup flag 2 This bit is set when a wakeup event is detected on WKUP2 pin. This bit is cleared by writing 1 in the CWUF2 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN2=0."]
2203 #[inline(always)]
2204 pub fn set_wuf2(&mut self, val: bool) {
2205 self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
2206 }
2207 #[doc = "Wakeup flag 3 This bit is set when a wakeup event is detected on WKUP3 pin. This bit is cleared by writing 1 in the CWUF3 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN3=0."]
2208 #[inline(always)]
2209 pub const fn wuf3(&self) -> bool {
2210 let val = (self.0 >> 2usize) & 0x01;
2211 val != 0
2212 }
2213 #[doc = "Wakeup flag 3 This bit is set when a wakeup event is detected on WKUP3 pin. This bit is cleared by writing 1 in the CWUF3 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN3=0."]
2214 #[inline(always)]
2215 pub fn set_wuf3(&mut self, val: bool) {
2216 self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
2217 }
2218 #[doc = "Wakeup flag 4 This bit is set when a wakeup event is detected on WKUP4 pin. This bit is cleared by writing 1 in the CWUF4 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN4=0."]
2219 #[inline(always)]
2220 pub const fn wuf4(&self) -> bool {
2221 let val = (self.0 >> 3usize) & 0x01;
2222 val != 0
2223 }
2224 #[doc = "Wakeup flag 4 This bit is set when a wakeup event is detected on WKUP4 pin. This bit is cleared by writing 1 in the CWUF4 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN4=0."]
2225 #[inline(always)]
2226 pub fn set_wuf4(&mut self, val: bool) {
2227 self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize);
2228 }
2229 #[doc = "Wakeup flag 5 This bit is set when a wakeup event is detected on WKUP5 pin. This bit is cleared by writing 1 in the CWUF5 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN5=0."]
2230 #[inline(always)]
2231 pub const fn wuf5(&self) -> bool {
2232 let val = (self.0 >> 4usize) & 0x01;
2233 val != 0
2234 }
2235 #[doc = "Wakeup flag 5 This bit is set when a wakeup event is detected on WKUP5 pin. This bit is cleared by writing 1 in the CWUF5 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN5=0."]
2236 #[inline(always)]
2237 pub fn set_wuf5(&mut self, val: bool) {
2238 self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
2239 }
2240 #[doc = "Wakeup flag 6 This bit is set when a wakeup event is detected on WKUP6 pin. This bit is cleared by writing 1 in the CWUF6 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN6=0. If WUSEL=11, this bit is cleared by hardware when all internal wakeup source are cleared."]
2241 #[inline(always)]
2242 pub const fn wuf6(&self) -> bool {
2243 let val = (self.0 >> 5usize) & 0x01;
2244 val != 0
2245 }
2246 #[doc = "Wakeup flag 6 This bit is set when a wakeup event is detected on WKUP6 pin. This bit is cleared by writing 1 in the CWUF6 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN6=0. If WUSEL=11, this bit is cleared by hardware when all internal wakeup source are cleared."]
2247 #[inline(always)]
2248 pub fn set_wuf6(&mut self, val: bool) {
2249 self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize);
2250 }
2251 #[doc = "Wakeup flag 7 This bit is set when a wakeup event is detected on WKUP7 pin. This bit is cleared by writing 1 in the CWUF7 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN7=0. If WUSEL=11, this bit is cleared by hardware when all internal wakeup source are cleared."]
2252 #[inline(always)]
2253 pub const fn wuf7(&self) -> bool {
2254 let val = (self.0 >> 6usize) & 0x01;
2255 val != 0
2256 }
2257 #[doc = "Wakeup flag 7 This bit is set when a wakeup event is detected on WKUP7 pin. This bit is cleared by writing 1 in the CWUF7 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN7=0. If WUSEL=11, this bit is cleared by hardware when all internal wakeup source are cleared."]
2258 #[inline(always)]
2259 pub fn set_wuf7(&mut self, val: bool) {
2260 self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize);
2261 }
2262 #[doc = "Wakeup flag 8 This bit is set when a wakeup event is detected on WKUP8 pin. This bit is cleared by writing 1 in the CWUF8 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN8=0. If WUSEL=11, this bit is cleared by hardware when all internal wakeup source are cleared."]
2263 #[inline(always)]
2264 pub const fn wuf8(&self) -> bool {
2265 let val = (self.0 >> 7usize) & 0x01;
2266 val != 0
2267 }
2268 #[doc = "Wakeup flag 8 This bit is set when a wakeup event is detected on WKUP8 pin. This bit is cleared by writing 1 in the CWUF8 bit of WUSCR when WUSEL ≠ 11, or by hardware when WUPEN8=0. If WUSEL=11, this bit is cleared by hardware when all internal wakeup source are cleared."]
2269 #[inline(always)]
2270 pub fn set_wuf8(&mut self, val: bool) {
2271 self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize);
2272 }
2273 }
2274 impl Default for Wusr {
2275 #[inline(always)]
2276 fn default() -> Wusr {
2277 Wusr(0)
2278 }
2279 }
2280 impl core::fmt::Debug for Wusr {
2281 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2282 f.debug_struct("Wusr")
2283 .field("wuf1", &self.wuf1())
2284 .field("wuf2", &self.wuf2())
2285 .field("wuf3", &self.wuf3())
2286 .field("wuf4", &self.wuf4())
2287 .field("wuf5", &self.wuf5())
2288 .field("wuf6", &self.wuf6())
2289 .field("wuf7", &self.wuf7())
2290 .field("wuf8", &self.wuf8())
2291 .finish()
2292 }
2293 }
2294 #[cfg(feature = "defmt")]
2295 impl defmt::Format for Wusr {
2296 fn format(&self, f: defmt::Formatter) {
2297 #[derive(defmt :: Format)]
2298 struct Wusr {
2299 wuf1: bool,
2300 wuf2: bool,
2301 wuf3: bool,
2302 wuf4: bool,
2303 wuf5: bool,
2304 wuf6: bool,
2305 wuf7: bool,
2306 wuf8: bool,
2307 }
2308 let proxy = Wusr {
2309 wuf1: self.wuf1(),
2310 wuf2: self.wuf2(),
2311 wuf3: self.wuf3(),
2312 wuf4: self.wuf4(),
2313 wuf5: self.wuf5(),
2314 wuf6: self.wuf6(),
2315 wuf7: self.wuf7(),
2316 wuf8: self.wuf8(),
2317 };
2318 defmt::write!(f, "{}", proxy)
2319 }
2320 }
2321}
2322pub mod vals {
2323 #[repr(u8)]
2324 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2325 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2326 pub enum Actvos {
2327 #[doc = "Range 4 (lowest power)"]
2328 RANGE4 = 0x0,
2329 #[doc = "Range 3"]
2330 RANGE3 = 0x01,
2331 #[doc = "Range 2"]
2332 RANGE2 = 0x02,
2333 #[doc = "Range 1 (highest frequency)"]
2334 RANGE1 = 0x03,
2335 }
2336 impl Actvos {
2337 #[inline(always)]
2338 pub const fn from_bits(val: u8) -> Actvos {
2339 unsafe { core::mem::transmute(val & 0x03) }
2340 }
2341 #[inline(always)]
2342 pub const fn to_bits(self) -> u8 {
2343 unsafe { core::mem::transmute(self) }
2344 }
2345 }
2346 impl From<u8> for Actvos {
2347 #[inline(always)]
2348 fn from(val: u8) -> Actvos {
2349 Actvos::from_bits(val)
2350 }
2351 }
2352 impl From<Actvos> for u8 {
2353 #[inline(always)]
2354 fn from(val: Actvos) -> u8 {
2355 Actvos::to_bits(val)
2356 }
2357 }
2358 #[repr(u8)]
2359 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2360 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2361 pub enum Flashfwu {
2362 #[doc = "Flash memory enters low-power mode in Stop 0 and Stop 1 modes (lower-power consumption)."]
2363 LOW_POWER = 0x0,
2364 #[doc = "Flash memory remains in normal mode in Stop 0 and Stop 1 modes (faster wakeup time)."]
2365 NORMAL = 0x01,
2366 }
2367 impl Flashfwu {
2368 #[inline(always)]
2369 pub const fn from_bits(val: u8) -> Flashfwu {
2370 unsafe { core::mem::transmute(val & 0x01) }
2371 }
2372 #[inline(always)]
2373 pub const fn to_bits(self) -> u8 {
2374 unsafe { core::mem::transmute(self) }
2375 }
2376 }
2377 impl From<u8> for Flashfwu {
2378 #[inline(always)]
2379 fn from(val: u8) -> Flashfwu {
2380 Flashfwu::from_bits(val)
2381 }
2382 }
2383 impl From<Flashfwu> for u8 {
2384 #[inline(always)]
2385 fn from(val: Flashfwu) -> u8 {
2386 Flashfwu::to_bits(val)
2387 }
2388 }
2389 #[repr(u8)]
2390 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2391 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2392 pub enum Lpms {
2393 #[doc = "Stop 0 mode"]
2394 STOP0 = 0x0,
2395 #[doc = "Stop 1 mode"]
2396 STOP1 = 0x01,
2397 #[doc = "Stop 2 mode"]
2398 STOP2 = 0x02,
2399 #[doc = "Stop 3 mode"]
2400 STOP3 = 0x03,
2401 _RESERVED_4 = 0x04,
2402 _RESERVED_5 = 0x05,
2403 _RESERVED_6 = 0x06,
2404 _RESERVED_7 = 0x07,
2405 }
2406 impl Lpms {
2407 #[inline(always)]
2408 pub const fn from_bits(val: u8) -> Lpms {
2409 unsafe { core::mem::transmute(val & 0x07) }
2410 }
2411 #[inline(always)]
2412 pub const fn to_bits(self) -> u8 {
2413 unsafe { core::mem::transmute(self) }
2414 }
2415 }
2416 impl From<u8> for Lpms {
2417 #[inline(always)]
2418 fn from(val: u8) -> Lpms {
2419 Lpms::from_bits(val)
2420 }
2421 }
2422 impl From<Lpms> for u8 {
2423 #[inline(always)]
2424 fn from(val: Lpms) -> u8 {
2425 Lpms::to_bits(val)
2426 }
2427 }
2428 #[repr(u8)]
2429 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2430 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2431 pub enum Pds {
2432 #[doc = "Content retained in Stop modes"]
2433 RETAINED = 0x0,
2434 #[doc = "Content lost in Stop modes"]
2435 LOST = 0x01,
2436 }
2437 impl Pds {
2438 #[inline(always)]
2439 pub const fn from_bits(val: u8) -> Pds {
2440 unsafe { core::mem::transmute(val & 0x01) }
2441 }
2442 #[inline(always)]
2443 pub const fn to_bits(self) -> u8 {
2444 unsafe { core::mem::transmute(self) }
2445 }
2446 }
2447 impl From<u8> for Pds {
2448 #[inline(always)]
2449 fn from(val: u8) -> Pds {
2450 Pds::from_bits(val)
2451 }
2452 }
2453 impl From<Pds> for u8 {
2454 #[inline(always)]
2455 fn from(val: Pds) -> u8 {
2456 Pds::to_bits(val)
2457 }
2458 }
2459 #[repr(u8)]
2460 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2461 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2462 pub enum Pvdls {
2463 #[doc = "VPVD0 around 2.0 V"]
2464 V20 = 0x0,
2465 #[doc = "VPVD1 around 2.2 V"]
2466 V22 = 0x01,
2467 #[doc = "VPVD2 around 2.4 V"]
2468 V24 = 0x02,
2469 #[doc = "VPVD3 around 2.5 V"]
2470 V25 = 0x03,
2471 #[doc = "VPVD4 around 2.6 V"]
2472 V26 = 0x04,
2473 #[doc = "VPVD5 around 2.8 V"]
2474 V28 = 0x05,
2475 #[doc = "VPVD6 around 2.9 V"]
2476 V29 = 0x06,
2477 #[doc = "External input analog voltage PVD_IN (compared internally to VREFINT)"]
2478 PVD_IN = 0x07,
2479 }
2480 impl Pvdls {
2481 #[inline(always)]
2482 pub const fn from_bits(val: u8) -> Pvdls {
2483 unsafe { core::mem::transmute(val & 0x07) }
2484 }
2485 #[inline(always)]
2486 pub const fn to_bits(self) -> u8 {
2487 unsafe { core::mem::transmute(self) }
2488 }
2489 }
2490 impl From<u8> for Pvdls {
2491 #[inline(always)]
2492 fn from(val: u8) -> Pvdls {
2493 Pvdls::from_bits(val)
2494 }
2495 }
2496 impl From<Pvdls> for u8 {
2497 #[inline(always)]
2498 fn from(val: Pvdls) -> u8 {
2499 Pvdls::to_bits(val)
2500 }
2501 }
2502 #[repr(u8)]
2503 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2504 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2505 pub enum Pvdo {
2506 #[doc = "VDD is equal or above the PVD threshold selected by PVDLS\\[2:0\\]."]
2507 ABOVE_OR_EQUAL = 0x0,
2508 #[doc = "VDD is below the PVD threshold selected by PVDLS\\[2:0\\]."]
2509 BELOW = 0x01,
2510 }
2511 impl Pvdo {
2512 #[inline(always)]
2513 pub const fn from_bits(val: u8) -> Pvdo {
2514 unsafe { core::mem::transmute(val & 0x01) }
2515 }
2516 #[inline(always)]
2517 pub const fn to_bits(self) -> u8 {
2518 unsafe { core::mem::transmute(self) }
2519 }
2520 }
2521 impl From<u8> for Pvdo {
2522 #[inline(always)]
2523 fn from(val: u8) -> Pvdo {
2524 Pvdo::from_bits(val)
2525 }
2526 }
2527 impl From<Pvdo> for u8 {
2528 #[inline(always)]
2529 fn from(val: Pvdo) -> u8 {
2530 Pvdo::to_bits(val)
2531 }
2532 }
2533 #[repr(u8)]
2534 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2535 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2536 pub enum Regsel {
2537 #[doc = "LDO selected"]
2538 LDO = 0x0,
2539 #[doc = "SMPS selected"]
2540 SMPS = 0x01,
2541 }
2542 impl Regsel {
2543 #[inline(always)]
2544 pub const fn from_bits(val: u8) -> Regsel {
2545 unsafe { core::mem::transmute(val & 0x01) }
2546 }
2547 #[inline(always)]
2548 pub const fn to_bits(self) -> u8 {
2549 unsafe { core::mem::transmute(self) }
2550 }
2551 }
2552 impl From<u8> for Regsel {
2553 #[inline(always)]
2554 fn from(val: u8) -> Regsel {
2555 Regsel::from_bits(val)
2556 }
2557 }
2558 impl From<Regsel> for u8 {
2559 #[inline(always)]
2560 fn from(val: Regsel) -> u8 {
2561 Regsel::to_bits(val)
2562 }
2563 }
2564 #[repr(u8)]
2565 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2566 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2567 pub enum Sramfwu {
2568 #[doc = "SRAM4 enters low-power mode in Stop 0, 1 and 2 modes (source biasing for lower-power consumption)."]
2569 B_0X0 = 0x0,
2570 #[doc = "SRAM4 remains in normal mode in Stop 0, 1 and 2 modes (higher consumption but no SRAM4 wakeup time)."]
2571 B_0X1 = 0x01,
2572 }
2573 impl Sramfwu {
2574 #[inline(always)]
2575 pub const fn from_bits(val: u8) -> Sramfwu {
2576 unsafe { core::mem::transmute(val & 0x01) }
2577 }
2578 #[inline(always)]
2579 pub const fn to_bits(self) -> u8 {
2580 unsafe { core::mem::transmute(self) }
2581 }
2582 }
2583 impl From<u8> for Sramfwu {
2584 #[inline(always)]
2585 fn from(val: u8) -> Sramfwu {
2586 Sramfwu::from_bits(val)
2587 }
2588 }
2589 impl From<Sramfwu> for u8 {
2590 #[inline(always)]
2591 fn from(val: Sramfwu) -> u8 {
2592 Sramfwu::to_bits(val)
2593 }
2594 }
2595 #[repr(u8)]
2596 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2597 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2598 pub enum Srampd {
2599 #[doc = "SRAM1 powered on"]
2600 POWERED_ON = 0x0,
2601 #[doc = "SRAM1 powered off"]
2602 POWERED_OFF = 0x01,
2603 }
2604 impl Srampd {
2605 #[inline(always)]
2606 pub const fn from_bits(val: u8) -> Srampd {
2607 unsafe { core::mem::transmute(val & 0x01) }
2608 }
2609 #[inline(always)]
2610 pub const fn to_bits(self) -> u8 {
2611 unsafe { core::mem::transmute(self) }
2612 }
2613 }
2614 impl From<u8> for Srampd {
2615 #[inline(always)]
2616 fn from(val: u8) -> Srampd {
2617 Srampd::from_bits(val)
2618 }
2619 }
2620 impl From<Srampd> for u8 {
2621 #[inline(always)]
2622 fn from(val: Srampd) -> u8 {
2623 Srampd::to_bits(val)
2624 }
2625 }
2626 #[repr(u8)]
2627 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2628 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2629 pub enum Temph {
2630 #[doc = "Temperature < high threshold"]
2631 B_0X0 = 0x0,
2632 #[doc = "Temperature ≥ high threshold"]
2633 B_0X1 = 0x01,
2634 }
2635 impl Temph {
2636 #[inline(always)]
2637 pub const fn from_bits(val: u8) -> Temph {
2638 unsafe { core::mem::transmute(val & 0x01) }
2639 }
2640 #[inline(always)]
2641 pub const fn to_bits(self) -> u8 {
2642 unsafe { core::mem::transmute(self) }
2643 }
2644 }
2645 impl From<u8> for Temph {
2646 #[inline(always)]
2647 fn from(val: u8) -> Temph {
2648 Temph::from_bits(val)
2649 }
2650 }
2651 impl From<Temph> for u8 {
2652 #[inline(always)]
2653 fn from(val: Temph) -> u8 {
2654 Temph::to_bits(val)
2655 }
2656 }
2657 #[repr(u8)]
2658 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2659 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2660 pub enum Templ {
2661 #[doc = "Temperature > low threshold"]
2662 B_0X0 = 0x0,
2663 #[doc = "Temperature ≤ low threshold"]
2664 B_0X1 = 0x01,
2665 }
2666 impl Templ {
2667 #[inline(always)]
2668 pub const fn from_bits(val: u8) -> Templ {
2669 unsafe { core::mem::transmute(val & 0x01) }
2670 }
2671 #[inline(always)]
2672 pub const fn to_bits(self) -> u8 {
2673 unsafe { core::mem::transmute(self) }
2674 }
2675 }
2676 impl From<u8> for Templ {
2677 #[inline(always)]
2678 fn from(val: u8) -> Templ {
2679 Templ::from_bits(val)
2680 }
2681 }
2682 impl From<Templ> for u8 {
2683 #[inline(always)]
2684 fn from(val: Templ) -> u8 {
2685 Templ::to_bits(val)
2686 }
2687 }
2688 #[repr(u8)]
2689 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2690 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2691 pub enum Vbath {
2692 #[doc = "Backup domain voltage level < high threshold"]
2693 B_0X0 = 0x0,
2694 #[doc = "Backup domain voltage level ≥ high threshold"]
2695 B_0X1 = 0x01,
2696 }
2697 impl Vbath {
2698 #[inline(always)]
2699 pub const fn from_bits(val: u8) -> Vbath {
2700 unsafe { core::mem::transmute(val & 0x01) }
2701 }
2702 #[inline(always)]
2703 pub const fn to_bits(self) -> u8 {
2704 unsafe { core::mem::transmute(self) }
2705 }
2706 }
2707 impl From<u8> for Vbath {
2708 #[inline(always)]
2709 fn from(val: u8) -> Vbath {
2710 Vbath::from_bits(val)
2711 }
2712 }
2713 impl From<Vbath> for u8 {
2714 #[inline(always)]
2715 fn from(val: Vbath) -> u8 {
2716 Vbath::to_bits(val)
2717 }
2718 }
2719 #[repr(u8)]
2720 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2721 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2722 pub enum Vbe {
2723 #[doc = "VBAT battery charging disabled"]
2724 B_0X0 = 0x0,
2725 #[doc = "VBAT battery charging enabled"]
2726 B_0X1 = 0x01,
2727 }
2728 impl Vbe {
2729 #[inline(always)]
2730 pub const fn from_bits(val: u8) -> Vbe {
2731 unsafe { core::mem::transmute(val & 0x01) }
2732 }
2733 #[inline(always)]
2734 pub const fn to_bits(self) -> u8 {
2735 unsafe { core::mem::transmute(self) }
2736 }
2737 }
2738 impl From<u8> for Vbe {
2739 #[inline(always)]
2740 fn from(val: u8) -> Vbe {
2741 Vbe::from_bits(val)
2742 }
2743 }
2744 impl From<Vbe> for u8 {
2745 #[inline(always)]
2746 fn from(val: Vbe) -> u8 {
2747 Vbe::to_bits(val)
2748 }
2749 }
2750 #[repr(u8)]
2751 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2752 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2753 pub enum Vbrs {
2754 #[doc = "Charge VBAT through a 5 kΩ resistor"]
2755 B_0X0 = 0x0,
2756 #[doc = "Charge VBAT through a 1.5 kΩ resistor"]
2757 B_0X1 = 0x01,
2758 }
2759 impl Vbrs {
2760 #[inline(always)]
2761 pub const fn from_bits(val: u8) -> Vbrs {
2762 unsafe { core::mem::transmute(val & 0x01) }
2763 }
2764 #[inline(always)]
2765 pub const fn to_bits(self) -> u8 {
2766 unsafe { core::mem::transmute(self) }
2767 }
2768 }
2769 impl From<u8> for Vbrs {
2770 #[inline(always)]
2771 fn from(val: u8) -> Vbrs {
2772 Vbrs::from_bits(val)
2773 }
2774 }
2775 impl From<Vbrs> for u8 {
2776 #[inline(always)]
2777 fn from(val: Vbrs) -> u8 {
2778 Vbrs::to_bits(val)
2779 }
2780 }
2781 #[repr(u8)]
2782 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2783 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2784 pub enum Vos {
2785 #[doc = "Range 4 (lowest power)"]
2786 RANGE4 = 0x0,
2787 #[doc = "Range 3"]
2788 RANGE3 = 0x01,
2789 #[doc = "Range 2"]
2790 RANGE2 = 0x02,
2791 #[doc = "Range 1 (highest frequency). This value cannot be written when VCOREMEN = 1 in TAMP_OR register."]
2792 RANGE1 = 0x03,
2793 }
2794 impl Vos {
2795 #[inline(always)]
2796 pub const fn from_bits(val: u8) -> Vos {
2797 unsafe { core::mem::transmute(val & 0x03) }
2798 }
2799 #[inline(always)]
2800 pub const fn to_bits(self) -> u8 {
2801 unsafe { core::mem::transmute(self) }
2802 }
2803 }
2804 impl From<u8> for Vos {
2805 #[inline(always)]
2806 fn from(val: u8) -> Vos {
2807 Vos::from_bits(val)
2808 }
2809 }
2810 impl From<Vos> for u8 {
2811 #[inline(always)]
2812 fn from(val: Vos) -> u8 {
2813 Vos::to_bits(val)
2814 }
2815 }
2816 #[repr(u8)]
2817 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2818 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2819 pub enum Wupp {
2820 #[doc = "Detection on high level (rising edge)"]
2821 HIGH = 0x0,
2822 #[doc = "Detection on low level (falling edge)"]
2823 LOW = 0x01,
2824 }
2825 impl Wupp {
2826 #[inline(always)]
2827 pub const fn from_bits(val: u8) -> Wupp {
2828 unsafe { core::mem::transmute(val & 0x01) }
2829 }
2830 #[inline(always)]
2831 pub const fn to_bits(self) -> u8 {
2832 unsafe { core::mem::transmute(self) }
2833 }
2834 }
2835 impl From<u8> for Wupp {
2836 #[inline(always)]
2837 fn from(val: u8) -> Wupp {
2838 Wupp::from_bits(val)
2839 }
2840 }
2841 impl From<Wupp> for u8 {
2842 #[inline(always)]
2843 fn from(val: Wupp) -> u8 {
2844 Wupp::to_bits(val)
2845 }
2846 }
2847 #[repr(u8)]
2848 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2849 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2850 pub enum Wusel {
2851 #[doc = "WKUP7_0"]
2852 B_0X0 = 0x0,
2853 #[doc = "WKUP7_1"]
2854 B_0X1 = 0x01,
2855 #[doc = "WKUP7_2"]
2856 B_0X2 = 0x02,
2857 #[doc = "WKUP7_3"]
2858 B_0X3 = 0x03,
2859 }
2860 impl Wusel {
2861 #[inline(always)]
2862 pub const fn from_bits(val: u8) -> Wusel {
2863 unsafe { core::mem::transmute(val & 0x03) }
2864 }
2865 #[inline(always)]
2866 pub const fn to_bits(self) -> u8 {
2867 unsafe { core::mem::transmute(self) }
2868 }
2869 }
2870 impl From<u8> for Wusel {
2871 #[inline(always)]
2872 fn from(val: u8) -> Wusel {
2873 Wusel::from_bits(val)
2874 }
2875 }
2876 impl From<Wusel> for u8 {
2877 #[inline(always)]
2878 fn from(val: Wusel) -> u8 {
2879 Wusel::to_bits(val)
2880 }
2881 }
2882}
2883