1#![allow(clippy::missing_safety_doc)]
2#![allow(clippy::identity_op)]
3#![allow(clippy::unnecessary_cast)]
4#![allow(clippy::erasing_op)]
5
6#[doc = "Low-power Universal synchronous asynchronous receiver transmitter"]
7#[derive(Copy, Clone, Eq, PartialEq)]
8pub struct Lpuart {
9 ptr: *mut u8,
10}
11unsafe impl Send for Lpuart {}
12unsafe impl Sync for Lpuart {}
13impl Lpuart {
14 #[inline(always)]
15 pub const unsafe fn from_ptr(ptr: *mut ()) -> Self {
16 Self { ptr: ptr as _ }
17 }
18 #[inline(always)]
19 pub const fn as_ptr(&self) -> *mut () {
20 self.ptr as _
21 }
22 #[doc = "Control register 1"]
23 #[inline(always)]
24 pub const fn cr1(self) -> crate::common::Reg<regs::Cr1, crate::common::RW> {
25 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0usize) as _) }
26 }
27 #[doc = "Control register 2"]
28 #[inline(always)]
29 pub const fn cr2(self) -> crate::common::Reg<regs::Cr2, crate::common::RW> {
30 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x04usize) as _) }
31 }
32 #[doc = "Control register 3"]
33 #[inline(always)]
34 pub const fn cr3(self) -> crate::common::Reg<regs::Cr3, crate::common::RW> {
35 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x08usize) as _) }
36 }
37 #[doc = "Baud rate register"]
38 #[inline(always)]
39 pub const fn brr(self) -> crate::common::Reg<regs::Brr, crate::common::RW> {
40 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0cusize) as _) }
41 }
42 #[doc = "Request register"]
43 #[inline(always)]
44 pub const fn rqr(self) -> crate::common::Reg<regs::Rqr, crate::common::W> {
45 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x18usize) as _) }
46 }
47 #[doc = "Interrupt & status register"]
48 #[inline(always)]
49 pub const fn isr(self) -> crate::common::Reg<regs::Isr, crate::common::R> {
50 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x1cusize) as _) }
51 }
52 #[doc = "Interrupt flag clear register"]
53 #[inline(always)]
54 pub const fn icr(self) -> crate::common::Reg<regs::Icr, crate::common::W> {
55 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x20usize) as _) }
56 }
57 #[doc = "Receive data register"]
58 #[inline(always)]
59 pub const fn rdr(self) -> crate::common::Reg<regs::Dr, crate::common::R> {
60 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x24usize) as _) }
61 }
62 #[doc = "Transmit data register"]
63 #[inline(always)]
64 pub const fn tdr(self) -> crate::common::Reg<regs::Dr, crate::common::W> {
65 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x28usize) as _) }
66 }
67 #[doc = "Prescaler register"]
68 #[inline(always)]
69 pub const fn presc(self) -> crate::common::Reg<regs::Presc, crate::common::RW> {
70 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x2cusize) as _) }
71 }
72}
73#[doc = "Universal synchronous asynchronous receiver transmitter"]
74#[derive(Copy, Clone, Eq, PartialEq)]
75pub struct Usart {
76 ptr: *mut u8,
77}
78unsafe impl Send for Usart {}
79unsafe impl Sync for Usart {}
80impl Usart {
81 #[inline(always)]
82 pub const unsafe fn from_ptr(ptr: *mut ()) -> Self {
83 Self { ptr: ptr as _ }
84 }
85 #[inline(always)]
86 pub const fn as_ptr(&self) -> *mut () {
87 self.ptr as _
88 }
89 #[doc = "Control register 1"]
90 #[inline(always)]
91 pub const fn cr1(self) -> crate::common::Reg<regs::Cr1, crate::common::RW> {
92 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0usize) as _) }
93 }
94 #[doc = "Control register 2"]
95 #[inline(always)]
96 pub const fn cr2(self) -> crate::common::Reg<regs::Cr2, crate::common::RW> {
97 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x04usize) as _) }
98 }
99 #[doc = "Control register 3"]
100 #[inline(always)]
101 pub const fn cr3(self) -> crate::common::Reg<regs::Cr3, crate::common::RW> {
102 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x08usize) as _) }
103 }
104 #[doc = "Baud rate register"]
105 #[inline(always)]
106 pub const fn brr(self) -> crate::common::Reg<regs::Brr, crate::common::RW> {
107 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0cusize) as _) }
108 }
109 #[doc = "Guard time and prescaler register"]
110 #[inline(always)]
111 pub const fn gtpr(self) -> crate::common::Reg<regs::Gtpr, crate::common::RW> {
112 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x10usize) as _) }
113 }
114 #[doc = "Receiver timeout register"]
115 #[inline(always)]
116 pub const fn rtor(self) -> crate::common::Reg<regs::Rtor, crate::common::RW> {
117 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x14usize) as _) }
118 }
119 #[doc = "Request register"]
120 #[inline(always)]
121 pub const fn rqr(self) -> crate::common::Reg<regs::Rqr, crate::common::W> {
122 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x18usize) as _) }
123 }
124 #[doc = "Interrupt & status register"]
125 #[inline(always)]
126 pub const fn isr(self) -> crate::common::Reg<regs::Isr, crate::common::R> {
127 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x1cusize) as _) }
128 }
129 #[doc = "Interrupt flag clear register"]
130 #[inline(always)]
131 pub const fn icr(self) -> crate::common::Reg<regs::Icr, crate::common::W> {
132 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x20usize) as _) }
133 }
134 #[doc = "Receive data register"]
135 #[inline(always)]
136 pub const fn rdr(self) -> crate::common::Reg<regs::Dr, crate::common::R> {
137 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x24usize) as _) }
138 }
139 #[doc = "Transmit data register"]
140 #[inline(always)]
141 pub const fn tdr(self) -> crate::common::Reg<regs::Dr, crate::common::W> {
142 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x28usize) as _) }
143 }
144 #[doc = "Prescaler register"]
145 #[inline(always)]
146 pub const fn presc(self) -> crate::common::Reg<regs::Presc, crate::common::RW> {
147 unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x2cusize) as _) }
148 }
149}
150pub mod regs {
151 #[doc = "Baud rate register"]
152 #[repr(transparent)]
153 #[derive(Copy, Clone, Eq, PartialEq)]
154 pub struct Brr(pub u32);
155 impl Brr {
156 #[doc = "USARTDIV"]
157 #[inline(always)]
158 pub const fn brr(&self) -> u16 {
159 let val = (self.0 >> 0usize) & 0xffff;
160 val as u16
161 }
162 #[doc = "USARTDIV"]
163 #[inline(always)]
164 pub fn set_brr(&mut self, val: u16) {
165 self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize);
166 }
167 }
168 impl Default for Brr {
169 #[inline(always)]
170 fn default() -> Brr {
171 Brr(0)
172 }
173 }
174 impl core::fmt::Debug for Brr {
175 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
176 f.debug_struct("Brr").field("brr", &self.brr()).finish()
177 }
178 }
179 #[cfg(feature = "defmt")]
180 impl defmt::Format for Brr {
181 fn format(&self, f: defmt::Formatter) {
182 #[derive(defmt :: Format)]
183 struct Brr {
184 brr: u16,
185 }
186 let proxy = Brr { brr: self.brr() };
187 defmt::write!(f, "{}", proxy)
188 }
189 }
190 #[doc = "Control register 1"]
191 #[repr(transparent)]
192 #[derive(Copy, Clone, Eq, PartialEq)]
193 pub struct Cr1(pub u32);
194 impl Cr1 {
195 #[doc = "USART enable"]
196 #[inline(always)]
197 pub const fn ue(&self) -> bool {
198 let val = (self.0 >> 0usize) & 0x01;
199 val != 0
200 }
201 #[doc = "USART enable"]
202 #[inline(always)]
203 pub fn set_ue(&mut self, val: bool) {
204 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
205 }
206 #[doc = "USART enable in Stop mode"]
207 #[inline(always)]
208 pub const fn uesm(&self) -> bool {
209 let val = (self.0 >> 1usize) & 0x01;
210 val != 0
211 }
212 #[doc = "USART enable in Stop mode"]
213 #[inline(always)]
214 pub fn set_uesm(&mut self, val: bool) {
215 self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
216 }
217 #[doc = "Receiver enable"]
218 #[inline(always)]
219 pub const fn re(&self) -> bool {
220 let val = (self.0 >> 2usize) & 0x01;
221 val != 0
222 }
223 #[doc = "Receiver enable"]
224 #[inline(always)]
225 pub fn set_re(&mut self, val: bool) {
226 self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
227 }
228 #[doc = "Transmitter enable"]
229 #[inline(always)]
230 pub const fn te(&self) -> bool {
231 let val = (self.0 >> 3usize) & 0x01;
232 val != 0
233 }
234 #[doc = "Transmitter enable"]
235 #[inline(always)]
236 pub fn set_te(&mut self, val: bool) {
237 self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize);
238 }
239 #[doc = "IDLE interrupt enable"]
240 #[inline(always)]
241 pub const fn idleie(&self) -> bool {
242 let val = (self.0 >> 4usize) & 0x01;
243 val != 0
244 }
245 #[doc = "IDLE interrupt enable"]
246 #[inline(always)]
247 pub fn set_idleie(&mut self, val: bool) {
248 self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
249 }
250 #[doc = "RXNE interrupt enable"]
251 #[inline(always)]
252 pub const fn rxneie(&self) -> bool {
253 let val = (self.0 >> 5usize) & 0x01;
254 val != 0
255 }
256 #[doc = "RXNE interrupt enable"]
257 #[inline(always)]
258 pub fn set_rxneie(&mut self, val: bool) {
259 self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize);
260 }
261 #[doc = "Transmission complete interrupt enable"]
262 #[inline(always)]
263 pub const fn tcie(&self) -> bool {
264 let val = (self.0 >> 6usize) & 0x01;
265 val != 0
266 }
267 #[doc = "Transmission complete interrupt enable"]
268 #[inline(always)]
269 pub fn set_tcie(&mut self, val: bool) {
270 self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize);
271 }
272 #[doc = "TXE interrupt enable"]
273 #[inline(always)]
274 pub const fn txeie(&self) -> bool {
275 let val = (self.0 >> 7usize) & 0x01;
276 val != 0
277 }
278 #[doc = "TXE interrupt enable"]
279 #[inline(always)]
280 pub fn set_txeie(&mut self, val: bool) {
281 self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize);
282 }
283 #[doc = "PE interrupt enable"]
284 #[inline(always)]
285 pub const fn peie(&self) -> bool {
286 let val = (self.0 >> 8usize) & 0x01;
287 val != 0
288 }
289 #[doc = "PE interrupt enable"]
290 #[inline(always)]
291 pub fn set_peie(&mut self, val: bool) {
292 self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize);
293 }
294 #[doc = "Parity selection"]
295 #[inline(always)]
296 pub const fn ps(&self) -> super::vals::Ps {
297 let val = (self.0 >> 9usize) & 0x01;
298 super::vals::Ps::from_bits(val as u8)
299 }
300 #[doc = "Parity selection"]
301 #[inline(always)]
302 pub fn set_ps(&mut self, val: super::vals::Ps) {
303 self.0 = (self.0 & !(0x01 << 9usize)) | (((val.to_bits() as u32) & 0x01) << 9usize);
304 }
305 #[doc = "Parity control enable"]
306 #[inline(always)]
307 pub const fn pce(&self) -> bool {
308 let val = (self.0 >> 10usize) & 0x01;
309 val != 0
310 }
311 #[doc = "Parity control enable"]
312 #[inline(always)]
313 pub fn set_pce(&mut self, val: bool) {
314 self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize);
315 }
316 #[doc = "Receiver wakeup method"]
317 #[inline(always)]
318 pub const fn wake(&self) -> super::vals::Wake {
319 let val = (self.0 >> 11usize) & 0x01;
320 super::vals::Wake::from_bits(val as u8)
321 }
322 #[doc = "Receiver wakeup method"]
323 #[inline(always)]
324 pub fn set_wake(&mut self, val: super::vals::Wake) {
325 self.0 = (self.0 & !(0x01 << 11usize)) | (((val.to_bits() as u32) & 0x01) << 11usize);
326 }
327 #[doc = "Word length"]
328 #[inline(always)]
329 pub const fn m0(&self) -> super::vals::M0 {
330 let val = (self.0 >> 12usize) & 0x01;
331 super::vals::M0::from_bits(val as u8)
332 }
333 #[doc = "Word length"]
334 #[inline(always)]
335 pub fn set_m0(&mut self, val: super::vals::M0) {
336 self.0 = (self.0 & !(0x01 << 12usize)) | (((val.to_bits() as u32) & 0x01) << 12usize);
337 }
338 #[doc = "Mute mode enable"]
339 #[inline(always)]
340 pub const fn mme(&self) -> bool {
341 let val = (self.0 >> 13usize) & 0x01;
342 val != 0
343 }
344 #[doc = "Mute mode enable"]
345 #[inline(always)]
346 pub fn set_mme(&mut self, val: bool) {
347 self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize);
348 }
349 #[doc = "Character match interrupt enable"]
350 #[inline(always)]
351 pub const fn cmie(&self) -> bool {
352 let val = (self.0 >> 14usize) & 0x01;
353 val != 0
354 }
355 #[doc = "Character match interrupt enable"]
356 #[inline(always)]
357 pub fn set_cmie(&mut self, val: bool) {
358 self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize);
359 }
360 #[doc = "Oversampling mode"]
361 #[inline(always)]
362 pub const fn over8(&self) -> super::vals::Over8 {
363 let val = (self.0 >> 15usize) & 0x01;
364 super::vals::Over8::from_bits(val as u8)
365 }
366 #[doc = "Oversampling mode"]
367 #[inline(always)]
368 pub fn set_over8(&mut self, val: super::vals::Over8) {
369 self.0 = (self.0 & !(0x01 << 15usize)) | (((val.to_bits() as u32) & 0x01) << 15usize);
370 }
371 #[doc = "Driver Enable deassertion time"]
372 #[inline(always)]
373 pub const fn dedt(&self) -> u8 {
374 let val = (self.0 >> 16usize) & 0x1f;
375 val as u8
376 }
377 #[doc = "Driver Enable deassertion time"]
378 #[inline(always)]
379 pub fn set_dedt(&mut self, val: u8) {
380 self.0 = (self.0 & !(0x1f << 16usize)) | (((val as u32) & 0x1f) << 16usize);
381 }
382 #[doc = "Driver Enable assertion time"]
383 #[inline(always)]
384 pub const fn deat(&self) -> u8 {
385 let val = (self.0 >> 21usize) & 0x1f;
386 val as u8
387 }
388 #[doc = "Driver Enable assertion time"]
389 #[inline(always)]
390 pub fn set_deat(&mut self, val: u8) {
391 self.0 = (self.0 & !(0x1f << 21usize)) | (((val as u32) & 0x1f) << 21usize);
392 }
393 #[doc = "Receiver timeout interrupt enable"]
394 #[inline(always)]
395 pub const fn rtoie(&self) -> bool {
396 let val = (self.0 >> 26usize) & 0x01;
397 val != 0
398 }
399 #[doc = "Receiver timeout interrupt enable"]
400 #[inline(always)]
401 pub fn set_rtoie(&mut self, val: bool) {
402 self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize);
403 }
404 #[doc = "End of Block interrupt enable"]
405 #[inline(always)]
406 pub const fn eobie(&self) -> bool {
407 let val = (self.0 >> 27usize) & 0x01;
408 val != 0
409 }
410 #[doc = "End of Block interrupt enable"]
411 #[inline(always)]
412 pub fn set_eobie(&mut self, val: bool) {
413 self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize);
414 }
415 #[doc = "Word length"]
416 #[inline(always)]
417 pub const fn m1(&self) -> super::vals::M1 {
418 let val = (self.0 >> 28usize) & 0x01;
419 super::vals::M1::from_bits(val as u8)
420 }
421 #[doc = "Word length"]
422 #[inline(always)]
423 pub fn set_m1(&mut self, val: super::vals::M1) {
424 self.0 = (self.0 & !(0x01 << 28usize)) | (((val.to_bits() as u32) & 0x01) << 28usize);
425 }
426 #[doc = "FIFO mode enable"]
427 #[inline(always)]
428 pub const fn fifoen(&self) -> bool {
429 let val = (self.0 >> 29usize) & 0x01;
430 val != 0
431 }
432 #[doc = "FIFO mode enable"]
433 #[inline(always)]
434 pub fn set_fifoen(&mut self, val: bool) {
435 self.0 = (self.0 & !(0x01 << 29usize)) | (((val as u32) & 0x01) << 29usize);
436 }
437 #[doc = "TXFIFO empty interrupt enable"]
438 #[inline(always)]
439 pub const fn txfeie(&self) -> bool {
440 let val = (self.0 >> 30usize) & 0x01;
441 val != 0
442 }
443 #[doc = "TXFIFO empty interrupt enable"]
444 #[inline(always)]
445 pub fn set_txfeie(&mut self, val: bool) {
446 self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize);
447 }
448 #[doc = "RXFIFO Full interrupt enable"]
449 #[inline(always)]
450 pub const fn rxffie(&self) -> bool {
451 let val = (self.0 >> 31usize) & 0x01;
452 val != 0
453 }
454 #[doc = "RXFIFO Full interrupt enable"]
455 #[inline(always)]
456 pub fn set_rxffie(&mut self, val: bool) {
457 self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize);
458 }
459 }
460 impl Default for Cr1 {
461 #[inline(always)]
462 fn default() -> Cr1 {
463 Cr1(0)
464 }
465 }
466 impl core::fmt::Debug for Cr1 {
467 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
468 f.debug_struct("Cr1")
469 .field("ue", &self.ue())
470 .field("uesm", &self.uesm())
471 .field("re", &self.re())
472 .field("te", &self.te())
473 .field("idleie", &self.idleie())
474 .field("rxneie", &self.rxneie())
475 .field("tcie", &self.tcie())
476 .field("txeie", &self.txeie())
477 .field("peie", &self.peie())
478 .field("ps", &self.ps())
479 .field("pce", &self.pce())
480 .field("wake", &self.wake())
481 .field("m0", &self.m0())
482 .field("mme", &self.mme())
483 .field("cmie", &self.cmie())
484 .field("over8", &self.over8())
485 .field("dedt", &self.dedt())
486 .field("deat", &self.deat())
487 .field("rtoie", &self.rtoie())
488 .field("eobie", &self.eobie())
489 .field("m1", &self.m1())
490 .field("fifoen", &self.fifoen())
491 .field("txfeie", &self.txfeie())
492 .field("rxffie", &self.rxffie())
493 .finish()
494 }
495 }
496 #[cfg(feature = "defmt")]
497 impl defmt::Format for Cr1 {
498 fn format(&self, f: defmt::Formatter) {
499 #[derive(defmt :: Format)]
500 struct Cr1 {
501 ue: bool,
502 uesm: bool,
503 re: bool,
504 te: bool,
505 idleie: bool,
506 rxneie: bool,
507 tcie: bool,
508 txeie: bool,
509 peie: bool,
510 ps: super::vals::Ps,
511 pce: bool,
512 wake: super::vals::Wake,
513 m0: super::vals::M0,
514 mme: bool,
515 cmie: bool,
516 over8: super::vals::Over8,
517 dedt: u8,
518 deat: u8,
519 rtoie: bool,
520 eobie: bool,
521 m1: super::vals::M1,
522 fifoen: bool,
523 txfeie: bool,
524 rxffie: bool,
525 }
526 let proxy = Cr1 {
527 ue: self.ue(),
528 uesm: self.uesm(),
529 re: self.re(),
530 te: self.te(),
531 idleie: self.idleie(),
532 rxneie: self.rxneie(),
533 tcie: self.tcie(),
534 txeie: self.txeie(),
535 peie: self.peie(),
536 ps: self.ps(),
537 pce: self.pce(),
538 wake: self.wake(),
539 m0: self.m0(),
540 mme: self.mme(),
541 cmie: self.cmie(),
542 over8: self.over8(),
543 dedt: self.dedt(),
544 deat: self.deat(),
545 rtoie: self.rtoie(),
546 eobie: self.eobie(),
547 m1: self.m1(),
548 fifoen: self.fifoen(),
549 txfeie: self.txfeie(),
550 rxffie: self.rxffie(),
551 };
552 defmt::write!(f, "{}", proxy)
553 }
554 }
555 #[doc = "Control register 2"]
556 #[repr(transparent)]
557 #[derive(Copy, Clone, Eq, PartialEq)]
558 pub struct Cr2(pub u32);
559 impl Cr2 {
560 #[doc = "7-bit Address Detection/4-bit Address Detection"]
561 #[inline(always)]
562 pub const fn addm(&self) -> super::vals::Addm {
563 let val = (self.0 >> 4usize) & 0x01;
564 super::vals::Addm::from_bits(val as u8)
565 }
566 #[doc = "7-bit Address Detection/4-bit Address Detection"]
567 #[inline(always)]
568 pub fn set_addm(&mut self, val: super::vals::Addm) {
569 self.0 = (self.0 & !(0x01 << 4usize)) | (((val.to_bits() as u32) & 0x01) << 4usize);
570 }
571 #[doc = "Line break detection length"]
572 #[inline(always)]
573 pub const fn lbdl(&self) -> super::vals::Lbdl {
574 let val = (self.0 >> 5usize) & 0x01;
575 super::vals::Lbdl::from_bits(val as u8)
576 }
577 #[doc = "Line break detection length"]
578 #[inline(always)]
579 pub fn set_lbdl(&mut self, val: super::vals::Lbdl) {
580 self.0 = (self.0 & !(0x01 << 5usize)) | (((val.to_bits() as u32) & 0x01) << 5usize);
581 }
582 #[doc = "LIN break detection interrupt enable"]
583 #[inline(always)]
584 pub const fn lbdie(&self) -> bool {
585 let val = (self.0 >> 6usize) & 0x01;
586 val != 0
587 }
588 #[doc = "LIN break detection interrupt enable"]
589 #[inline(always)]
590 pub fn set_lbdie(&mut self, val: bool) {
591 self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize);
592 }
593 #[doc = "Last bit clock pulse"]
594 #[inline(always)]
595 pub const fn lbcl(&self) -> bool {
596 let val = (self.0 >> 8usize) & 0x01;
597 val != 0
598 }
599 #[doc = "Last bit clock pulse"]
600 #[inline(always)]
601 pub fn set_lbcl(&mut self, val: bool) {
602 self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize);
603 }
604 #[doc = "Clock phase"]
605 #[inline(always)]
606 pub const fn cpha(&self) -> super::vals::Cpha {
607 let val = (self.0 >> 9usize) & 0x01;
608 super::vals::Cpha::from_bits(val as u8)
609 }
610 #[doc = "Clock phase"]
611 #[inline(always)]
612 pub fn set_cpha(&mut self, val: super::vals::Cpha) {
613 self.0 = (self.0 & !(0x01 << 9usize)) | (((val.to_bits() as u32) & 0x01) << 9usize);
614 }
615 #[doc = "Clock polarity"]
616 #[inline(always)]
617 pub const fn cpol(&self) -> super::vals::Cpol {
618 let val = (self.0 >> 10usize) & 0x01;
619 super::vals::Cpol::from_bits(val as u8)
620 }
621 #[doc = "Clock polarity"]
622 #[inline(always)]
623 pub fn set_cpol(&mut self, val: super::vals::Cpol) {
624 self.0 = (self.0 & !(0x01 << 10usize)) | (((val.to_bits() as u32) & 0x01) << 10usize);
625 }
626 #[doc = "Clock enable"]
627 #[inline(always)]
628 pub const fn clken(&self) -> bool {
629 let val = (self.0 >> 11usize) & 0x01;
630 val != 0
631 }
632 #[doc = "Clock enable"]
633 #[inline(always)]
634 pub fn set_clken(&mut self, val: bool) {
635 self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize);
636 }
637 #[doc = "STOP bits"]
638 #[inline(always)]
639 pub const fn stop(&self) -> super::vals::Stop {
640 let val = (self.0 >> 12usize) & 0x03;
641 super::vals::Stop::from_bits(val as u8)
642 }
643 #[doc = "STOP bits"]
644 #[inline(always)]
645 pub fn set_stop(&mut self, val: super::vals::Stop) {
646 self.0 = (self.0 & !(0x03 << 12usize)) | (((val.to_bits() as u32) & 0x03) << 12usize);
647 }
648 #[doc = "LIN mode enable"]
649 #[inline(always)]
650 pub const fn linen(&self) -> bool {
651 let val = (self.0 >> 14usize) & 0x01;
652 val != 0
653 }
654 #[doc = "LIN mode enable"]
655 #[inline(always)]
656 pub fn set_linen(&mut self, val: bool) {
657 self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize);
658 }
659 #[doc = "Swap TX/RX pins"]
660 #[inline(always)]
661 pub const fn swap(&self) -> bool {
662 let val = (self.0 >> 15usize) & 0x01;
663 val != 0
664 }
665 #[doc = "Swap TX/RX pins"]
666 #[inline(always)]
667 pub fn set_swap(&mut self, val: bool) {
668 self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize);
669 }
670 #[doc = "RX pin active level inversion"]
671 #[inline(always)]
672 pub const fn rxinv(&self) -> bool {
673 let val = (self.0 >> 16usize) & 0x01;
674 val != 0
675 }
676 #[doc = "RX pin active level inversion"]
677 #[inline(always)]
678 pub fn set_rxinv(&mut self, val: bool) {
679 self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize);
680 }
681 #[doc = "TX pin active level inversion"]
682 #[inline(always)]
683 pub const fn txinv(&self) -> bool {
684 let val = (self.0 >> 17usize) & 0x01;
685 val != 0
686 }
687 #[doc = "TX pin active level inversion"]
688 #[inline(always)]
689 pub fn set_txinv(&mut self, val: bool) {
690 self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize);
691 }
692 #[doc = "Binary data inversion"]
693 #[inline(always)]
694 pub const fn datainv(&self) -> bool {
695 let val = (self.0 >> 18usize) & 0x01;
696 val != 0
697 }
698 #[doc = "Binary data inversion"]
699 #[inline(always)]
700 pub fn set_datainv(&mut self, val: bool) {
701 self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize);
702 }
703 #[doc = "Most significant bit first"]
704 #[inline(always)]
705 pub const fn msbfirst(&self) -> super::vals::Msbfirst {
706 let val = (self.0 >> 19usize) & 0x01;
707 super::vals::Msbfirst::from_bits(val as u8)
708 }
709 #[doc = "Most significant bit first"]
710 #[inline(always)]
711 pub fn set_msbfirst(&mut self, val: super::vals::Msbfirst) {
712 self.0 = (self.0 & !(0x01 << 19usize)) | (((val.to_bits() as u32) & 0x01) << 19usize);
713 }
714 #[doc = "Auto baud rate enable"]
715 #[inline(always)]
716 pub const fn abren(&self) -> bool {
717 let val = (self.0 >> 20usize) & 0x01;
718 val != 0
719 }
720 #[doc = "Auto baud rate enable"]
721 #[inline(always)]
722 pub fn set_abren(&mut self, val: bool) {
723 self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize);
724 }
725 #[doc = "Auto baud rate mode"]
726 #[inline(always)]
727 pub const fn abrmod(&self) -> super::vals::Abrmod {
728 let val = (self.0 >> 21usize) & 0x03;
729 super::vals::Abrmod::from_bits(val as u8)
730 }
731 #[doc = "Auto baud rate mode"]
732 #[inline(always)]
733 pub fn set_abrmod(&mut self, val: super::vals::Abrmod) {
734 self.0 = (self.0 & !(0x03 << 21usize)) | (((val.to_bits() as u32) & 0x03) << 21usize);
735 }
736 #[doc = "Receiver timeout enable"]
737 #[inline(always)]
738 pub const fn rtoen(&self) -> bool {
739 let val = (self.0 >> 23usize) & 0x01;
740 val != 0
741 }
742 #[doc = "Receiver timeout enable"]
743 #[inline(always)]
744 pub fn set_rtoen(&mut self, val: bool) {
745 self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize);
746 }
747 #[doc = "Address of the USART node"]
748 #[inline(always)]
749 pub const fn add(&self) -> u8 {
750 let val = (self.0 >> 24usize) & 0xff;
751 val as u8
752 }
753 #[doc = "Address of the USART node"]
754 #[inline(always)]
755 pub fn set_add(&mut self, val: u8) {
756 self.0 = (self.0 & !(0xff << 24usize)) | (((val as u32) & 0xff) << 24usize);
757 }
758 }
759 impl Default for Cr2 {
760 #[inline(always)]
761 fn default() -> Cr2 {
762 Cr2(0)
763 }
764 }
765 impl core::fmt::Debug for Cr2 {
766 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
767 f.debug_struct("Cr2")
768 .field("addm", &self.addm())
769 .field("lbdl", &self.lbdl())
770 .field("lbdie", &self.lbdie())
771 .field("lbcl", &self.lbcl())
772 .field("cpha", &self.cpha())
773 .field("cpol", &self.cpol())
774 .field("clken", &self.clken())
775 .field("stop", &self.stop())
776 .field("linen", &self.linen())
777 .field("swap", &self.swap())
778 .field("rxinv", &self.rxinv())
779 .field("txinv", &self.txinv())
780 .field("datainv", &self.datainv())
781 .field("msbfirst", &self.msbfirst())
782 .field("abren", &self.abren())
783 .field("abrmod", &self.abrmod())
784 .field("rtoen", &self.rtoen())
785 .field("add", &self.add())
786 .finish()
787 }
788 }
789 #[cfg(feature = "defmt")]
790 impl defmt::Format for Cr2 {
791 fn format(&self, f: defmt::Formatter) {
792 #[derive(defmt :: Format)]
793 struct Cr2 {
794 addm: super::vals::Addm,
795 lbdl: super::vals::Lbdl,
796 lbdie: bool,
797 lbcl: bool,
798 cpha: super::vals::Cpha,
799 cpol: super::vals::Cpol,
800 clken: bool,
801 stop: super::vals::Stop,
802 linen: bool,
803 swap: bool,
804 rxinv: bool,
805 txinv: bool,
806 datainv: bool,
807 msbfirst: super::vals::Msbfirst,
808 abren: bool,
809 abrmod: super::vals::Abrmod,
810 rtoen: bool,
811 add: u8,
812 }
813 let proxy = Cr2 {
814 addm: self.addm(),
815 lbdl: self.lbdl(),
816 lbdie: self.lbdie(),
817 lbcl: self.lbcl(),
818 cpha: self.cpha(),
819 cpol: self.cpol(),
820 clken: self.clken(),
821 stop: self.stop(),
822 linen: self.linen(),
823 swap: self.swap(),
824 rxinv: self.rxinv(),
825 txinv: self.txinv(),
826 datainv: self.datainv(),
827 msbfirst: self.msbfirst(),
828 abren: self.abren(),
829 abrmod: self.abrmod(),
830 rtoen: self.rtoen(),
831 add: self.add(),
832 };
833 defmt::write!(f, "{}", proxy)
834 }
835 }
836 #[doc = "Control register 3"]
837 #[repr(transparent)]
838 #[derive(Copy, Clone, Eq, PartialEq)]
839 pub struct Cr3(pub u32);
840 impl Cr3 {
841 #[doc = "Error interrupt enable"]
842 #[inline(always)]
843 pub const fn eie(&self) -> bool {
844 let val = (self.0 >> 0usize) & 0x01;
845 val != 0
846 }
847 #[doc = "Error interrupt enable"]
848 #[inline(always)]
849 pub fn set_eie(&mut self, val: bool) {
850 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
851 }
852 #[doc = "IrDA mode enable"]
853 #[inline(always)]
854 pub const fn iren(&self) -> bool {
855 let val = (self.0 >> 1usize) & 0x01;
856 val != 0
857 }
858 #[doc = "IrDA mode enable"]
859 #[inline(always)]
860 pub fn set_iren(&mut self, val: bool) {
861 self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
862 }
863 #[doc = "IrDA low-power"]
864 #[inline(always)]
865 pub const fn irlp(&self) -> super::vals::Irlp {
866 let val = (self.0 >> 2usize) & 0x01;
867 super::vals::Irlp::from_bits(val as u8)
868 }
869 #[doc = "IrDA low-power"]
870 #[inline(always)]
871 pub fn set_irlp(&mut self, val: super::vals::Irlp) {
872 self.0 = (self.0 & !(0x01 << 2usize)) | (((val.to_bits() as u32) & 0x01) << 2usize);
873 }
874 #[doc = "Half-duplex selection"]
875 #[inline(always)]
876 pub const fn hdsel(&self) -> bool {
877 let val = (self.0 >> 3usize) & 0x01;
878 val != 0
879 }
880 #[doc = "Half-duplex selection"]
881 #[inline(always)]
882 pub fn set_hdsel(&mut self, val: bool) {
883 self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize);
884 }
885 #[doc = "Smartcard NACK enable"]
886 #[inline(always)]
887 pub const fn nack(&self) -> bool {
888 let val = (self.0 >> 4usize) & 0x01;
889 val != 0
890 }
891 #[doc = "Smartcard NACK enable"]
892 #[inline(always)]
893 pub fn set_nack(&mut self, val: bool) {
894 self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
895 }
896 #[doc = "Smartcard mode enable"]
897 #[inline(always)]
898 pub const fn scen(&self) -> bool {
899 let val = (self.0 >> 5usize) & 0x01;
900 val != 0
901 }
902 #[doc = "Smartcard mode enable"]
903 #[inline(always)]
904 pub fn set_scen(&mut self, val: bool) {
905 self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize);
906 }
907 #[doc = "DMA enable receiver"]
908 #[inline(always)]
909 pub const fn dmar(&self) -> bool {
910 let val = (self.0 >> 6usize) & 0x01;
911 val != 0
912 }
913 #[doc = "DMA enable receiver"]
914 #[inline(always)]
915 pub fn set_dmar(&mut self, val: bool) {
916 self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize);
917 }
918 #[doc = "DMA enable transmitter"]
919 #[inline(always)]
920 pub const fn dmat(&self) -> bool {
921 let val = (self.0 >> 7usize) & 0x01;
922 val != 0
923 }
924 #[doc = "DMA enable transmitter"]
925 #[inline(always)]
926 pub fn set_dmat(&mut self, val: bool) {
927 self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize);
928 }
929 #[doc = "RTS enable"]
930 #[inline(always)]
931 pub const fn rtse(&self) -> bool {
932 let val = (self.0 >> 8usize) & 0x01;
933 val != 0
934 }
935 #[doc = "RTS enable"]
936 #[inline(always)]
937 pub fn set_rtse(&mut self, val: bool) {
938 self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize);
939 }
940 #[doc = "CTS enable"]
941 #[inline(always)]
942 pub const fn ctse(&self) -> bool {
943 let val = (self.0 >> 9usize) & 0x01;
944 val != 0
945 }
946 #[doc = "CTS enable"]
947 #[inline(always)]
948 pub fn set_ctse(&mut self, val: bool) {
949 self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize);
950 }
951 #[doc = "CTS interrupt enable"]
952 #[inline(always)]
953 pub const fn ctsie(&self) -> bool {
954 let val = (self.0 >> 10usize) & 0x01;
955 val != 0
956 }
957 #[doc = "CTS interrupt enable"]
958 #[inline(always)]
959 pub fn set_ctsie(&mut self, val: bool) {
960 self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize);
961 }
962 #[doc = "One sample bit method enable"]
963 #[inline(always)]
964 pub const fn onebit(&self) -> bool {
965 let val = (self.0 >> 11usize) & 0x01;
966 val != 0
967 }
968 #[doc = "One sample bit method enable"]
969 #[inline(always)]
970 pub fn set_onebit(&mut self, val: bool) {
971 self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize);
972 }
973 #[doc = "Overrun Disable"]
974 #[inline(always)]
975 pub const fn ovrdis(&self) -> bool {
976 let val = (self.0 >> 12usize) & 0x01;
977 val != 0
978 }
979 #[doc = "Overrun Disable"]
980 #[inline(always)]
981 pub fn set_ovrdis(&mut self, val: bool) {
982 self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize);
983 }
984 #[doc = "DMA Disable on Reception Error"]
985 #[inline(always)]
986 pub const fn ddre(&self) -> bool {
987 let val = (self.0 >> 13usize) & 0x01;
988 val != 0
989 }
990 #[doc = "DMA Disable on Reception Error"]
991 #[inline(always)]
992 pub fn set_ddre(&mut self, val: bool) {
993 self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize);
994 }
995 #[doc = "Driver enable mode"]
996 #[inline(always)]
997 pub const fn dem(&self) -> bool {
998 let val = (self.0 >> 14usize) & 0x01;
999 val != 0
1000 }
1001 #[doc = "Driver enable mode"]
1002 #[inline(always)]
1003 pub fn set_dem(&mut self, val: bool) {
1004 self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize);
1005 }
1006 #[doc = "Driver enable polarity selection"]
1007 #[inline(always)]
1008 pub const fn dep(&self) -> super::vals::Dep {
1009 let val = (self.0 >> 15usize) & 0x01;
1010 super::vals::Dep::from_bits(val as u8)
1011 }
1012 #[doc = "Driver enable polarity selection"]
1013 #[inline(always)]
1014 pub fn set_dep(&mut self, val: super::vals::Dep) {
1015 self.0 = (self.0 & !(0x01 << 15usize)) | (((val.to_bits() as u32) & 0x01) << 15usize);
1016 }
1017 #[doc = "Smartcard auto-retry count"]
1018 #[inline(always)]
1019 pub const fn scarcnt(&self) -> u8 {
1020 let val = (self.0 >> 17usize) & 0x07;
1021 val as u8
1022 }
1023 #[doc = "Smartcard auto-retry count"]
1024 #[inline(always)]
1025 pub fn set_scarcnt(&mut self, val: u8) {
1026 self.0 = (self.0 & !(0x07 << 17usize)) | (((val as u32) & 0x07) << 17usize);
1027 }
1028 #[doc = "Wakeup from Stop mode interrupt flag selection"]
1029 #[inline(always)]
1030 pub const fn wus(&self) -> super::vals::Wus {
1031 let val = (self.0 >> 20usize) & 0x03;
1032 super::vals::Wus::from_bits(val as u8)
1033 }
1034 #[doc = "Wakeup from Stop mode interrupt flag selection"]
1035 #[inline(always)]
1036 pub fn set_wus(&mut self, val: super::vals::Wus) {
1037 self.0 = (self.0 & !(0x03 << 20usize)) | (((val.to_bits() as u32) & 0x03) << 20usize);
1038 }
1039 #[doc = "Wakeup from Stop mode interrupt enable"]
1040 #[inline(always)]
1041 pub const fn wufie(&self) -> bool {
1042 let val = (self.0 >> 22usize) & 0x01;
1043 val != 0
1044 }
1045 #[doc = "Wakeup from Stop mode interrupt enable"]
1046 #[inline(always)]
1047 pub fn set_wufie(&mut self, val: bool) {
1048 self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize);
1049 }
1050 #[doc = "TXFIFO threshold interrupt enable"]
1051 #[inline(always)]
1052 pub const fn txftie(&self) -> bool {
1053 let val = (self.0 >> 23usize) & 0x01;
1054 val != 0
1055 }
1056 #[doc = "TXFIFO threshold interrupt enable"]
1057 #[inline(always)]
1058 pub fn set_txftie(&mut self, val: bool) {
1059 self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize);
1060 }
1061 #[doc = "Receive FIFO threshold configuration"]
1062 #[inline(always)]
1063 pub const fn rxftcfg(&self) -> u8 {
1064 let val = (self.0 >> 25usize) & 0x07;
1065 val as u8
1066 }
1067 #[doc = "Receive FIFO threshold configuration"]
1068 #[inline(always)]
1069 pub fn set_rxftcfg(&mut self, val: u8) {
1070 self.0 = (self.0 & !(0x07 << 25usize)) | (((val as u32) & 0x07) << 25usize);
1071 }
1072 #[doc = "RXFIFO threshold interrupt enable"]
1073 #[inline(always)]
1074 pub const fn rxftie(&self) -> bool {
1075 let val = (self.0 >> 28usize) & 0x01;
1076 val != 0
1077 }
1078 #[doc = "RXFIFO threshold interrupt enable"]
1079 #[inline(always)]
1080 pub fn set_rxftie(&mut self, val: bool) {
1081 self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize);
1082 }
1083 #[doc = "TXFIFO threshold configuration"]
1084 #[inline(always)]
1085 pub const fn txftcfg(&self) -> u8 {
1086 let val = (self.0 >> 29usize) & 0x07;
1087 val as u8
1088 }
1089 #[doc = "TXFIFO threshold configuration"]
1090 #[inline(always)]
1091 pub fn set_txftcfg(&mut self, val: u8) {
1092 self.0 = (self.0 & !(0x07 << 29usize)) | (((val as u32) & 0x07) << 29usize);
1093 }
1094 }
1095 impl Default for Cr3 {
1096 #[inline(always)]
1097 fn default() -> Cr3 {
1098 Cr3(0)
1099 }
1100 }
1101 impl core::fmt::Debug for Cr3 {
1102 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1103 f.debug_struct("Cr3")
1104 .field("eie", &self.eie())
1105 .field("iren", &self.iren())
1106 .field("irlp", &self.irlp())
1107 .field("hdsel", &self.hdsel())
1108 .field("nack", &self.nack())
1109 .field("scen", &self.scen())
1110 .field("dmar", &self.dmar())
1111 .field("dmat", &self.dmat())
1112 .field("rtse", &self.rtse())
1113 .field("ctse", &self.ctse())
1114 .field("ctsie", &self.ctsie())
1115 .field("onebit", &self.onebit())
1116 .field("ovrdis", &self.ovrdis())
1117 .field("ddre", &self.ddre())
1118 .field("dem", &self.dem())
1119 .field("dep", &self.dep())
1120 .field("scarcnt", &self.scarcnt())
1121 .field("wus", &self.wus())
1122 .field("wufie", &self.wufie())
1123 .field("txftie", &self.txftie())
1124 .field("rxftcfg", &self.rxftcfg())
1125 .field("rxftie", &self.rxftie())
1126 .field("txftcfg", &self.txftcfg())
1127 .finish()
1128 }
1129 }
1130 #[cfg(feature = "defmt")]
1131 impl defmt::Format for Cr3 {
1132 fn format(&self, f: defmt::Formatter) {
1133 #[derive(defmt :: Format)]
1134 struct Cr3 {
1135 eie: bool,
1136 iren: bool,
1137 irlp: super::vals::Irlp,
1138 hdsel: bool,
1139 nack: bool,
1140 scen: bool,
1141 dmar: bool,
1142 dmat: bool,
1143 rtse: bool,
1144 ctse: bool,
1145 ctsie: bool,
1146 onebit: bool,
1147 ovrdis: bool,
1148 ddre: bool,
1149 dem: bool,
1150 dep: super::vals::Dep,
1151 scarcnt: u8,
1152 wus: super::vals::Wus,
1153 wufie: bool,
1154 txftie: bool,
1155 rxftcfg: u8,
1156 rxftie: bool,
1157 txftcfg: u8,
1158 }
1159 let proxy = Cr3 {
1160 eie: self.eie(),
1161 iren: self.iren(),
1162 irlp: self.irlp(),
1163 hdsel: self.hdsel(),
1164 nack: self.nack(),
1165 scen: self.scen(),
1166 dmar: self.dmar(),
1167 dmat: self.dmat(),
1168 rtse: self.rtse(),
1169 ctse: self.ctse(),
1170 ctsie: self.ctsie(),
1171 onebit: self.onebit(),
1172 ovrdis: self.ovrdis(),
1173 ddre: self.ddre(),
1174 dem: self.dem(),
1175 dep: self.dep(),
1176 scarcnt: self.scarcnt(),
1177 wus: self.wus(),
1178 wufie: self.wufie(),
1179 txftie: self.txftie(),
1180 rxftcfg: self.rxftcfg(),
1181 rxftie: self.rxftie(),
1182 txftcfg: self.txftcfg(),
1183 };
1184 defmt::write!(f, "{}", proxy)
1185 }
1186 }
1187 #[doc = "Data register"]
1188 #[repr(transparent)]
1189 #[derive(Copy, Clone, Eq, PartialEq)]
1190 pub struct Dr(pub u32);
1191 impl Dr {
1192 #[doc = "Data value"]
1193 #[inline(always)]
1194 pub const fn dr(&self) -> u16 {
1195 let val = (self.0 >> 0usize) & 0x01ff;
1196 val as u16
1197 }
1198 #[doc = "Data value"]
1199 #[inline(always)]
1200 pub fn set_dr(&mut self, val: u16) {
1201 self.0 = (self.0 & !(0x01ff << 0usize)) | (((val as u32) & 0x01ff) << 0usize);
1202 }
1203 }
1204 impl Default for Dr {
1205 #[inline(always)]
1206 fn default() -> Dr {
1207 Dr(0)
1208 }
1209 }
1210 impl core::fmt::Debug for Dr {
1211 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1212 f.debug_struct("Dr").field("dr", &self.dr()).finish()
1213 }
1214 }
1215 #[cfg(feature = "defmt")]
1216 impl defmt::Format for Dr {
1217 fn format(&self, f: defmt::Formatter) {
1218 #[derive(defmt :: Format)]
1219 struct Dr {
1220 dr: u16,
1221 }
1222 let proxy = Dr { dr: self.dr() };
1223 defmt::write!(f, "{}", proxy)
1224 }
1225 }
1226 #[doc = "Guard time and prescaler register"]
1227 #[repr(transparent)]
1228 #[derive(Copy, Clone, Eq, PartialEq)]
1229 pub struct Gtpr(pub u32);
1230 impl Gtpr {
1231 #[doc = "Prescaler value"]
1232 #[inline(always)]
1233 pub const fn psc(&self) -> u8 {
1234 let val = (self.0 >> 0usize) & 0xff;
1235 val as u8
1236 }
1237 #[doc = "Prescaler value"]
1238 #[inline(always)]
1239 pub fn set_psc(&mut self, val: u8) {
1240 self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize);
1241 }
1242 #[doc = "Guard time value"]
1243 #[inline(always)]
1244 pub const fn gt(&self) -> u8 {
1245 let val = (self.0 >> 8usize) & 0xff;
1246 val as u8
1247 }
1248 #[doc = "Guard time value"]
1249 #[inline(always)]
1250 pub fn set_gt(&mut self, val: u8) {
1251 self.0 = (self.0 & !(0xff << 8usize)) | (((val as u32) & 0xff) << 8usize);
1252 }
1253 }
1254 impl Default for Gtpr {
1255 #[inline(always)]
1256 fn default() -> Gtpr {
1257 Gtpr(0)
1258 }
1259 }
1260 impl core::fmt::Debug for Gtpr {
1261 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1262 f.debug_struct("Gtpr")
1263 .field("psc", &self.psc())
1264 .field("gt", &self.gt())
1265 .finish()
1266 }
1267 }
1268 #[cfg(feature = "defmt")]
1269 impl defmt::Format for Gtpr {
1270 fn format(&self, f: defmt::Formatter) {
1271 #[derive(defmt :: Format)]
1272 struct Gtpr {
1273 psc: u8,
1274 gt: u8,
1275 }
1276 let proxy = Gtpr {
1277 psc: self.psc(),
1278 gt: self.gt(),
1279 };
1280 defmt::write!(f, "{}", proxy)
1281 }
1282 }
1283 #[doc = "Interrupt flag clear register"]
1284 #[repr(transparent)]
1285 #[derive(Copy, Clone, Eq, PartialEq)]
1286 pub struct Icr(pub u32);
1287 impl Icr {
1288 #[doc = "Parity error clear flag"]
1289 #[inline(always)]
1290 pub const fn pe(&self) -> bool {
1291 let val = (self.0 >> 0usize) & 0x01;
1292 val != 0
1293 }
1294 #[doc = "Parity error clear flag"]
1295 #[inline(always)]
1296 pub fn set_pe(&mut self, val: bool) {
1297 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
1298 }
1299 #[doc = "Framing error clear flag"]
1300 #[inline(always)]
1301 pub const fn fe(&self) -> bool {
1302 let val = (self.0 >> 1usize) & 0x01;
1303 val != 0
1304 }
1305 #[doc = "Framing error clear flag"]
1306 #[inline(always)]
1307 pub fn set_fe(&mut self, val: bool) {
1308 self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
1309 }
1310 #[doc = "Noise error clear flag"]
1311 #[inline(always)]
1312 pub const fn ne(&self) -> bool {
1313 let val = (self.0 >> 2usize) & 0x01;
1314 val != 0
1315 }
1316 #[doc = "Noise error clear flag"]
1317 #[inline(always)]
1318 pub fn set_ne(&mut self, val: bool) {
1319 self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
1320 }
1321 #[doc = "Overrun error clear flag"]
1322 #[inline(always)]
1323 pub const fn ore(&self) -> bool {
1324 let val = (self.0 >> 3usize) & 0x01;
1325 val != 0
1326 }
1327 #[doc = "Overrun error clear flag"]
1328 #[inline(always)]
1329 pub fn set_ore(&mut self, val: bool) {
1330 self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize);
1331 }
1332 #[doc = "Idle line detected clear flag"]
1333 #[inline(always)]
1334 pub const fn idle(&self) -> bool {
1335 let val = (self.0 >> 4usize) & 0x01;
1336 val != 0
1337 }
1338 #[doc = "Idle line detected clear flag"]
1339 #[inline(always)]
1340 pub fn set_idle(&mut self, val: bool) {
1341 self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
1342 }
1343 #[doc = "Transmission complete clear flag"]
1344 #[inline(always)]
1345 pub const fn tc(&self) -> bool {
1346 let val = (self.0 >> 6usize) & 0x01;
1347 val != 0
1348 }
1349 #[doc = "Transmission complete clear flag"]
1350 #[inline(always)]
1351 pub fn set_tc(&mut self, val: bool) {
1352 self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize);
1353 }
1354 #[doc = "LIN break detection clear flag"]
1355 #[inline(always)]
1356 pub const fn lbd(&self) -> bool {
1357 let val = (self.0 >> 8usize) & 0x01;
1358 val != 0
1359 }
1360 #[doc = "LIN break detection clear flag"]
1361 #[inline(always)]
1362 pub fn set_lbd(&mut self, val: bool) {
1363 self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize);
1364 }
1365 #[doc = "CTS clear flag"]
1366 #[inline(always)]
1367 pub const fn cts(&self) -> bool {
1368 let val = (self.0 >> 9usize) & 0x01;
1369 val != 0
1370 }
1371 #[doc = "CTS clear flag"]
1372 #[inline(always)]
1373 pub fn set_cts(&mut self, val: bool) {
1374 self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize);
1375 }
1376 #[doc = "Receiver timeout clear flag"]
1377 #[inline(always)]
1378 pub const fn rtof(&self) -> bool {
1379 let val = (self.0 >> 11usize) & 0x01;
1380 val != 0
1381 }
1382 #[doc = "Receiver timeout clear flag"]
1383 #[inline(always)]
1384 pub fn set_rtof(&mut self, val: bool) {
1385 self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize);
1386 }
1387 #[doc = "End of block clear flag"]
1388 #[inline(always)]
1389 pub const fn eobf(&self) -> bool {
1390 let val = (self.0 >> 12usize) & 0x01;
1391 val != 0
1392 }
1393 #[doc = "End of block clear flag"]
1394 #[inline(always)]
1395 pub fn set_eobf(&mut self, val: bool) {
1396 self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize);
1397 }
1398 #[doc = "Character match clear flag"]
1399 #[inline(always)]
1400 pub const fn cmf(&self) -> bool {
1401 let val = (self.0 >> 17usize) & 0x01;
1402 val != 0
1403 }
1404 #[doc = "Character match clear flag"]
1405 #[inline(always)]
1406 pub fn set_cmf(&mut self, val: bool) {
1407 self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize);
1408 }
1409 #[doc = "Wakeup from Stop mode clear flag"]
1410 #[inline(always)]
1411 pub const fn wuf(&self) -> bool {
1412 let val = (self.0 >> 20usize) & 0x01;
1413 val != 0
1414 }
1415 #[doc = "Wakeup from Stop mode clear flag"]
1416 #[inline(always)]
1417 pub fn set_wuf(&mut self, val: bool) {
1418 self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize);
1419 }
1420 }
1421 impl Default for Icr {
1422 #[inline(always)]
1423 fn default() -> Icr {
1424 Icr(0)
1425 }
1426 }
1427 impl core::fmt::Debug for Icr {
1428 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1429 f.debug_struct("Icr")
1430 .field("pe", &self.pe())
1431 .field("fe", &self.fe())
1432 .field("ne", &self.ne())
1433 .field("ore", &self.ore())
1434 .field("idle", &self.idle())
1435 .field("tc", &self.tc())
1436 .field("lbd", &self.lbd())
1437 .field("cts", &self.cts())
1438 .field("rtof", &self.rtof())
1439 .field("eobf", &self.eobf())
1440 .field("cmf", &self.cmf())
1441 .field("wuf", &self.wuf())
1442 .finish()
1443 }
1444 }
1445 #[cfg(feature = "defmt")]
1446 impl defmt::Format for Icr {
1447 fn format(&self, f: defmt::Formatter) {
1448 #[derive(defmt :: Format)]
1449 struct Icr {
1450 pe: bool,
1451 fe: bool,
1452 ne: bool,
1453 ore: bool,
1454 idle: bool,
1455 tc: bool,
1456 lbd: bool,
1457 cts: bool,
1458 rtof: bool,
1459 eobf: bool,
1460 cmf: bool,
1461 wuf: bool,
1462 }
1463 let proxy = Icr {
1464 pe: self.pe(),
1465 fe: self.fe(),
1466 ne: self.ne(),
1467 ore: self.ore(),
1468 idle: self.idle(),
1469 tc: self.tc(),
1470 lbd: self.lbd(),
1471 cts: self.cts(),
1472 rtof: self.rtof(),
1473 eobf: self.eobf(),
1474 cmf: self.cmf(),
1475 wuf: self.wuf(),
1476 };
1477 defmt::write!(f, "{}", proxy)
1478 }
1479 }
1480 #[doc = "Interrupt & status register"]
1481 #[repr(transparent)]
1482 #[derive(Copy, Clone, Eq, PartialEq)]
1483 pub struct Isr(pub u32);
1484 impl Isr {
1485 #[doc = "Parity error"]
1486 #[inline(always)]
1487 pub const fn pe(&self) -> bool {
1488 let val = (self.0 >> 0usize) & 0x01;
1489 val != 0
1490 }
1491 #[doc = "Parity error"]
1492 #[inline(always)]
1493 pub fn set_pe(&mut self, val: bool) {
1494 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
1495 }
1496 #[doc = "Framing error"]
1497 #[inline(always)]
1498 pub const fn fe(&self) -> bool {
1499 let val = (self.0 >> 1usize) & 0x01;
1500 val != 0
1501 }
1502 #[doc = "Framing error"]
1503 #[inline(always)]
1504 pub fn set_fe(&mut self, val: bool) {
1505 self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
1506 }
1507 #[doc = "Noise error flag"]
1508 #[inline(always)]
1509 pub const fn ne(&self) -> bool {
1510 let val = (self.0 >> 2usize) & 0x01;
1511 val != 0
1512 }
1513 #[doc = "Noise error flag"]
1514 #[inline(always)]
1515 pub fn set_ne(&mut self, val: bool) {
1516 self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
1517 }
1518 #[doc = "Overrun error"]
1519 #[inline(always)]
1520 pub const fn ore(&self) -> bool {
1521 let val = (self.0 >> 3usize) & 0x01;
1522 val != 0
1523 }
1524 #[doc = "Overrun error"]
1525 #[inline(always)]
1526 pub fn set_ore(&mut self, val: bool) {
1527 self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize);
1528 }
1529 #[doc = "Idle line detected"]
1530 #[inline(always)]
1531 pub const fn idle(&self) -> bool {
1532 let val = (self.0 >> 4usize) & 0x01;
1533 val != 0
1534 }
1535 #[doc = "Idle line detected"]
1536 #[inline(always)]
1537 pub fn set_idle(&mut self, val: bool) {
1538 self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
1539 }
1540 #[doc = "Read data register not empty"]
1541 #[inline(always)]
1542 pub const fn rxne(&self) -> bool {
1543 let val = (self.0 >> 5usize) & 0x01;
1544 val != 0
1545 }
1546 #[doc = "Read data register not empty"]
1547 #[inline(always)]
1548 pub fn set_rxne(&mut self, val: bool) {
1549 self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize);
1550 }
1551 #[doc = "Transmission complete"]
1552 #[inline(always)]
1553 pub const fn tc(&self) -> bool {
1554 let val = (self.0 >> 6usize) & 0x01;
1555 val != 0
1556 }
1557 #[doc = "Transmission complete"]
1558 #[inline(always)]
1559 pub fn set_tc(&mut self, val: bool) {
1560 self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize);
1561 }
1562 #[doc = "Transmit data register empty"]
1563 #[inline(always)]
1564 pub const fn txe(&self) -> bool {
1565 let val = (self.0 >> 7usize) & 0x01;
1566 val != 0
1567 }
1568 #[doc = "Transmit data register empty"]
1569 #[inline(always)]
1570 pub fn set_txe(&mut self, val: bool) {
1571 self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize);
1572 }
1573 #[doc = "LIN break detection flag"]
1574 #[inline(always)]
1575 pub const fn lbd(&self) -> bool {
1576 let val = (self.0 >> 8usize) & 0x01;
1577 val != 0
1578 }
1579 #[doc = "LIN break detection flag"]
1580 #[inline(always)]
1581 pub fn set_lbd(&mut self, val: bool) {
1582 self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize);
1583 }
1584 #[doc = "CTS interrupt flag"]
1585 #[inline(always)]
1586 pub const fn ctsif(&self) -> bool {
1587 let val = (self.0 >> 9usize) & 0x01;
1588 val != 0
1589 }
1590 #[doc = "CTS interrupt flag"]
1591 #[inline(always)]
1592 pub fn set_ctsif(&mut self, val: bool) {
1593 self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize);
1594 }
1595 #[doc = "CTS flag"]
1596 #[inline(always)]
1597 pub const fn cts(&self) -> bool {
1598 let val = (self.0 >> 10usize) & 0x01;
1599 val != 0
1600 }
1601 #[doc = "CTS flag"]
1602 #[inline(always)]
1603 pub fn set_cts(&mut self, val: bool) {
1604 self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize);
1605 }
1606 #[doc = "Receiver timeout"]
1607 #[inline(always)]
1608 pub const fn rtof(&self) -> bool {
1609 let val = (self.0 >> 11usize) & 0x01;
1610 val != 0
1611 }
1612 #[doc = "Receiver timeout"]
1613 #[inline(always)]
1614 pub fn set_rtof(&mut self, val: bool) {
1615 self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize);
1616 }
1617 #[doc = "End of block flag"]
1618 #[inline(always)]
1619 pub const fn eobf(&self) -> bool {
1620 let val = (self.0 >> 12usize) & 0x01;
1621 val != 0
1622 }
1623 #[doc = "End of block flag"]
1624 #[inline(always)]
1625 pub fn set_eobf(&mut self, val: bool) {
1626 self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize);
1627 }
1628 #[doc = "Auto baud rate error"]
1629 #[inline(always)]
1630 pub const fn abre(&self) -> bool {
1631 let val = (self.0 >> 14usize) & 0x01;
1632 val != 0
1633 }
1634 #[doc = "Auto baud rate error"]
1635 #[inline(always)]
1636 pub fn set_abre(&mut self, val: bool) {
1637 self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize);
1638 }
1639 #[doc = "Auto baud rate flag"]
1640 #[inline(always)]
1641 pub const fn abrf(&self) -> bool {
1642 let val = (self.0 >> 15usize) & 0x01;
1643 val != 0
1644 }
1645 #[doc = "Auto baud rate flag"]
1646 #[inline(always)]
1647 pub fn set_abrf(&mut self, val: bool) {
1648 self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize);
1649 }
1650 #[doc = "Busy flag"]
1651 #[inline(always)]
1652 pub const fn busy(&self) -> bool {
1653 let val = (self.0 >> 16usize) & 0x01;
1654 val != 0
1655 }
1656 #[doc = "Busy flag"]
1657 #[inline(always)]
1658 pub fn set_busy(&mut self, val: bool) {
1659 self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize);
1660 }
1661 #[doc = "character match flag"]
1662 #[inline(always)]
1663 pub const fn cmf(&self) -> bool {
1664 let val = (self.0 >> 17usize) & 0x01;
1665 val != 0
1666 }
1667 #[doc = "character match flag"]
1668 #[inline(always)]
1669 pub fn set_cmf(&mut self, val: bool) {
1670 self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize);
1671 }
1672 #[doc = "Send break flag"]
1673 #[inline(always)]
1674 pub const fn sbkf(&self) -> bool {
1675 let val = (self.0 >> 18usize) & 0x01;
1676 val != 0
1677 }
1678 #[doc = "Send break flag"]
1679 #[inline(always)]
1680 pub fn set_sbkf(&mut self, val: bool) {
1681 self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize);
1682 }
1683 #[doc = "Receiver wakeup from Mute mode"]
1684 #[inline(always)]
1685 pub const fn rwu(&self) -> super::vals::Rwu {
1686 let val = (self.0 >> 19usize) & 0x01;
1687 super::vals::Rwu::from_bits(val as u8)
1688 }
1689 #[doc = "Receiver wakeup from Mute mode"]
1690 #[inline(always)]
1691 pub fn set_rwu(&mut self, val: super::vals::Rwu) {
1692 self.0 = (self.0 & !(0x01 << 19usize)) | (((val.to_bits() as u32) & 0x01) << 19usize);
1693 }
1694 #[doc = "Wakeup from Stop mode flag"]
1695 #[inline(always)]
1696 pub const fn wuf(&self) -> bool {
1697 let val = (self.0 >> 20usize) & 0x01;
1698 val != 0
1699 }
1700 #[doc = "Wakeup from Stop mode flag"]
1701 #[inline(always)]
1702 pub fn set_wuf(&mut self, val: bool) {
1703 self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize);
1704 }
1705 #[doc = "Transmit enable acknowledge flag"]
1706 #[inline(always)]
1707 pub const fn teack(&self) -> bool {
1708 let val = (self.0 >> 21usize) & 0x01;
1709 val != 0
1710 }
1711 #[doc = "Transmit enable acknowledge flag"]
1712 #[inline(always)]
1713 pub fn set_teack(&mut self, val: bool) {
1714 self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize);
1715 }
1716 #[doc = "Receive enable acknowledge flag"]
1717 #[inline(always)]
1718 pub const fn reack(&self) -> bool {
1719 let val = (self.0 >> 22usize) & 0x01;
1720 val != 0
1721 }
1722 #[doc = "Receive enable acknowledge flag"]
1723 #[inline(always)]
1724 pub fn set_reack(&mut self, val: bool) {
1725 self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize);
1726 }
1727 #[doc = "TXFIFO Empty"]
1728 #[inline(always)]
1729 pub const fn txfe(&self) -> bool {
1730 let val = (self.0 >> 23usize) & 0x01;
1731 val != 0
1732 }
1733 #[doc = "TXFIFO Empty"]
1734 #[inline(always)]
1735 pub fn set_txfe(&mut self, val: bool) {
1736 self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize);
1737 }
1738 #[doc = "RXFIFO Full"]
1739 #[inline(always)]
1740 pub const fn rxff(&self) -> bool {
1741 let val = (self.0 >> 24usize) & 0x01;
1742 val != 0
1743 }
1744 #[doc = "RXFIFO Full"]
1745 #[inline(always)]
1746 pub fn set_rxff(&mut self, val: bool) {
1747 self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize);
1748 }
1749 #[doc = "RXFIFO threshold flag"]
1750 #[inline(always)]
1751 pub const fn rxft(&self) -> bool {
1752 let val = (self.0 >> 26usize) & 0x01;
1753 val != 0
1754 }
1755 #[doc = "RXFIFO threshold flag"]
1756 #[inline(always)]
1757 pub fn set_rxft(&mut self, val: bool) {
1758 self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize);
1759 }
1760 #[doc = "TXFIFO threshold flag"]
1761 #[inline(always)]
1762 pub const fn txft(&self) -> bool {
1763 let val = (self.0 >> 27usize) & 0x01;
1764 val != 0
1765 }
1766 #[doc = "TXFIFO threshold flag"]
1767 #[inline(always)]
1768 pub fn set_txft(&mut self, val: bool) {
1769 self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize);
1770 }
1771 }
1772 impl Default for Isr {
1773 #[inline(always)]
1774 fn default() -> Isr {
1775 Isr(0)
1776 }
1777 }
1778 impl core::fmt::Debug for Isr {
1779 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1780 f.debug_struct("Isr")
1781 .field("pe", &self.pe())
1782 .field("fe", &self.fe())
1783 .field("ne", &self.ne())
1784 .field("ore", &self.ore())
1785 .field("idle", &self.idle())
1786 .field("rxne", &self.rxne())
1787 .field("tc", &self.tc())
1788 .field("txe", &self.txe())
1789 .field("lbd", &self.lbd())
1790 .field("ctsif", &self.ctsif())
1791 .field("cts", &self.cts())
1792 .field("rtof", &self.rtof())
1793 .field("eobf", &self.eobf())
1794 .field("abre", &self.abre())
1795 .field("abrf", &self.abrf())
1796 .field("busy", &self.busy())
1797 .field("cmf", &self.cmf())
1798 .field("sbkf", &self.sbkf())
1799 .field("rwu", &self.rwu())
1800 .field("wuf", &self.wuf())
1801 .field("teack", &self.teack())
1802 .field("reack", &self.reack())
1803 .field("txfe", &self.txfe())
1804 .field("rxff", &self.rxff())
1805 .field("rxft", &self.rxft())
1806 .field("txft", &self.txft())
1807 .finish()
1808 }
1809 }
1810 #[cfg(feature = "defmt")]
1811 impl defmt::Format for Isr {
1812 fn format(&self, f: defmt::Formatter) {
1813 #[derive(defmt :: Format)]
1814 struct Isr {
1815 pe: bool,
1816 fe: bool,
1817 ne: bool,
1818 ore: bool,
1819 idle: bool,
1820 rxne: bool,
1821 tc: bool,
1822 txe: bool,
1823 lbd: bool,
1824 ctsif: bool,
1825 cts: bool,
1826 rtof: bool,
1827 eobf: bool,
1828 abre: bool,
1829 abrf: bool,
1830 busy: bool,
1831 cmf: bool,
1832 sbkf: bool,
1833 rwu: super::vals::Rwu,
1834 wuf: bool,
1835 teack: bool,
1836 reack: bool,
1837 txfe: bool,
1838 rxff: bool,
1839 rxft: bool,
1840 txft: bool,
1841 }
1842 let proxy = Isr {
1843 pe: self.pe(),
1844 fe: self.fe(),
1845 ne: self.ne(),
1846 ore: self.ore(),
1847 idle: self.idle(),
1848 rxne: self.rxne(),
1849 tc: self.tc(),
1850 txe: self.txe(),
1851 lbd: self.lbd(),
1852 ctsif: self.ctsif(),
1853 cts: self.cts(),
1854 rtof: self.rtof(),
1855 eobf: self.eobf(),
1856 abre: self.abre(),
1857 abrf: self.abrf(),
1858 busy: self.busy(),
1859 cmf: self.cmf(),
1860 sbkf: self.sbkf(),
1861 rwu: self.rwu(),
1862 wuf: self.wuf(),
1863 teack: self.teack(),
1864 reack: self.reack(),
1865 txfe: self.txfe(),
1866 rxff: self.rxff(),
1867 rxft: self.rxft(),
1868 txft: self.txft(),
1869 };
1870 defmt::write!(f, "{}", proxy)
1871 }
1872 }
1873 #[doc = "Prescaler register"]
1874 #[repr(transparent)]
1875 #[derive(Copy, Clone, Eq, PartialEq)]
1876 pub struct Presc(pub u32);
1877 impl Presc {
1878 #[doc = "Clock prescaler"]
1879 #[inline(always)]
1880 pub const fn prescaler(&self) -> super::vals::Presc {
1881 let val = (self.0 >> 0usize) & 0x0f;
1882 super::vals::Presc::from_bits(val as u8)
1883 }
1884 #[doc = "Clock prescaler"]
1885 #[inline(always)]
1886 pub fn set_prescaler(&mut self, val: super::vals::Presc) {
1887 self.0 = (self.0 & !(0x0f << 0usize)) | (((val.to_bits() as u32) & 0x0f) << 0usize);
1888 }
1889 }
1890 impl Default for Presc {
1891 #[inline(always)]
1892 fn default() -> Presc {
1893 Presc(0)
1894 }
1895 }
1896 impl core::fmt::Debug for Presc {
1897 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1898 f.debug_struct("Presc").field("prescaler", &self.prescaler()).finish()
1899 }
1900 }
1901 #[cfg(feature = "defmt")]
1902 impl defmt::Format for Presc {
1903 fn format(&self, f: defmt::Formatter) {
1904 #[derive(defmt :: Format)]
1905 struct Presc {
1906 prescaler: super::vals::Presc,
1907 }
1908 let proxy = Presc {
1909 prescaler: self.prescaler(),
1910 };
1911 defmt::write!(f, "{}", proxy)
1912 }
1913 }
1914 #[doc = "Request register"]
1915 #[repr(transparent)]
1916 #[derive(Copy, Clone, Eq, PartialEq)]
1917 pub struct Rqr(pub u32);
1918 impl Rqr {
1919 #[doc = "Auto baud rate request. Resets the ABRF flag in the USART_ISR and request an automatic baud rate measurement on the next received data frame."]
1920 #[inline(always)]
1921 pub const fn abrrq(&self) -> bool {
1922 let val = (self.0 >> 0usize) & 0x01;
1923 val != 0
1924 }
1925 #[doc = "Auto baud rate request. Resets the ABRF flag in the USART_ISR and request an automatic baud rate measurement on the next received data frame."]
1926 #[inline(always)]
1927 pub fn set_abrrq(&mut self, val: bool) {
1928 self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
1929 }
1930 #[doc = "Send break request. Sets the SBKF flag and request to send a BREAK on the line, as soon as the transmit machine is available"]
1931 #[inline(always)]
1932 pub const fn sbkrq(&self) -> bool {
1933 let val = (self.0 >> 1usize) & 0x01;
1934 val != 0
1935 }
1936 #[doc = "Send break request. Sets the SBKF flag and request to send a BREAK on the line, as soon as the transmit machine is available"]
1937 #[inline(always)]
1938 pub fn set_sbkrq(&mut self, val: bool) {
1939 self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
1940 }
1941 #[doc = "Mute mode request. Puts the USART in mute mode and sets the RWU flag."]
1942 #[inline(always)]
1943 pub const fn mmrq(&self) -> bool {
1944 let val = (self.0 >> 2usize) & 0x01;
1945 val != 0
1946 }
1947 #[doc = "Mute mode request. Puts the USART in mute mode and sets the RWU flag."]
1948 #[inline(always)]
1949 pub fn set_mmrq(&mut self, val: bool) {
1950 self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
1951 }
1952 #[doc = "Receive data flush request. Clears the RXNE flag. This allows to discard the received data without reading it, and avoid an overrun condition"]
1953 #[inline(always)]
1954 pub const fn rxfrq(&self) -> bool {
1955 let val = (self.0 >> 3usize) & 0x01;
1956 val != 0
1957 }
1958 #[doc = "Receive data flush request. Clears the RXNE flag. This allows to discard the received data without reading it, and avoid an overrun condition"]
1959 #[inline(always)]
1960 pub fn set_rxfrq(&mut self, val: bool) {
1961 self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize);
1962 }
1963 #[doc = "Transmit data flush request. Sets the TXE flags. This allows to discard the transmit data."]
1964 #[inline(always)]
1965 pub const fn txfrq(&self) -> bool {
1966 let val = (self.0 >> 4usize) & 0x01;
1967 val != 0
1968 }
1969 #[doc = "Transmit data flush request. Sets the TXE flags. This allows to discard the transmit data."]
1970 #[inline(always)]
1971 pub fn set_txfrq(&mut self, val: bool) {
1972 self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
1973 }
1974 }
1975 impl Default for Rqr {
1976 #[inline(always)]
1977 fn default() -> Rqr {
1978 Rqr(0)
1979 }
1980 }
1981 impl core::fmt::Debug for Rqr {
1982 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1983 f.debug_struct("Rqr")
1984 .field("abrrq", &self.abrrq())
1985 .field("sbkrq", &self.sbkrq())
1986 .field("mmrq", &self.mmrq())
1987 .field("rxfrq", &self.rxfrq())
1988 .field("txfrq", &self.txfrq())
1989 .finish()
1990 }
1991 }
1992 #[cfg(feature = "defmt")]
1993 impl defmt::Format for Rqr {
1994 fn format(&self, f: defmt::Formatter) {
1995 #[derive(defmt :: Format)]
1996 struct Rqr {
1997 abrrq: bool,
1998 sbkrq: bool,
1999 mmrq: bool,
2000 rxfrq: bool,
2001 txfrq: bool,
2002 }
2003 let proxy = Rqr {
2004 abrrq: self.abrrq(),
2005 sbkrq: self.sbkrq(),
2006 mmrq: self.mmrq(),
2007 rxfrq: self.rxfrq(),
2008 txfrq: self.txfrq(),
2009 };
2010 defmt::write!(f, "{}", proxy)
2011 }
2012 }
2013 #[doc = "Receiver timeout register"]
2014 #[repr(transparent)]
2015 #[derive(Copy, Clone, Eq, PartialEq)]
2016 pub struct Rtor(pub u32);
2017 impl Rtor {
2018 #[doc = "Receiver timeout value"]
2019 #[inline(always)]
2020 pub const fn rto(&self) -> u32 {
2021 let val = (self.0 >> 0usize) & 0x00ff_ffff;
2022 val as u32
2023 }
2024 #[doc = "Receiver timeout value"]
2025 #[inline(always)]
2026 pub fn set_rto(&mut self, val: u32) {
2027 self.0 = (self.0 & !(0x00ff_ffff << 0usize)) | (((val as u32) & 0x00ff_ffff) << 0usize);
2028 }
2029 #[doc = "Block Length"]
2030 #[inline(always)]
2031 pub const fn blen(&self) -> u8 {
2032 let val = (self.0 >> 24usize) & 0xff;
2033 val as u8
2034 }
2035 #[doc = "Block Length"]
2036 #[inline(always)]
2037 pub fn set_blen(&mut self, val: u8) {
2038 self.0 = (self.0 & !(0xff << 24usize)) | (((val as u32) & 0xff) << 24usize);
2039 }
2040 }
2041 impl Default for Rtor {
2042 #[inline(always)]
2043 fn default() -> Rtor {
2044 Rtor(0)
2045 }
2046 }
2047 impl core::fmt::Debug for Rtor {
2048 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2049 f.debug_struct("Rtor")
2050 .field("rto", &self.rto())
2051 .field("blen", &self.blen())
2052 .finish()
2053 }
2054 }
2055 #[cfg(feature = "defmt")]
2056 impl defmt::Format for Rtor {
2057 fn format(&self, f: defmt::Formatter) {
2058 #[derive(defmt :: Format)]
2059 struct Rtor {
2060 rto: u32,
2061 blen: u8,
2062 }
2063 let proxy = Rtor {
2064 rto: self.rto(),
2065 blen: self.blen(),
2066 };
2067 defmt::write!(f, "{}", proxy)
2068 }
2069 }
2070}
2071pub mod vals {
2072 #[repr(u8)]
2073 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2074 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2075 pub enum Abrmod {
2076 #[doc = "Measurement of the start bit is used to detect the baud rate"]
2077 START = 0x0,
2078 #[doc = "Falling edge to falling edge measurement"]
2079 EDGE = 0x01,
2080 #[doc = "0x7F frame detection"]
2081 FRAME7F = 0x02,
2082 #[doc = "0x55 frame detection"]
2083 FRAME55 = 0x03,
2084 }
2085 impl Abrmod {
2086 #[inline(always)]
2087 pub const fn from_bits(val: u8) -> Abrmod {
2088 unsafe { core::mem::transmute(val & 0x03) }
2089 }
2090 #[inline(always)]
2091 pub const fn to_bits(self) -> u8 {
2092 unsafe { core::mem::transmute(self) }
2093 }
2094 }
2095 impl From<u8> for Abrmod {
2096 #[inline(always)]
2097 fn from(val: u8) -> Abrmod {
2098 Abrmod::from_bits(val)
2099 }
2100 }
2101 impl From<Abrmod> for u8 {
2102 #[inline(always)]
2103 fn from(val: Abrmod) -> u8 {
2104 Abrmod::to_bits(val)
2105 }
2106 }
2107 #[repr(u8)]
2108 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2109 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2110 pub enum Addm {
2111 #[doc = "4-bit address detection"]
2112 BIT4 = 0x0,
2113 #[doc = "7-bit address detection"]
2114 BIT7 = 0x01,
2115 }
2116 impl Addm {
2117 #[inline(always)]
2118 pub const fn from_bits(val: u8) -> Addm {
2119 unsafe { core::mem::transmute(val & 0x01) }
2120 }
2121 #[inline(always)]
2122 pub const fn to_bits(self) -> u8 {
2123 unsafe { core::mem::transmute(self) }
2124 }
2125 }
2126 impl From<u8> for Addm {
2127 #[inline(always)]
2128 fn from(val: u8) -> Addm {
2129 Addm::from_bits(val)
2130 }
2131 }
2132 impl From<Addm> for u8 {
2133 #[inline(always)]
2134 fn from(val: Addm) -> u8 {
2135 Addm::to_bits(val)
2136 }
2137 }
2138 #[repr(u8)]
2139 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2140 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2141 pub enum Cpha {
2142 #[doc = "The first clock transition is the first data capture edge"]
2143 FIRST = 0x0,
2144 #[doc = "The second clock transition is the first data capture edge"]
2145 SECOND = 0x01,
2146 }
2147 impl Cpha {
2148 #[inline(always)]
2149 pub const fn from_bits(val: u8) -> Cpha {
2150 unsafe { core::mem::transmute(val & 0x01) }
2151 }
2152 #[inline(always)]
2153 pub const fn to_bits(self) -> u8 {
2154 unsafe { core::mem::transmute(self) }
2155 }
2156 }
2157 impl From<u8> for Cpha {
2158 #[inline(always)]
2159 fn from(val: u8) -> Cpha {
2160 Cpha::from_bits(val)
2161 }
2162 }
2163 impl From<Cpha> for u8 {
2164 #[inline(always)]
2165 fn from(val: Cpha) -> u8 {
2166 Cpha::to_bits(val)
2167 }
2168 }
2169 #[repr(u8)]
2170 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2171 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2172 pub enum Cpol {
2173 #[doc = "Steady low value on CK pin outside transmission window"]
2174 LOW = 0x0,
2175 #[doc = "Steady high value on CK pin outside transmission window"]
2176 HIGH = 0x01,
2177 }
2178 impl Cpol {
2179 #[inline(always)]
2180 pub const fn from_bits(val: u8) -> Cpol {
2181 unsafe { core::mem::transmute(val & 0x01) }
2182 }
2183 #[inline(always)]
2184 pub const fn to_bits(self) -> u8 {
2185 unsafe { core::mem::transmute(self) }
2186 }
2187 }
2188 impl From<u8> for Cpol {
2189 #[inline(always)]
2190 fn from(val: u8) -> Cpol {
2191 Cpol::from_bits(val)
2192 }
2193 }
2194 impl From<Cpol> for u8 {
2195 #[inline(always)]
2196 fn from(val: Cpol) -> u8 {
2197 Cpol::to_bits(val)
2198 }
2199 }
2200 #[repr(u8)]
2201 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2202 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2203 pub enum Dep {
2204 #[doc = "DE signal is active high"]
2205 HIGH = 0x0,
2206 #[doc = "DE signal is active low"]
2207 LOW = 0x01,
2208 }
2209 impl Dep {
2210 #[inline(always)]
2211 pub const fn from_bits(val: u8) -> Dep {
2212 unsafe { core::mem::transmute(val & 0x01) }
2213 }
2214 #[inline(always)]
2215 pub const fn to_bits(self) -> u8 {
2216 unsafe { core::mem::transmute(self) }
2217 }
2218 }
2219 impl From<u8> for Dep {
2220 #[inline(always)]
2221 fn from(val: u8) -> Dep {
2222 Dep::from_bits(val)
2223 }
2224 }
2225 impl From<Dep> for u8 {
2226 #[inline(always)]
2227 fn from(val: Dep) -> u8 {
2228 Dep::to_bits(val)
2229 }
2230 }
2231 #[repr(u8)]
2232 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2233 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2234 pub enum Irlp {
2235 #[doc = "Normal mode"]
2236 NORMAL = 0x0,
2237 #[doc = "Low-power mode"]
2238 LOW_POWER = 0x01,
2239 }
2240 impl Irlp {
2241 #[inline(always)]
2242 pub const fn from_bits(val: u8) -> Irlp {
2243 unsafe { core::mem::transmute(val & 0x01) }
2244 }
2245 #[inline(always)]
2246 pub const fn to_bits(self) -> u8 {
2247 unsafe { core::mem::transmute(self) }
2248 }
2249 }
2250 impl From<u8> for Irlp {
2251 #[inline(always)]
2252 fn from(val: u8) -> Irlp {
2253 Irlp::from_bits(val)
2254 }
2255 }
2256 impl From<Irlp> for u8 {
2257 #[inline(always)]
2258 fn from(val: Irlp) -> u8 {
2259 Irlp::to_bits(val)
2260 }
2261 }
2262 #[repr(u8)]
2263 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2264 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2265 pub enum Lbdl {
2266 #[doc = "10-bit break detection"]
2267 BIT10 = 0x0,
2268 #[doc = "11-bit break detection"]
2269 BIT11 = 0x01,
2270 }
2271 impl Lbdl {
2272 #[inline(always)]
2273 pub const fn from_bits(val: u8) -> Lbdl {
2274 unsafe { core::mem::transmute(val & 0x01) }
2275 }
2276 #[inline(always)]
2277 pub const fn to_bits(self) -> u8 {
2278 unsafe { core::mem::transmute(self) }
2279 }
2280 }
2281 impl From<u8> for Lbdl {
2282 #[inline(always)]
2283 fn from(val: u8) -> Lbdl {
2284 Lbdl::from_bits(val)
2285 }
2286 }
2287 impl From<Lbdl> for u8 {
2288 #[inline(always)]
2289 fn from(val: Lbdl) -> u8 {
2290 Lbdl::to_bits(val)
2291 }
2292 }
2293 #[repr(u8)]
2294 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2295 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2296 pub enum M0 {
2297 #[doc = "1 start bit, 8 data bits, n stop bits"]
2298 BIT8 = 0x0,
2299 #[doc = "1 start bit, 9 data bits, n stop bits"]
2300 BIT9 = 0x01,
2301 }
2302 impl M0 {
2303 #[inline(always)]
2304 pub const fn from_bits(val: u8) -> M0 {
2305 unsafe { core::mem::transmute(val & 0x01) }
2306 }
2307 #[inline(always)]
2308 pub const fn to_bits(self) -> u8 {
2309 unsafe { core::mem::transmute(self) }
2310 }
2311 }
2312 impl From<u8> for M0 {
2313 #[inline(always)]
2314 fn from(val: u8) -> M0 {
2315 M0::from_bits(val)
2316 }
2317 }
2318 impl From<M0> for u8 {
2319 #[inline(always)]
2320 fn from(val: M0) -> u8 {
2321 M0::to_bits(val)
2322 }
2323 }
2324 #[repr(u8)]
2325 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2326 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2327 pub enum M1 {
2328 #[doc = "Use M0 to set the data bits"]
2329 M0 = 0x0,
2330 #[doc = "1 start bit, 7 data bits, n stop bits"]
2331 BIT7 = 0x01,
2332 }
2333 impl M1 {
2334 #[inline(always)]
2335 pub const fn from_bits(val: u8) -> M1 {
2336 unsafe { core::mem::transmute(val & 0x01) }
2337 }
2338 #[inline(always)]
2339 pub const fn to_bits(self) -> u8 {
2340 unsafe { core::mem::transmute(self) }
2341 }
2342 }
2343 impl From<u8> for M1 {
2344 #[inline(always)]
2345 fn from(val: u8) -> M1 {
2346 M1::from_bits(val)
2347 }
2348 }
2349 impl From<M1> for u8 {
2350 #[inline(always)]
2351 fn from(val: M1) -> u8 {
2352 M1::to_bits(val)
2353 }
2354 }
2355 #[repr(u8)]
2356 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2357 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2358 pub enum Msbfirst {
2359 #[doc = "data is transmitted/received with data bit 0 first, following the start bit"]
2360 LSB = 0x0,
2361 #[doc = "data is transmitted/received with MSB (bit 7/8/9) first, following the start bit"]
2362 MSB = 0x01,
2363 }
2364 impl Msbfirst {
2365 #[inline(always)]
2366 pub const fn from_bits(val: u8) -> Msbfirst {
2367 unsafe { core::mem::transmute(val & 0x01) }
2368 }
2369 #[inline(always)]
2370 pub const fn to_bits(self) -> u8 {
2371 unsafe { core::mem::transmute(self) }
2372 }
2373 }
2374 impl From<u8> for Msbfirst {
2375 #[inline(always)]
2376 fn from(val: u8) -> Msbfirst {
2377 Msbfirst::from_bits(val)
2378 }
2379 }
2380 impl From<Msbfirst> for u8 {
2381 #[inline(always)]
2382 fn from(val: Msbfirst) -> u8 {
2383 Msbfirst::to_bits(val)
2384 }
2385 }
2386 #[repr(u8)]
2387 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2388 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2389 pub enum Over8 {
2390 #[doc = "Oversampling by 16"]
2391 OVERSAMPLING16 = 0x0,
2392 #[doc = "Oversampling by 8"]
2393 OVERSAMPLING8 = 0x01,
2394 }
2395 impl Over8 {
2396 #[inline(always)]
2397 pub const fn from_bits(val: u8) -> Over8 {
2398 unsafe { core::mem::transmute(val & 0x01) }
2399 }
2400 #[inline(always)]
2401 pub const fn to_bits(self) -> u8 {
2402 unsafe { core::mem::transmute(self) }
2403 }
2404 }
2405 impl From<u8> for Over8 {
2406 #[inline(always)]
2407 fn from(val: u8) -> Over8 {
2408 Over8::from_bits(val)
2409 }
2410 }
2411 impl From<Over8> for u8 {
2412 #[inline(always)]
2413 fn from(val: Over8) -> u8 {
2414 Over8::to_bits(val)
2415 }
2416 }
2417 #[repr(u8)]
2418 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2419 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2420 pub enum Presc {
2421 #[doc = "input clock not divided"]
2422 DIV1 = 0x0,
2423 #[doc = "input clock divided by 2"]
2424 DIV2 = 0x01,
2425 #[doc = "input clock divided by 4"]
2426 DIV4 = 0x02,
2427 #[doc = "input clock divided by 6"]
2428 DIV6 = 0x03,
2429 #[doc = "input clock divided by 8"]
2430 DIV8 = 0x04,
2431 #[doc = "input clock divided by 10"]
2432 DIV10 = 0x05,
2433 #[doc = "input clock divided by 12"]
2434 DIV12 = 0x06,
2435 #[doc = "input clock divided by 16"]
2436 DIV16 = 0x07,
2437 #[doc = "input clock divided by 32"]
2438 DIV32 = 0x08,
2439 #[doc = "input clock divided by 64"]
2440 DIV64 = 0x09,
2441 #[doc = "input clock divided by 128"]
2442 DIV128 = 0x0a,
2443 #[doc = "input clock divided by 256"]
2444 DIV256 = 0x0b,
2445 _RESERVED_c = 0x0c,
2446 _RESERVED_d = 0x0d,
2447 _RESERVED_e = 0x0e,
2448 _RESERVED_f = 0x0f,
2449 }
2450 impl Presc {
2451 #[inline(always)]
2452 pub const fn from_bits(val: u8) -> Presc {
2453 unsafe { core::mem::transmute(val & 0x0f) }
2454 }
2455 #[inline(always)]
2456 pub const fn to_bits(self) -> u8 {
2457 unsafe { core::mem::transmute(self) }
2458 }
2459 }
2460 impl From<u8> for Presc {
2461 #[inline(always)]
2462 fn from(val: u8) -> Presc {
2463 Presc::from_bits(val)
2464 }
2465 }
2466 impl From<Presc> for u8 {
2467 #[inline(always)]
2468 fn from(val: Presc) -> u8 {
2469 Presc::to_bits(val)
2470 }
2471 }
2472 #[repr(u8)]
2473 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2474 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2475 pub enum Ps {
2476 #[doc = "Even parity"]
2477 EVEN = 0x0,
2478 #[doc = "Odd parity"]
2479 ODD = 0x01,
2480 }
2481 impl Ps {
2482 #[inline(always)]
2483 pub const fn from_bits(val: u8) -> Ps {
2484 unsafe { core::mem::transmute(val & 0x01) }
2485 }
2486 #[inline(always)]
2487 pub const fn to_bits(self) -> u8 {
2488 unsafe { core::mem::transmute(self) }
2489 }
2490 }
2491 impl From<u8> for Ps {
2492 #[inline(always)]
2493 fn from(val: u8) -> Ps {
2494 Ps::from_bits(val)
2495 }
2496 }
2497 impl From<Ps> for u8 {
2498 #[inline(always)]
2499 fn from(val: Ps) -> u8 {
2500 Ps::to_bits(val)
2501 }
2502 }
2503 #[repr(u8)]
2504 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2505 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2506 pub enum Rwu {
2507 #[doc = "Receiver in active mode"]
2508 ACTIVE = 0x0,
2509 #[doc = "Receiver in mute mode"]
2510 MUTE = 0x01,
2511 }
2512 impl Rwu {
2513 #[inline(always)]
2514 pub const fn from_bits(val: u8) -> Rwu {
2515 unsafe { core::mem::transmute(val & 0x01) }
2516 }
2517 #[inline(always)]
2518 pub const fn to_bits(self) -> u8 {
2519 unsafe { core::mem::transmute(self) }
2520 }
2521 }
2522 impl From<u8> for Rwu {
2523 #[inline(always)]
2524 fn from(val: u8) -> Rwu {
2525 Rwu::from_bits(val)
2526 }
2527 }
2528 impl From<Rwu> for u8 {
2529 #[inline(always)]
2530 fn from(val: Rwu) -> u8 {
2531 Rwu::to_bits(val)
2532 }
2533 }
2534 #[repr(u8)]
2535 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2536 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2537 pub enum Stop {
2538 #[doc = "1 stop bit"]
2539 STOP1 = 0x0,
2540 #[doc = "0.5 stop bits"]
2541 STOP0P5 = 0x01,
2542 #[doc = "2 stop bits"]
2543 STOP2 = 0x02,
2544 #[doc = "1.5 stop bits"]
2545 STOP1P5 = 0x03,
2546 }
2547 impl Stop {
2548 #[inline(always)]
2549 pub const fn from_bits(val: u8) -> Stop {
2550 unsafe { core::mem::transmute(val & 0x03) }
2551 }
2552 #[inline(always)]
2553 pub const fn to_bits(self) -> u8 {
2554 unsafe { core::mem::transmute(self) }
2555 }
2556 }
2557 impl From<u8> for Stop {
2558 #[inline(always)]
2559 fn from(val: u8) -> Stop {
2560 Stop::from_bits(val)
2561 }
2562 }
2563 impl From<Stop> for u8 {
2564 #[inline(always)]
2565 fn from(val: Stop) -> u8 {
2566 Stop::to_bits(val)
2567 }
2568 }
2569 #[repr(u8)]
2570 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2571 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2572 pub enum Wake {
2573 #[doc = "USART wakeup on idle line"]
2574 IDLE_LINE = 0x0,
2575 #[doc = "USART wakeup on address mark"]
2576 ADDRESS_MARK = 0x01,
2577 }
2578 impl Wake {
2579 #[inline(always)]
2580 pub const fn from_bits(val: u8) -> Wake {
2581 unsafe { core::mem::transmute(val & 0x01) }
2582 }
2583 #[inline(always)]
2584 pub const fn to_bits(self) -> u8 {
2585 unsafe { core::mem::transmute(self) }
2586 }
2587 }
2588 impl From<u8> for Wake {
2589 #[inline(always)]
2590 fn from(val: u8) -> Wake {
2591 Wake::from_bits(val)
2592 }
2593 }
2594 impl From<Wake> for u8 {
2595 #[inline(always)]
2596 fn from(val: Wake) -> u8 {
2597 Wake::to_bits(val)
2598 }
2599 }
2600 #[repr(u8)]
2601 #[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
2602 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
2603 pub enum Wus {
2604 #[doc = "WUF active on address match"]
2605 ADDRESS = 0x0,
2606 _RESERVED_1 = 0x01,
2607 #[doc = "WuF active on Start bit detection"]
2608 START = 0x02,
2609 #[doc = "WUF active on RXNE"]
2610 RXNE = 0x03,
2611 }
2612 impl Wus {
2613 #[inline(always)]
2614 pub const fn from_bits(val: u8) -> Wus {
2615 unsafe { core::mem::transmute(val & 0x03) }
2616 }
2617 #[inline(always)]
2618 pub const fn to_bits(self) -> u8 {
2619 unsafe { core::mem::transmute(self) }
2620 }
2621 }
2622 impl From<u8> for Wus {
2623 #[inline(always)]
2624 fn from(val: u8) -> Wus {
2625 Wus::from_bits(val)
2626 }
2627 }
2628 impl From<Wus> for u8 {
2629 #[inline(always)]
2630 fn from(val: Wus) -> u8 {
2631 Wus::to_bits(val)
2632 }
2633 }
2634}
2635