1
2use crate::metadata::ir::*;
3pub(crate) static REGISTERS: IR = IR {
4 blocks: &[Block {
5 name: "Comp",
6 extends: None,
7 description: Some("Comparator."),
8 items: &[BlockItem {
9 name: "csr",
10 description: Some("Comparator control and status register."),
11 array: None,
12 byte_offset: 0x0,
13 inner: BlockItemInner::Register(Register {
14 access: Access::ReadWrite,
15 bit_size: 32,
16 fieldset: Some("Csr"),
17 }),
18 }],
19 }],
20 fieldsets: &[FieldSet {
21 name: "Csr",
22 extends: None,
23 description: Some("control and status register."),
24 bit_size: 32,
25 fields: &[
26 Field {
27 name: "en",
28 description: Some("Enable"),
29 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
30 bit_size: 1,
31 array: None,
32 enumm: None,
33 },
34 Field {
35 name: "inmsel",
36 description: Some("Input minus selection bits."),
37 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 4 }),
38 bit_size: 4,
39 array: None,
40 enumm: Some("Inm"),
41 },
42 Field {
43 name: "inpsel",
44 description: Some("Input plus selection bit."),
45 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
46 bit_size: 3,
47 array: None,
48 enumm: None,
49 },
50 Field {
51 name: "winmode",
52 description: Some("Comparator 1 noninverting input selector for window mode."),
53 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 11 }),
54 bit_size: 1,
55 array: None,
56 enumm: Some("WindowMode"),
57 },
58 Field {
59 name: "winout",
60 description: Some("Comparator 1 output selector."),
61 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 14 }),
62 bit_size: 1,
63 array: None,
64 enumm: Some("WindowOut"),
65 },
66 Field {
67 name: "polarity",
68 description: Some("Polarity selection bit."),
69 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 15 }),
70 bit_size: 1,
71 array: None,
72 enumm: Some("Polarity"),
73 },
74 Field {
75 name: "hyst",
76 description: Some("Hysteresis selection bits."),
77 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 16 }),
78 bit_size: 2,
79 array: None,
80 enumm: Some("Hysteresis"),
81 },
82 Field {
83 name: "pwrmode",
84 description: Some("Power Mode."),
85 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 18 }),
86 bit_size: 2,
87 array: None,
88 enumm: Some("PowerMode"),
89 },
90 Field {
91 name: "blanksel",
92 description: Some("Blanking source selection bits."),
93 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 20 }),
94 bit_size: 5,
95 array: None,
96 enumm: Some("Blanking"),
97 },
98 Field {
99 name: "value",
100 description: Some("Output status bit."),
101 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 30 }),
102 bit_size: 1,
103 array: None,
104 enumm: None,
105 },
106 Field {
107 name: "lock",
108 description: Some("Register lock bit."),
109 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 31 }),
110 bit_size: 1,
111 array: None,
112 enumm: None,
113 },
114 ],
115 }],
116 enums: &[
117 Enum {
118 name: "Blanking",
119 description: None,
120 bit_size: 5,
121 variants: &[
122 EnumVariant {
123 name: "NO_BLANKING",
124 description: Some("No blanking."),
125 value: 0,
126 },
127 EnumVariant {
128 name: "BLANK1",
129 description: Some("Check data sheet for blanking options"),
130 value: 1,
131 },
132 EnumVariant {
133 name: "BLANK2",
134 description: Some("Check data sheet for blanking options"),
135 value: 2,
136 },
137 EnumVariant {
138 name: "BLANK3",
139 description: Some("Check data sheet for blanking options"),
140 value: 4,
141 },
142 ],
143 },
144 Enum {
145 name: "Hysteresis",
146 description: None,
147 bit_size: 2,
148 variants: &[
149 EnumVariant {
150 name: "NONE",
151 description: None,
152 value: 0,
153 },
154 EnumVariant {
155 name: "LOW",
156 description: None,
157 value: 1,
158 },
159 EnumVariant {
160 name: "MEDIUM",
161 description: None,
162 value: 2,
163 },
164 EnumVariant {
165 name: "HIGH",
166 description: None,
167 value: 3,
168 },
169 ],
170 },
171 Enum {
172 name: "Inm",
173 description: None,
174 bit_size: 4,
175 variants: &[
176 EnumVariant {
177 name: "QUARTER_VREF",
178 description: Some("Inverting input set to 1/4 VRef"),
179 value: 0,
180 },
181 EnumVariant {
182 name: "HALF_VREF",
183 description: Some("Inverting input set to 1/2 VRef"),
184 value: 1,
185 },
186 EnumVariant {
187 name: "THREE_QUARTER_VREF",
188 description: Some("Inverting input set to 3/4 VRef"),
189 value: 2,
190 },
191 EnumVariant {
192 name: "VREF",
193 description: Some("Inverting input set to VRef"),
194 value: 3,
195 },
196 EnumVariant {
197 name: "DAC1",
198 description: Some("Inverting input set to DAC1 output"),
199 value: 4,
200 },
201 EnumVariant {
202 name: "DAC2",
203 description: Some("Inverting input set to DAC2 output"),
204 value: 5,
205 },
206 EnumVariant {
207 name: "INM1",
208 description: Some("Inverting input set to IO1 (PB7)"),
209 value: 6,
210 },
211 EnumVariant {
212 name: "INM2",
213 description: Some("Inverting input set to IO2 (PB3)"),
214 value: 7,
215 },
216 ],
217 },
218 Enum {
219 name: "Polarity",
220 description: None,
221 bit_size: 1,
222 variants: &[
223 EnumVariant {
224 name: "NOT_INVERTED",
225 description: Some("Output is not inverted."),
226 value: 0,
227 },
228 EnumVariant {
229 name: "INVERTED",
230 description: Some("Output is inverted."),
231 value: 1,
232 },
233 ],
234 },
235 Enum {
236 name: "PowerMode",
237 description: None,
238 bit_size: 2,
239 variants: &[
240 EnumVariant {
241 name: "HIGH_SPEED",
242 description: Some("High speed / full power."),
243 value: 0,
244 },
245 EnumVariant {
246 name: "MEDIUM_SPEED",
247 description: Some("Medium speed / medium power."),
248 value: 1,
249 },
250 EnumVariant {
251 name: "ULTRA_LOW",
252 description: Some("Very-low speed / ultra-low power."),
253 value: 3,
254 },
255 ],
256 },
257 Enum {
258 name: "WindowMode",
259 description: None,
260 bit_size: 1,
261 variants: &[
262 EnumVariant {
263 name: "THIS_INPSEL",
264 description: Some("Signal selected with INPSEL[2:0] bitfield of this register."),
265 value: 0,
266 },
267 EnumVariant {
268 name: "OTHER_INPSEL",
269 description: Some(
270 "Signal selected with INPSEL[2:0] bitfield of the other register (required for window mode).",
271 ),
272 value: 1,
273 },
274 ],
275 },
276 Enum {
277 name: "WindowOut",
278 description: None,
279 bit_size: 1,
280 variants: &[
281 EnumVariant {
282 name: "COMP1_VALUE",
283 description: Some("Comparator 1 value."),
284 value: 0,
285 },
286 EnumVariant {
287 name: "COMP1_VALUE_XOR_COMP2_VALUE",
288 description: Some("Comparator 1 value XOR comparator 2 value (required for window mode)."),
289 value: 1,
290 },
291 ],
292 },
293 ],
294};
295