| 1 | |
| 2 | use crate::metadata::ir::*; |
| 3 | pub(crate) static REGISTERS: IR = IR { |
| 4 | blocks: &[Block { |
| 5 | name: "Exti" , |
| 6 | extends: None, |
| 7 | description: Some("External interrupt/event controller" ), |
| 8 | items: &[ |
| 9 | BlockItem { |
| 10 | name: "rtsr" , |
| 11 | description: Some("Rising Trigger selection register" ), |
| 12 | array: Some(Array::Regular(RegularArray { len: 2, stride: 32 })), |
| 13 | byte_offset: 0x0, |
| 14 | inner: BlockItemInner::Register(Register { |
| 15 | access: Access::ReadWrite, |
| 16 | bit_size: 32, |
| 17 | fieldset: Some("Lines" ), |
| 18 | }), |
| 19 | }, |
| 20 | BlockItem { |
| 21 | name: "ftsr" , |
| 22 | description: Some("Falling Trigger selection register" ), |
| 23 | array: Some(Array::Regular(RegularArray { len: 2, stride: 32 })), |
| 24 | byte_offset: 0x4, |
| 25 | inner: BlockItemInner::Register(Register { |
| 26 | access: Access::ReadWrite, |
| 27 | bit_size: 32, |
| 28 | fieldset: Some("Lines" ), |
| 29 | }), |
| 30 | }, |
| 31 | BlockItem { |
| 32 | name: "swier" , |
| 33 | description: Some("Software interrupt event register" ), |
| 34 | array: Some(Array::Regular(RegularArray { len: 2, stride: 32 })), |
| 35 | byte_offset: 0x8, |
| 36 | inner: BlockItemInner::Register(Register { |
| 37 | access: Access::ReadWrite, |
| 38 | bit_size: 32, |
| 39 | fieldset: Some("Lines" ), |
| 40 | }), |
| 41 | }, |
| 42 | BlockItem { |
| 43 | name: "rpr" , |
| 44 | description: Some("Rising pending register" ), |
| 45 | array: Some(Array::Regular(RegularArray { len: 2, stride: 32 })), |
| 46 | byte_offset: 0xc, |
| 47 | inner: BlockItemInner::Register(Register { |
| 48 | access: Access::ReadWrite, |
| 49 | bit_size: 32, |
| 50 | fieldset: Some("Lines" ), |
| 51 | }), |
| 52 | }, |
| 53 | BlockItem { |
| 54 | name: "fpr" , |
| 55 | description: Some("Falling pending register" ), |
| 56 | array: Some(Array::Regular(RegularArray { len: 2, stride: 32 })), |
| 57 | byte_offset: 0x10, |
| 58 | inner: BlockItemInner::Register(Register { |
| 59 | access: Access::ReadWrite, |
| 60 | bit_size: 32, |
| 61 | fieldset: Some("Lines" ), |
| 62 | }), |
| 63 | }, |
| 64 | BlockItem { |
| 65 | name: "seccfgr" , |
| 66 | description: Some("Security configuration register" ), |
| 67 | array: Some(Array::Regular(RegularArray { len: 2, stride: 36 })), |
| 68 | byte_offset: 0x14, |
| 69 | inner: BlockItemInner::Register(Register { |
| 70 | access: Access::ReadWrite, |
| 71 | bit_size: 32, |
| 72 | fieldset: Some("Seccfgr" ), |
| 73 | }), |
| 74 | }, |
| 75 | BlockItem { |
| 76 | name: "privcfgr" , |
| 77 | description: Some("Privilege configuration register" ), |
| 78 | array: Some(Array::Regular(RegularArray { len: 2, stride: 28 })), |
| 79 | byte_offset: 0x18, |
| 80 | inner: BlockItemInner::Register(Register { |
| 81 | access: Access::ReadWrite, |
| 82 | bit_size: 32, |
| 83 | fieldset: Some("Privcfgr" ), |
| 84 | }), |
| 85 | }, |
| 86 | BlockItem { |
| 87 | name: "exticr" , |
| 88 | description: Some("Configuration register" ), |
| 89 | array: Some(Array::Regular(RegularArray { len: 4, stride: 4 })), |
| 90 | byte_offset: 0x60, |
| 91 | inner: BlockItemInner::Register(Register { |
| 92 | access: Access::ReadWrite, |
| 93 | bit_size: 32, |
| 94 | fieldset: Some("Exticr" ), |
| 95 | }), |
| 96 | }, |
| 97 | BlockItem { |
| 98 | name: "lockrg" , |
| 99 | description: Some("EXTI lock register" ), |
| 100 | array: None, |
| 101 | byte_offset: 0x70, |
| 102 | inner: BlockItemInner::Register(Register { |
| 103 | access: Access::ReadWrite, |
| 104 | bit_size: 32, |
| 105 | fieldset: Some("Lockrg" ), |
| 106 | }), |
| 107 | }, |
| 108 | BlockItem { |
| 109 | name: "imr" , |
| 110 | description: Some("Interrupt mask register" ), |
| 111 | array: Some(Array::Regular(RegularArray { len: 2, stride: 16 })), |
| 112 | byte_offset: 0x80, |
| 113 | inner: BlockItemInner::Register(Register { |
| 114 | access: Access::ReadWrite, |
| 115 | bit_size: 32, |
| 116 | fieldset: Some("Lines" ), |
| 117 | }), |
| 118 | }, |
| 119 | BlockItem { |
| 120 | name: "emr" , |
| 121 | description: Some("Event mask register" ), |
| 122 | array: Some(Array::Regular(RegularArray { len: 2, stride: 16 })), |
| 123 | byte_offset: 0x84, |
| 124 | inner: BlockItemInner::Register(Register { |
| 125 | access: Access::ReadWrite, |
| 126 | bit_size: 32, |
| 127 | fieldset: Some("Lines" ), |
| 128 | }), |
| 129 | }, |
| 130 | ], |
| 131 | }], |
| 132 | fieldsets: &[ |
| 133 | FieldSet { |
| 134 | name: "Exticr" , |
| 135 | extends: None, |
| 136 | description: Some("external interrupt configuration register 1" ), |
| 137 | bit_size: 32, |
| 138 | fields: &[Field { |
| 139 | name: "exti" , |
| 140 | description: Some("EXTI configuration bits" ), |
| 141 | bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }), |
| 142 | bit_size: 8, |
| 143 | array: Some(Array::Regular(RegularArray { len: 4, stride: 8 })), |
| 144 | enumm: None, |
| 145 | }], |
| 146 | }, |
| 147 | FieldSet { |
| 148 | name: "Lines" , |
| 149 | extends: None, |
| 150 | description: Some("EXTI lines register, 1 bit per line" ), |
| 151 | bit_size: 32, |
| 152 | fields: &[Field { |
| 153 | name: "line" , |
| 154 | description: Some("EXTI line" ), |
| 155 | bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }), |
| 156 | bit_size: 1, |
| 157 | array: Some(Array::Regular(RegularArray { len: 32, stride: 1 })), |
| 158 | enumm: None, |
| 159 | }], |
| 160 | }, |
| 161 | FieldSet { |
| 162 | name: "Lockrg" , |
| 163 | extends: None, |
| 164 | description: Some("EXTI lock register" ), |
| 165 | bit_size: 32, |
| 166 | fields: &[Field { |
| 167 | name: "lock" , |
| 168 | description: Some("LOCK" ), |
| 169 | bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }), |
| 170 | bit_size: 1, |
| 171 | array: None, |
| 172 | enumm: None, |
| 173 | }], |
| 174 | }, |
| 175 | FieldSet { |
| 176 | name: "Privcfgr" , |
| 177 | extends: None, |
| 178 | description: Some("Privilege configuration register" ), |
| 179 | bit_size: 32, |
| 180 | fields: &[Field { |
| 181 | name: "priv_" , |
| 182 | description: Some("Security enable on event input x" ), |
| 183 | bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }), |
| 184 | bit_size: 1, |
| 185 | array: Some(Array::Regular(RegularArray { len: 32, stride: 1 })), |
| 186 | enumm: None, |
| 187 | }], |
| 188 | }, |
| 189 | FieldSet { |
| 190 | name: "Seccfgr" , |
| 191 | extends: None, |
| 192 | description: Some("Security configuration register" ), |
| 193 | bit_size: 32, |
| 194 | fields: &[Field { |
| 195 | name: "sec" , |
| 196 | description: Some("Security enable on event input x" ), |
| 197 | bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }), |
| 198 | bit_size: 1, |
| 199 | array: Some(Array::Regular(RegularArray { len: 32, stride: 1 })), |
| 200 | enumm: None, |
| 201 | }], |
| 202 | }, |
| 203 | ], |
| 204 | enums: &[], |
| 205 | }; |
| 206 | |