1
2use crate::metadata::ir::*;
3pub(crate) static REGISTERS: IR = IR {
4 blocks: &[Block {
5 name: "Fmac",
6 extends: None,
7 description: Some("Filter math accelerator"),
8 items: &[
9 BlockItem {
10 name: "x1bufcfg",
11 description: Some("X1 buffer configuration register"),
12 array: None,
13 byte_offset: 0x0,
14 inner: BlockItemInner::Register(Register {
15 access: Access::ReadWrite,
16 bit_size: 32,
17 fieldset: Some("X1bufcfg"),
18 }),
19 },
20 BlockItem {
21 name: "x2bufcfg",
22 description: Some("X2 buffer configuration register"),
23 array: None,
24 byte_offset: 0x4,
25 inner: BlockItemInner::Register(Register {
26 access: Access::ReadWrite,
27 bit_size: 32,
28 fieldset: Some("X2bufcfg"),
29 }),
30 },
31 BlockItem {
32 name: "ybufcfg",
33 description: Some("Y buffer configuration register"),
34 array: None,
35 byte_offset: 0x8,
36 inner: BlockItemInner::Register(Register {
37 access: Access::ReadWrite,
38 bit_size: 32,
39 fieldset: Some("Ybufcfg"),
40 }),
41 },
42 BlockItem {
43 name: "param",
44 description: Some("Parameter register"),
45 array: None,
46 byte_offset: 0xc,
47 inner: BlockItemInner::Register(Register {
48 access: Access::ReadWrite,
49 bit_size: 32,
50 fieldset: Some("Param"),
51 }),
52 },
53 BlockItem {
54 name: "cr",
55 description: Some("Control register"),
56 array: None,
57 byte_offset: 0x10,
58 inner: BlockItemInner::Register(Register {
59 access: Access::ReadWrite,
60 bit_size: 32,
61 fieldset: Some("Cr"),
62 }),
63 },
64 BlockItem {
65 name: "sr",
66 description: Some("Status register"),
67 array: None,
68 byte_offset: 0x14,
69 inner: BlockItemInner::Register(Register {
70 access: Access::Read,
71 bit_size: 32,
72 fieldset: Some("Sr"),
73 }),
74 },
75 BlockItem {
76 name: "wdata",
77 description: Some("Write data register"),
78 array: None,
79 byte_offset: 0x18,
80 inner: BlockItemInner::Register(Register {
81 access: Access::Write,
82 bit_size: 32,
83 fieldset: Some("Wdata"),
84 }),
85 },
86 BlockItem {
87 name: "rdata",
88 description: Some("Read data register"),
89 array: None,
90 byte_offset: 0x1c,
91 inner: BlockItemInner::Register(Register {
92 access: Access::Read,
93 bit_size: 32,
94 fieldset: Some("Rdata"),
95 }),
96 },
97 ],
98 }],
99 fieldsets: &[
100 FieldSet {
101 name: "Cr",
102 extends: None,
103 description: Some("Control register"),
104 bit_size: 32,
105 fields: &[
106 Field {
107 name: "rien",
108 description: Some("Enable read interrupt"),
109 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
110 bit_size: 1,
111 array: None,
112 enumm: None,
113 },
114 Field {
115 name: "wien",
116 description: Some("Enable write interrupt"),
117 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
118 bit_size: 1,
119 array: None,
120 enumm: None,
121 },
122 Field {
123 name: "ovflien",
124 description: Some("Enable overflow error interrupts"),
125 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
126 bit_size: 1,
127 array: None,
128 enumm: None,
129 },
130 Field {
131 name: "unflien",
132 description: Some("Enable underflow error interrupts"),
133 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 3 }),
134 bit_size: 1,
135 array: None,
136 enumm: None,
137 },
138 Field {
139 name: "satien",
140 description: Some("Enable saturation error interrupts"),
141 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 4 }),
142 bit_size: 1,
143 array: None,
144 enumm: None,
145 },
146 Field {
147 name: "dmaren",
148 description: Some("Enable DMA read channel requests"),
149 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
150 bit_size: 1,
151 array: None,
152 enumm: None,
153 },
154 Field {
155 name: "dmawen",
156 description: Some("Enable DMA write channel requests"),
157 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 9 }),
158 bit_size: 1,
159 array: None,
160 enumm: None,
161 },
162 Field {
163 name: "clipen",
164 description: Some("Enable clipping"),
165 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 15 }),
166 bit_size: 1,
167 array: None,
168 enumm: None,
169 },
170 Field {
171 name: "reset",
172 description: Some("Reset FMAC unit"),
173 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 16 }),
174 bit_size: 1,
175 array: None,
176 enumm: None,
177 },
178 ],
179 },
180 FieldSet {
181 name: "Param",
182 extends: None,
183 description: Some("Parameter register"),
184 bit_size: 32,
185 fields: &[
186 Field {
187 name: "p",
188 description: Some("Input parameter P"),
189 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
190 bit_size: 8,
191 array: None,
192 enumm: None,
193 },
194 Field {
195 name: "q",
196 description: Some("Input parameter Q"),
197 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
198 bit_size: 8,
199 array: None,
200 enumm: None,
201 },
202 Field {
203 name: "r",
204 description: Some("Input parameter R"),
205 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 16 }),
206 bit_size: 8,
207 array: None,
208 enumm: None,
209 },
210 Field {
211 name: "func",
212 description: Some("Function"),
213 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 24 }),
214 bit_size: 7,
215 array: None,
216 enumm: None,
217 },
218 Field {
219 name: "start",
220 description: Some("Enable execution"),
221 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 31 }),
222 bit_size: 1,
223 array: None,
224 enumm: None,
225 },
226 ],
227 },
228 FieldSet {
229 name: "Rdata",
230 extends: None,
231 description: Some("Read data register"),
232 bit_size: 32,
233 fields: &[Field {
234 name: "res",
235 description: Some(
236 "Read data (contents of the Y output buffer at the address indicated by the READ pointer)",
237 ),
238 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
239 bit_size: 16,
240 array: None,
241 enumm: None,
242 }],
243 },
244 FieldSet {
245 name: "Sr",
246 extends: None,
247 description: Some("Status register"),
248 bit_size: 32,
249 fields: &[
250 Field {
251 name: "yempty",
252 description: Some("Y buffer empty flag"),
253 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
254 bit_size: 1,
255 array: None,
256 enumm: None,
257 },
258 Field {
259 name: "x1full",
260 description: Some("X1 buffer full flag"),
261 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
262 bit_size: 1,
263 array: None,
264 enumm: None,
265 },
266 Field {
267 name: "ovfl",
268 description: Some("Overflow error flag"),
269 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
270 bit_size: 1,
271 array: None,
272 enumm: None,
273 },
274 Field {
275 name: "unfl",
276 description: Some("Underflow error flag"),
277 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 9 }),
278 bit_size: 1,
279 array: None,
280 enumm: None,
281 },
282 Field {
283 name: "sat",
284 description: Some("Saturation error flag"),
285 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 10 }),
286 bit_size: 1,
287 array: None,
288 enumm: None,
289 },
290 ],
291 },
292 FieldSet {
293 name: "Wdata",
294 extends: None,
295 description: Some("Write data register"),
296 bit_size: 32,
297 fields: &[Field {
298 name: "wdata",
299 description: Some(
300 "Write data (write data are transferred to the address indicated by the write pointer)",
301 ),
302 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
303 bit_size: 16,
304 array: None,
305 enumm: None,
306 }],
307 },
308 FieldSet {
309 name: "X1bufcfg",
310 extends: None,
311 description: Some("X1 buffer configuration register"),
312 bit_size: 32,
313 fields: &[
314 Field {
315 name: "x1_base",
316 description: Some("Base address of X1 buffer"),
317 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
318 bit_size: 8,
319 array: None,
320 enumm: None,
321 },
322 Field {
323 name: "x1_buf_size",
324 description: Some("Allocated size of X1 buffer in 16-bit words"),
325 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
326 bit_size: 8,
327 array: None,
328 enumm: None,
329 },
330 Field {
331 name: "full_wm",
332 description: Some("Watermark for buffer full flag"),
333 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 24 }),
334 bit_size: 2,
335 array: None,
336 enumm: None,
337 },
338 ],
339 },
340 FieldSet {
341 name: "X2bufcfg",
342 extends: None,
343 description: Some("X2 buffer configuration register"),
344 bit_size: 32,
345 fields: &[
346 Field {
347 name: "x2_base",
348 description: Some("Base address of X2 buffer"),
349 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
350 bit_size: 8,
351 array: None,
352 enumm: None,
353 },
354 Field {
355 name: "x2_buf_size",
356 description: Some("Size of X2 buffer in 16-bit words"),
357 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
358 bit_size: 8,
359 array: None,
360 enumm: None,
361 },
362 ],
363 },
364 FieldSet {
365 name: "Ybufcfg",
366 extends: None,
367 description: Some("Y buffer configuration register"),
368 bit_size: 32,
369 fields: &[
370 Field {
371 name: "y_base",
372 description: Some("Base address of Y buffer"),
373 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
374 bit_size: 8,
375 array: None,
376 enumm: None,
377 },
378 Field {
379 name: "y_buf_size",
380 description: Some("Size of Y buffer in 16-bit words"),
381 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
382 bit_size: 8,
383 array: None,
384 enumm: None,
385 },
386 Field {
387 name: "empty_wm",
388 description: Some("Watermark for buffer empty flag"),
389 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 24 }),
390 bit_size: 2,
391 array: None,
392 enumm: None,
393 },
394 ],
395 },
396 ],
397 enums: &[],
398};
399